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ASIC DATA BOOK TC200G/E SERIES MACROCELLS (Non-liner Delay Models) 1997 ASIC Data Book TC200G/E SERIES MACROCELLS (Non-linear Delay Models) Published in July, 1996 Document ID: 451V1CA (C) Copyright 1996 TOSHIBA Corporation All Rights Reserved The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or patent rights of TOSHIBA or others. TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. The products described in this document are strategic products subject to COCOM regulations They should not be exported without authorization from the appropriate governmental authorities. Preface This databook was written for logic and system designers who wish to use the TC200G/E Series Gate Array From Toshiba Corporation. TC200G/E Series Gate Array databook consist of the volumes listed below. This databook contains the specifications for each cell in the Verilog-HDL sign-off libraries (for use with Verilog-XL, VCS, etc.) and VHDL sign-off libraries (for use with VITAL), including the number of grids used, load and drive characteristics, function, schematic symbol, and parameters used to compute propagation delay. TC200/E SERIES Data Book Set Delay Model Sign-Off Non-linear Delay Model Customer TC200G/E SERIES MACROCELLS (Non-linear Delay Model) Title GATE ARRAY/EMBEDDED ARRAY MACROFUNCTIONS TC200G/E * TC203G/ESERIE MEGACELLS MEGAFUNCTIONS (Non-linear Delay Model) TC200G/E * TC203G/E SERIE MEGACELLS MEGAFUNCTIONS Linear Delay Model Toshiba VLCAD TC200G/E SERIES MACROCELLS * Internal Macrocells * I/O Macrocells * Macrofunctions * 74HC Compatible Macrofunctions * Megacells * Megafunctions Cataloged Cell Type i Before you begin creating your design, please call your Toshiba Design Center engineer to see that all data books in your possession are the latest versions. All information in this databook is based on the latest product information available at the timing of printing. Toshiba reviewed the accuracy of this databook, but should your find, in this databook, any ambiguities or be in doubt as to any meanings, please direct all queries to your Toshiba Design Center engineer. ii * VLCAD is a trademark of TOSHIBA Corporation. * All other products or services mentioned in this document are identified by the trademarks or service marks of their respective companies or organizations. iii Table of Contents Chapter 1 Fundamentals Master Line-up .............................................................................................................. 1 - 3 Functional Index ............................................................................................................ 1 - 5 Drive Options for Internal Macrocells ........................................................................ 1 - 13 Typical Macrocells .............................................................................. 1 - 13 Clock Driver ........................................................................................ 1 - 14 Drive Options for I/O Macrocells ................................................................................ 1 - 15 Input Buffer ......................................................................................... 1 - 15 Output Buffer ....................................................................................... 1 - 16 Bidirectional Buffer ............................................................................. 1 - 16 How to Find Target Input Buffer ................................................................................. 1 - 17 Naming standard Drive Input Buffer ................................................... 1 - 17 Naming High Drive Input Buffers ....................................................... 1 - 18 Usable Input Buffer Configuration ...................................................... 1 - 19 How to Find Target Output Buffer .............................................................................. 1 - 20 Naming Two-state Output Buffer ........................................................ 1 - 20 Usable Two-state Output Configuration ............................................. 1 - 21 Naming Tri-state Output Buffer .......................................................... 1 - 21 Usable Tri-State Output Buffer Configuration .................................... 1 - 22 How to Find Target Bidirectional Buffer .................................................................... 1 - 23 Naming Bidirectional Output Buffer ................................................... 1 - 23 iv Usable Bidirectional Output Buffer Configuration ............................. 1 - 25 Oscillator Cells ............................................................................................................ 1 - 28 Naming Oscillator Cell ........................................................................ 1 - 28 How to Find Target Oscillator Cells ................................................... 1 - 29 Notes on Crystal Oscillator ................................................................. 1 - 29 Oscillator Application Note ................................................................. 1 - 30 Corner Oscillator Cell .......................................................................... 1 - 33 DC Characteristics ....................................................................................................... 1 - 34 Output Characteristics ......................................................................... 1 - 34 Threshold Characteristics .................................................................... 1 - 36 Pull-Up, Pull- Down Characteristics ................................................... 1 - 38 Input Capacitance Values for I/O Buffers ................................................................... 1 - 39 The Power and Ground Lines ...................................................................................... 1 - 41 Delay Estimation ......................................................................................................... 1 - 42 State-Dependent Path Delays (SDPDs) ............................................... 1 - 42 Non-linear Delay Model ...................................................................... 1 - 43 Non-linear Delay Calculation Example ............................................... 1 - 46 Non-linear Setup/Hold Time Calculation Example ............................ 1 - 50 Estimated Wiring Load Table ............................................................. 1 - 53 Variations in Propagation Delays ........................................................ 1 - 57 Reading Data Sheets .................................................................................................... 1 - 59 Chapter 2 Internal Macrocells Alphanumeric Index Internal Macrocell Data Sheets ..................................................................................... 2 - 1 Chapter 3 I/O Macrocells Alphanumeric Index I/O Macrocell Data Sheets.............................................................................................. 3- 1 v Manual Organization This manual is organized as follows: Chapter 1: * Fundamentals Master Line-up This section describes part numbers of TC200G/E Series usable gates, and the number of I/O slots. Functional Index All the cells available, both internal and I/O macrocells, are arranged by their functions for quick reference. Drive Options for Internal Macrocells This section describes types of macrocells that are typical macrocells, clock drivers. Drive Options for I/O Macrocells This section describes types of I/O macrocells that are input buffers, output buffers and bidirectional buffers. How to Find Target Input Buffer How to Find Target Output Buffer How to Find Target Bidirectional buffer Every macrocell has a type name that denotes its generic function.This section describes the macrocell naming conventions so that you can find target macrocells quickly. Oscillator Cell This section describes the notation for configuring crystal oscillator circuit using oscillator cells. DC Characteristics This section describes the characteristics for currents of output buffers and threshold voltage of input buffers, and pull-up, pull-down transistor DC characteristics. * * * * * * * * vi * Input Capacitance Values for I/O Buffers * Power and Ground Lines This section describes power and ground lines. Delay Estimation This section describes how to calculate propagation delays, capacitance loading with estimated wire length, factors in variation of propagation delay, and characteristics with the temperature, supply voltage and processing tolerance. Reading Data Sheets This section gives a brief description about how to read the cell catalog in chapter 2 and 3. * * Chapter 2: Internal Macrocells This section is primarily a catalog of the internal macrocells, together with an alphabetical index. Chapter 3: I/O Macrocells This section is primarily a catalog of the I/O macrocells, together with an alphabetical index. vii TOSHIBA Chapter 1 Fundamentals TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1-1 TOSHIBA Master Line-up Master Line-up This section describes part numbers of TC200G/E Series usable gates and the number of I/O slots. TC200G GATE ARRAY Double-Layer Metal Part number TC200G42 TC200G40 TC200G36 TC200G32 TC200G24 TC200G20 TC200G16 TC200G14 TC200G12 TC200G10 TC200G08 TC200G06 TC200G04 TC200G02 Notes Usable Gate1) 404,000 288,000 228,000 175,000 125,000 98,000 82,000 67,000 56,000 47,000 39,000 31,000 22,000 13,000 Triple-Layer Metal Part number TC200G92 TC200G90 TC200G86 TC200G82 TC200G74 TC200G70 TC200G66 TC200G64 TC200G62 TC200G60 TC200G58 TC200G56 TC200G54 TC200G52 Usable Gate1) 704,000 503,000 398,000 306,000 218,000 170,000 142,000 117,000 98,000 81,000 67,000 53,000 38,000 22,000 Raw Gates Max I/O Pads2) TAB Wire Bonding 5123) 4323) 3843) 3363) 2723) 240 208 192 176 160 144 128 104 80 QTP * QFP-P [TAB] 7763) 6563) 5843) 5123) 4163) 3683) 3203) 2923) 2683) 244 220 192 156 120 QFP-P [TAB] -- -- -- -- 5563) 4923) 4283) 3883) 3563) 3243) 2963) 256 208 160 Maximum I/O Slots4) 1,036 876 780 684 556 492 428 388 356 324 296 256 208 160 1,154,200 824,180 652,256 501,184 329,840 257,560 194,684 159,840 134,244 110,880 92,168 68,526 44,916 26,100 1. Actual usable gates depend on cell types used and circuit configuration on the system. 2. Additional I/O pads may be configured as VDD/VSS. 3. I/O signals presently limited to 256 by tester capability. 4. Actual usable I/O slots depend on I/O macrocell types and locations used. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1-3 Master Line-up TOSHIBA TC200E EMBEDDED ARRAY Double-Layer Metal Usable Gate1) 13,000 22,000 31,000 39,000 47,000 56,000 67,000 82,000 86,000 98,000 111,000 125,000 140,000 144,000 159,000 175,000 201,000 228,000 257,000 288,000 404,000 Triple-Layer Metal Usable Gate1) Raw Gates Max I/O Pads2) TAB Wire Bonding 80 104 128 144 160 176 192 208 224 240 2563) 2723) 2883) 3043) 3203) 3363) 3603) 3843) 4083) 4323) 5123) QTP * QFP-P [TAB] 120 156 192 220 244 2683) 2923) 3203) 3443) 3683) 3923) 4163) 4403) 4643) 4883) 5123) 5483) 5843) 6203) 6563) 7763) QFP-P [TAB 160 208 2563) 2963) 3243) 3563) 3883) 4283) 4603) 4923) 5243) 5563) -- -- -- -- -- -- -- -- -- Maximum I/O Slots4) 160 208 256 296 324 356 388 428 460 492 524 556 588 620 652 684 732 780 828 876 1,036 Part number TC200E020 TC200E040 TC200E060 TC200E080 TC200E100 TC200E120 TC200E140 TC200E160 TC200E180 TC200E200 TC200E220 TC200E240 TC200E260 TC200E280 TC200E300 TC200E320 TC200E340 TC200E360 TC200E380 TC200E400 TC200E420* Notes Part number TC200E580 TC200E600 TC200E620 TC200E640 TC200E660 TC200E680 TC200E700 TC200E720 TC200E740 TC200E760 TC200E780 TC200E800 TC200E820 TC200E840 TC200E860 TC200E880 TC200E900 TC200E920* 67,000 81,000 98,000 117,000 142,000 149,000 170,000 193,000 218,000 244,000 251,000 278,000 306,000 350,000 398,000 448,000 503,000 704,000 26,100 44,916 68,526 92,168 110,880 134,244 159,840 194,648 225,280 257,560 292,584 329,840 369,328 411,048 455,000 501,184 574,236 652,256 735,244 824,180 1,154,200 1. Actual usable gates depend on cell types used and circuit configuration on the system. 2. Additional I/O pads may be configured as VDD/VSS. 3. I/O signals presently limited to 256 by tester capability. 4. Actual usable I/O slots depend on I/O macrocell types and locations used. * : Under development 1-4 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Functional Index Functional Index TC200G/E SERIES MACROCELL FUNCTIONAL INDEX CELL NAME FUNCTION COMPLEXED GATE (26 cells) AO1 AO1P AO2 AO2P AO3 AO3P AO4 AO4P AO5 AO5P AO6 AO6P AO7 AO7P EN ENP EN3 EN3P EO EOP EON1 EON1P 2-INPUT AND into 3-INPUT NOR 2-WIDE 2-INPUT AND into 2-INPUT NOR 2-INPUT OR into 3-INPUT NAND 2-WIDE 2-INPUT OR into 2-INPUT NAND INVERTING 2 of 3 MAJORITY GATE 2-INPUT AND into 2-INPUT NOR 2-INPUT OR into 2-INPUT NAND 2-INPUT EXCLUSIVE NOR 3-INPUT EXCLUSIVE NOR 2-INPUT EXCLUSIVE OR 2-INPUT OR and 2-INPUT NAND into 2-INPUT NAND 2 - 17 22 27 34 41 46 51 58 65 69 73 77 81 85 141 144 147 154 161 164 167 174 PAGE TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1-5 Functional Index TOSHIBA CELL NAME EO1 EO1P EO3 EO3P FUNCTION 2-INPUT AND and 2-INPUT NOR into 2-INPUT NOR 3-INPUT EXCLUSIVE OR AND GATE (18 cells) PAGE 2 - 181 188 195 202 AN2 AN2P AN3 AN3P AN4 AN4P ND2 ND2P ND3 ND3P ND4 ND4P ND5 ND5P ND6 ND6P ND8 ND8P 2-INPUT AND 3-INPUT AND 4-INPUT AND 2-INPUT NAND 3-INPUT NAND 4-INPUT NAND 5-INPUT NAND 6-INPUT NAND 8-INPUT NAND OR GATE (18 cells) 2-1 3 5 8 11 14 759 761 763 766 769 772 775 779 783 787 791 796 NR2 NR2P NR3 NR3P NR4 NR4P NR5 NR5P NR6 NR6P NR8 NR8P OR2 OR2P OR3 OR3P 2-INPUT NOR 3-INPUT NOR 4-INPUT NOR 5-INPUT NOR 6-INPUT NOR 8-INPUT NOR 2-INPUT OR 3-INPUT OR 2 - 801 803 805 808 811 814 817 821 825 829 833 838 843 845 847 850 1-6 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Functional Index CELL NAME OR4 OR4P 4-INPUT OR FUNCTION PAGE 2 - 853 856 INVERTER / INTERNAL BUFFER (18 cells) B2I B2IP B3I B3IP B4I B4IP B5I B5IP IDRV4 IDRV8 IDRV16 IDRV24 IV IVP IVA IVAP IVDA IVDAP INVERTER into 3 PARALLEL INVERTERS 2 PARALLEL INVERTERS into 2 PARALLEL INVERTERS 4 PARALLEL INVERTERS 3 PARALLEL INVERTERS INTERNAL CLOCK DRIVER (equal 4mA DRIVER) (equal 8mA DRIVER) (equal 16mA DRIVER) (equal 24mA DRIVER) 2 - 101 103 105 107 109 111 113 115 527 529 531 533 535 537 539 541 543 545 INVERTER with PARALLEL Pch TRANSISTORS INVERTER into INVERTER TRI-STATE INTERNAL BUFFER (6 cells) BTS4 BTS4P BTS5 BTS5P PDI PUI TRI-STATE INTERNAL BUFFER ( HIGH ENABLE ) TRI-STATE INTERNAL INVERTING BUFFER ( HIGH ENABLE ) INTERNAL PULL-DOWN for PREVENTING BUS FLOATING INTERNAL PULL-UP for PREVENTING BUS FLOATING LATCH (20 cells) 2 - 89 92 95 98 859 861 LD1 LD1P LD2 LD2P LD3 LD3P LD4 LD4P LS1 LS1P D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) ( LOW ENABLE ) D-TYPE TRANSPARENT LATCH with CLEAR ( HIGH ENABLE ) ( LOW ENABLE ) D-TYPE TRANSPARENT LATCH with SCAN TEST INPUT 2 - 547 552 557 562 567 574 581 588 595 609 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1-7 Functional Index TOSHIBA CELL NAME LS2 LS2P LSR1 LSR1P LSR2 LSR2P YLD1 YLD14B YLD2 YLD24B FUNCTION PAGE 2 - 623 650 677 683 689 694 936 941 957 962 SR-LATCH with SEPARATE GATE SD and RD SR-LATCH with COMMON GATE SD and RD D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) QUAD D-TYPE TRANSPARENT LATCH (HIGH ENABLE ) D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) QUAD D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) FLIP -FLOP (38 cells) FD1 FD1P FD1SF FD1SFP FD1S FD1SP FD2 FD2P FD2SF FD2SFP FD2S FD2SP FD3 FD3P FD3SF FD3SFP FD3S FD3SP FD4 FD4P FD4SF FD4SFP FD4S FD4SP FJK1 FJK1P FJK2 FJK2P FJK3 FJK3P D-TYPE FLIP FLOP with Independent two-phase SCAN clock with common single-phase SCAN clock D-TYPE FLIP FLOP with CLEAR with Indepedent two-phase SCAN clock with common single-phase SCAN clock D-TYPE FLIP FLOP with CLEAR and PRESET with Independent two-phase SCAN clock with common single-phase SCAN clock D-TYPE FLIP FLOP with PRESET with Independent two-phase SCAN clock with common single-phase SCAN clock J-K FLIP FLOP with CLEAR with CLEAR and PRESET 2 - 249 253 257 267 277 283 289 295 301 314 327 335 343 351 359 374 389 399 409 415 421 434 447 455 463 467 471 477 483 491 1-8 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Functional Index CELL NAME FT2 FT2P FT4 FT4P YFD1 YFD2 YFD3 YFD4 FUNCTION TOGGLE FLIP FLOP with CLEAR with PRESET D-TYPE FLIP FLOP with CLEAR with CLEAR and PRESET with PRESET DECODER (8 cells) PAGE 499 504 509 514 911 915 921 930 D24GL D24GLP D24L D24LP YD24GH YD24GHP YD24H YD24HP 2 TO 4 DECODER ( GATED OUTPUTS ACTIVE LOW ) ( OUTPUT ACTIVE LOW ) 2 TO 4 DECODER ( GATED OUTPUTS ACTIVE HIGH ) ( OUTPUTS ACTIVE HIGH ) 2 - 117 124 131 136 875 882 889 894 ADDER (6 cells) FA1 FA1P FA1A FA1AP HA1 HA1P FULL ADDER 2 - 209 219 229 239 519 523 HALF ADDER MULTIPLEXER (12 cells) MUX21H MUX21HP MUX21L MUX21LP MUX41 MUX41P MUX81 MUX81P YMUX24H YMUX24HP YMUX24L YMUX24LP 2 TO 1 MULTIPLEXER 2 TO 1 INVERTING MULTIPLEXER 4 TO 1 MULTIPLEXER 8 TO 1 MULTIPLEXER QUAD 2 TO 1 MULTIPLEXER ( INVERTED OUTPUT ) 2 - 699 702 705 708 711 718 725 742 978 987 996 1005 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1-9 Functional Index TOSHIBA CELL NAME FUNCTION INPUT BUFFER (82 cells) PAGE DRVC4x DRVC4xFS DRVC8x DRVC8xFS DRVC16x DRVC16xFS DRVSC4x DRVSC8x DRVSC16x DRVT4x DRVT4xFS DRVT8x DRVT8xFS DRVT16x DRVT16xFS IBUFx IBUFxFS IBUFNx IBUFNxFS IBUFNHx IBUFNHxFS IPCIx SMTCx SMTCxFS SMTTx SMTTxFS TLCHNx TLCHNxFS TLCHNHx TLCHNHxFS TLCHTHx TLCHTHxFS CLOCK DRIVER with CMOS LEVEL INPUT BUFFER (equal 4mA DRIVER) with FAILSAFE (equal 8mA DRIVER) with FAILSAFE (equal 16mA DRIVER) with FAILSAFE CLOCK DRIVER with CMOS LEVEL SCHMITT INPUT BUFFER (equal 4mA DRIVER) (equal 8mA DRIVER) (equal 16mA DRIVER) CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER (equal 4mA DRIVER) with FAILSAFE (equal 8mA DRIVER) with FAILSAFE (equal 16mA DRIVER) with FAILSAFE CMOS LEVEL INPUT BUFFER with FAILSAFE CMOS LEVEL INVERTED INPUT BUFFER with FAILSAFE CMOS LEVEL INVERTED INPUT BUFFER HIGH-SPEED with FAILSAFE PCI ( Peripheral Component Interconnect) BUS DRIVER SCHMITT TRIGGER CMOS LEVEL INPUT BUFFER with FAILSAFE SCHMITT TRIGGER LVTTL LEVEL INPUT BUFFER with FAILSAFE LVTTL LEVEL INVERTED INPUT BUFFER with FAILSAFE LVTTL LEVEL INVERTED INPUT BUFFER HIGH-SPEED with FAILSAFE LVTTL LEVEL INPUT BUFFER HIGH-SPEED with FAILSAFE OUTPUT BUFFER (14 cells) 3 - 213 216 219 222 225 228 231 234 237 240 243 246 249 252 255 258 261 264 267 270 273 276 278 281 284 287 290 293 296 299 302 305 B2 B4 B4H OUTPUT BUFFER ( 2mA DRIVE ) 4mA HIGH-SPEED 3 - 185 187 189 1 - 10 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Functional Index CELL NAME B4R B8 B8H B8R B16 B16H B16R B24 B24H B24R BPCI FUNCTION SLEW RATE CONTROL 8mA HIGH-SPEED SLEW RATE CONTROL 16mA HIGH-SPEED SLEW RATE CONTROL 24mA HIGH-SPEED SLEW RATE CONTROL PCI ( Peripheral Component Interconnect ) BUS OUTPUT BUFFER TRI-STATE OUTPUT BUFFER (19 cells) PAGE 3 - 191 193 195 197 199 201 203 205 207 209 211 BT2 BT2ODFS BT4 BT4H BT4R BT4ODFS BT8 BT8H BT8R BT8ODFS BT16 BT16H BT16R BT16ODFS BT24 BT24H BT24R BT24ODFS BTPCI TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) OPEN DRAIN with FAILSAFE HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 2mA 4mA 8mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 16mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 24mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE PCI ( Peripheral Component Interconnect ) BUS TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) BIDIRECTIONAL OUTPUT BUFFER (355 cells) 3 - 89 95 98 104 110 116 119 125 131 137 140 146 152 158 161 167 173 179 182 BD2x BD2xODFS BD4x BD4Hx BD4Rx BD4xODFS BD8x BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) OPEN DRAIN with FAILSAFE HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 2mA 4mA 8mA 3-1 6 10 15 20 25 29 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 11 Functional Index TOSHIBA CELL NAME BD8Hx BD8Rx BD8xODFS BD16x BD16Hx BD16Rx BD16xODFS BD24x BD24Hx BD24Rx BD24xODFS BDPCIx FUNCTION HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 16mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 24mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE PCI ( Peripheral Component Interconnect ) BUS BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) CLOCK BUFFER (6 cells) PAGE 3 - 34 39 44 48 53 58 63 67 72 77 82 86 YCAN2 YCAN2P YCBUF YCBUFP YCOR2 YCOR2P CLOCK BUFFER with 2-INPUT AND CLOCK BUFFER with 2-INPUT OR DELAY BUFFER (6 cells) 2 - 863 865 867 869 871 873 YDLY1 YDLY1P YDLY2 YDLY2P YDLY3 YDLY3P DELAY BUFFER 2 - 899 901 903 905 907 909 Note: `x' can be substituted by characteristics, for example, input type, pull-up and pull-down, etc. on I/O. Please see "How to Find Target Input Buffer" on page 1-17, "How to Find Target Output Buffer" on page 1-20 and "How to Find Target Bidirectional Buffer" on page 1-23". 1 - 12 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Drive Options for Internal Macrocells Drive Options for Internal Macrocells This section describes types of macrocells that are typical macrocells, clock drivers. Typical Macrocells The complete set of internal macrocells available for our previous gate array series is usable in the TC200G/E designs. Like our previous series, the TC200G/E macrocells are available with two drive options: standard drive and power (double) drive. The form for internal macrocell type names is: Where: =denotes the generic function of a macrocell. =Null (i.e, no letter) for standard drive types; "P" for power-drive types. Example: ND2 ND2P Standard-drive 2-input NAND gate Power-drive 2-input NAND gate Use power drive types with heavy output load. However, be sure not to overuse power drive cells because they require a greater load drive capability of standard drive type cell. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 13 Drive Options for Internal Macrocells TOSHIBA Clock Driver Four types of internal buffers are available to buffer heavily loaded internal signals IDRV4, IDRV8, IDRV16, and IDRV24. These buffers use largegeometry transistors in I/O slot regions to provide high fan-out on-chip drive capability. Use the appropriate one consistent with your needs. 1 - 14 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Drive Options for I/O Macrocells Drive Options for I/O Macrocells I/O buffer lines include input, output, and bidirectional types. The paragraphs that follow discuss drive options available for I/O buffers. Input Buffer * * Standard type: High-speed type: This type is effective in reducing noise. Use high-speed (or high-drive) input buffers to accommodate your critical path needs. High-speed options are available for part of the input buffers. Cell names have a suffix of "H". * Example: IBUFN IBUFNH (Standard type) (High-speed type) TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 15 Drive Options for I/O Macrocells TOSHIBA Output Buffer * Standard type: Standard drive types offer a drive capability that stands between comparable high-speed and slewrate-control types. Use high-speed(or high-drive)types to accommodate your critical path needs. High-speed options are available for output buffers with drive capability of no less than 4 mA. The cell name has a qualifier of "H" in it. Use output buffers with internal slew rate control circuit to minimize unwanted voltage transients. Slew rate control options are available for output buffers with drive capability of no less than 4 mA. The cell name has a qualifier of "R" in it. * High-speed type: * Slew rate type: * Example: B4 B4H B4R (Standard type) (High-speed type) (Slew rate type) Bidirectional Buffer Bidirectional buffers contain various type which combine input buffers and output buffers described above. 1 - 16 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA How to Find Target Input Buffer How to Find Target Input Buffer This section decsribes the input buffer naming conventions so that you can find target input buffers quickly. Naming standard Drive Input Buffer .e.g. IBUF U FS <> <> <> <> IBUF: IBUFN: IBUFNH: TLCHTH: TLCHN: TLCHNH: SMTC: SMTT: IPCI: CMOS level CMOS level inverted CMOS level inverted high speed LVTTL level high speed LVTTL level inverted LVTTL level inverted high speed SCHMITT TRIGGER CMOS level SCHMITT TRIGGER LVTTL level PCI local bus output buffer TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 17 How to Find Target Input Buffer TOSHIBA <> null: D: U: <> null: FS: no option pull-down resistor pull-up resistor normal failsafe input Naming High Drive Input Buffers .e.g. DRV SC 4 U FS Clock Driver (Fixed) <> <> <> <> <> T: C: SC: LVTTL Level CMOS Level SCHMITT TRIGGER CMOS level <> 4: equal `IDRV4' 8: equal `IDRV8' 16: equal `IDRV16' <> null: D: U: <> null: FS: without pull resistance pull-down resistor pull-up resistor normal failsafe input 1 - 18 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA How to Find Target Input Buffer Usable Input Buffer Configuration Table 1-1 Usable Input Buffer Configuration Without Pull Resistance IBUF IBUFFS IBUFN IBUFNFS IBUFNH IBUFNHFS SMTC SMTCFS TLCHTH TLCHTHFS TLCHN TLCHNFS TLCHNH TLCHNHFS SMTT SMTTFS IPCI DRVC4 DRVC4FS DRVC8 DRVC8FS DRVC16 DRVC16FS DRVSC4 DRVSC8 DRVSC16 DRVT4 DRVT4FS DRVT8 DRVT8FS DRVT16 DRVT16FS With Pull-down IBUFD IBUFDFS IBUFND IBUFNDFS IBUFNHD IBUFNHDFS SMTCD SMTCDFS TLCHTHD TLCHTHDFS TLCHND TLCHNDFS TLCHNHD TLCHNHDFS SMTTD SMTTDFS IPCID DRVC4D DRVC4DFS DRVC8D DRVC8DFS DRVC16D DRVC16DFS DRVSC4D DRVSC8D DRVSC16D DRVT4D DRVT4DFS DRVT8D DRVT8DFS DRVT16D DRVT16DFS With Pull-up IBUFU -- IBUFNU -- IBUFNHU -- SMTCU -- TLCHTHU -- TLCHNU -- TLCHNHU -- SMTTU -- IPCIU DRVC4U -- DRVC8U -- DRVC16U -- DRVSC4U DRVSC8U DRVSC16U DRVT4U -- DRVT8U -- DRVT16U -- Page 3 - 258 3 - 261 3 - 264 3 - 267 3 - 270 3 - 273 3 - 278 3 - 281 3 - 302 3 - 305 3 - 290 3 - 293 3 - 296 3 - 299 3 - 284 3 - 287 3 - 276 3 - 213 3 - 216 3 - 219 3 - 222 3 - 225 3 - 228 3 - 231 3 - 234 3 - 237 3 - 240 3 - 243 3 - 246 3 - 249 3 - 252 3 - 255 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 19 How to Find Target Output Buffer TOSHIBA How to Find Target Output Buffer This section describes the output buffer naming conventions so that you can find target output buffers quickly. Naming Two-state Output Buffer .e.g. B 4 R < > <> <> < > B: <> 2: 4: 8: 16: 24: PCI: unidirectional output buffer (Fixed) 2 mA drive 4 mA drive 8 mA drive 16mA drive 24mA drive PCI local bus output buffer 1 - 20 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA How to Find Target Output Buffer <> null: H: R: no option high-speed type slew rate type Usable Two-state Output Configuration Table 1-2 Usable Output Buffer Configuration Standard Type B2 B4 B8 B16 B24 BPCI High-speed Type -- B4H B8H B16H B24H -- Slew Rate Type -- B4R B8R B16R B24R -- Drive(mA) 2 4 8 16 24 -- Page 3 - 185 3 - 187 3 - 193 3 - 199 3 - 205 3 - 211 Naming Tri-state Output Buffer .e.g. BT 4 ODFS <> <> <> <> BT: tri-state output buffer (Fixed) <> 2: 4: 8: 16: 24: PCI: 2 mA drive 4 mA drive 8 mA drive 16 mA drive 24 mA drive PCI local bus output buffer TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 21 How to Find Target Output Buffer TOSHIBA <> null: H: R: ODFS: no option high-speed type slew rate type open drain, failsafe Usable Tri-State Output Buffer Configuration Table 1-3 Usable Tri-State Output Buffer Configuration Standard BT2 BT4 BT8 BT16 BT24 BTPCI High-speed -- BT4H BT8H BT16H BT24H -- Slew Rate -- BT4R BT8R BT16R BT24R -- Open Drain Failsafe BT2ODFS BT4ODFS BT8ODFS BT16ODFS BT24ODFS -- Page 3 - 89 ~ 94 3 - 95 ~ 118 3 - 119 ~ 139 3 - 140 ~ 160 3 - 161 ~ 181 3 - 182 1 - 22 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA How to Find Target Bidirectional Buffer How to Find Target Bidirectional Buffer This section describes the bidirectional buffer naming conventions so that you can find target bidirectional buffers quickly. Naming Bidirectional Output Buffer .e.g. BD 16 R SC D <> <> <> <> <> <> BD: bidirectional output buffer (Fixed) <> 2: 4: 8: 16: 24: PCI: 2 mA drive 4 mA drive 8 mA drive 16 mA drive 24 mA drive PCI local bus input output buffer TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 23 How to Find Target Bidirectional Buffer TOSHIBA <> C: CMOS level CN: CMOS level inverted CNH: CMOS level inverted high-speed TH: TN: TNH: SC: ST: <> null: H: R: <> null: U: D: ODFS: LVTTL level high speed LVTTL level inverted LVTTL level inverted high-speed schmitt trigger CMOS level schmitt trigger LVTTL level no option high-speed type slew rate control type no option with pull-up with pull-down open drain, failsafe 1 - 24 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA How to Find Target Bidirectional Buffer Usable Bidirectional Output Buffer Configuration Table 1-4 CMOS Input Type H C -- q q q q H C D -- q q q q H C U -- q q q q R C -- q q q q R C D -- q q q q R C U -- q q q q Drive (mA) 2 4 8 16 24 C BD2 BD4 BD8 BD16 BD24 q q q q q C D q q q q q C U q q q q q C ODFS q q q q q Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 Table 1-5 CMOS Input with Inverted Type H CN -- q q q q H CN D -- q q q q H CN U -- q q q q R CN -- q q q q R CN D -- q q q q R CN U -- q q q q Drive (mA) 2 4 8 16 24 CN BD2 BD4 BD8 BD16 BD24 q q q q q CN D q q q q q CN U q q q q q CN ODFS q q q q q Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 CNH BD2 BD4 BD8 BD16 BD24 q q q q q CNH D q q q q q CNH U q q q q q CNH ODFS q q q q q H CNH -- q q q q H CNH D -- q q q q H CNH U -- q q q q R CNH -- q q q q R CNH D -- q q q q R CNH U -- q q q q Drive (mA) 2 4 8 16 24 Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 Table 1-6 CMOS SCHMITT TRIGGER Input Type H SC -- q q q q H SC D -- q q q q H SC U -- q q q q R SC -- q q q q R SC D -- q q q q R SC U -- q q q q Drive (mA) 2 4 8 16 24 SC BD2 BD4 BD8 BD16 BD24 q q q q q SC D q q q q q SC U q q q q q SC ODFS q q q q q Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 25 How to Find Target Bidirectional Buffer TOSHIBA Table 1-7 LVTTL Input Type H TH -- q q q q H TH D -- q q q q H TH U -- q q q q R TH -- q q q q R TH D -- q q q q R TH U -- q q q q Drive (mA) 2 4 8 16 24 TH BD2 BD4 BD8 BD16 BD24 q q q q q TH D q q q q q TH U q q q q q TH ODFS q q q q q Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 Table 1-8 LVTTL Input with Inverted Type H TN -- q q q q H TN D -- q q q q H TN U -- q q q q R TN -- q q q q R TN D -- q q q q R TN U -- q q q q Drive (mA) 2 4 8 16 24 TN BD2 BD4 BD8 BD16 BD24 q q q q q TN D q q q q q TN U q q q q q TN ODFS q q q q q Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 H TNH TNH TNH TNH TNH H TNH H TNH R TNH R TNH R TNH BD2 BD4 BD8 BD16 BD24 q q q q q D q q q q q U q q q q q ODFS q q q q q -- q q q q D -- q q q q U -- q q q q -- q q q q D -- q q q q U -- q q q q Drive (mA) 2 4 8 16 24 Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 Table 1-9 LVTTL SCHMITT TRIGGER Input Type H ST -- q q q q H ST D -- q q q q H ST U -- q q q q R ST -- q q q q R ST D -- q q q q R ST U -- q q q q Drive (mA) 2 4 8 16 24 ST BD2 BD4 BD8 BD16 BD24 q q q q q ST D q q q q q ST U q q q q q ST ODFS q q q q q Page 3-1~9 3 - 10 ~ 28 3 - 29 ~ 47 3 - 48 ~ 66 3 - 67 ~ 85 1 - 26 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA How to Find Target Bidirectional Buffer Table 1-10 Special Type Standard BDPCI with Pull-down BDPCID with Pull-up BDPCIU Page 3 - 86 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 27 Oscillator Cells TOSHIBA Oscillator Cells This section describes the notation for configuring crystal oscillator circuit using oscillator cells. Naming Oscillator Cell * Standard Type OSC4D OSC6D (oscillator with stop control) (oscillator with stop control) * Cornered Type OSCX05 OSCX30 (corner oscillator with feedback resistor) (corner oscillator with feedback resistor) 1 - 28 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Oscillator Cells How to Find Target Oscillator Cells The following table shows the availability of the oscillator cells. Use the appropriate oscillator cells with your need. When appropriate oscillator cells are not used, power dissipation may increase, and the oscillator cells might not behave. Table 1-11 Oscillator Specifications Frequency (MHz) OSC4D OSC6D OSCX05 OSCX30 Stop Control q q q q Feedback Resistor -- -- q q I/O counts Page * * * : Restricted to pre-determined I/O Slot locations Notes on Crystal Oscillator * When designing a system using a crystal oscillator, the unstable period which is found on oscillation starting time or oscillation stopping time should be taken into account. During logic simulation, specify the CMOS level to the Z output of the oscillator cell. Since the Z output of the oscillator cell is to drive the load on the LSI tester prove head, be a wore of the propagation delays for the Z to ZI path. Since the oscillator cell is susceptible to current noise from another signal, its input and output pin should be placed between VDD and VSS pins as shown on Figure 1-1 on page 1-30 and Figure 1-2 on page 1-32 Make the lengths of the wires between parts as short as possible, and do not allow the wires to cross. * * * * TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 29 Oscillator Cells TOSHIBA Oscillator Application Note Figure 1-1 and Figure 1-2 show examples of application circuits with OSC4D and OSCX05, respectively. Table 1-12 ,Table 1-13, Table 1-14 and Table 1-15 give the recommended circuit parameters and electrical characteristics for each of those oscillator cells. The external CR and electric characteristics depend on the type of a crystal oscillator used and the soldering states of the devices on the PC board. Contact the crystal oscillator supplier for details. Figure 1-1 An example of application circuit (OSC4D) OSC4D E Internal IC V D D I/O X T B RFB Z X T O ROUT ZI V S S CIN X'tal COUT 1 - 30 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Oscillator Cells Table 1-12 Cell Name OSC4D Recommended Oscillation Condition Parameter frequency crystal impedance feedback resistor output resistor external condenser frequency crystal impedance feedback resistor output resistor external condenser Symbol f CI RFB ROUT CIN, COUT f CI RFB ROUT CIN, COUT Recommended value Unit OSC6D Table 1-13 Cell Name OSC4D Electrical specification (VSS=0V, VDD=3.3V, Typ.) Parameter oscillation starting voltage oscillation holding voltage supply current oscillation starting time oscillation starting voltage oscillation holding voltage supply current oscillation starting time Symbol VSTA VHOLD IDD TSTA VSTA VHOLD IDD TSTA Condition f= f= f= f= f= f= f= f= f= f= f= f= Typ. Unit OSC6D Please contact Toshiba DesignCenter for the values in shadowed columns. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 31 Oscillator Cells TOSHIBA Figure 1-2 An example of application circuit (OSCX05) Rfb Internal IC E A V D D 3 X T I Z X T O ROUT ZI V S S 3 CIN X'tal COUT Table 1-14 Cell Name OSCX05 OSCX30 Recommended Oscillation Condition Parameter Symbol frequency f crystal impedance CI output resistor ROUT external condenser CIN, COUT frequency f crystal impedance CI output resistor ROUT external condenser CIN, COUT Recommended value Unit Table 1-15 Cell Name OSCX05 Electrical specification (VSS=0V, VDD=3.3V, Typ.) Parameter oscillation starting voltage oscillation holding voltage supply current oscillation starting time oscillation starting voltage oscillation holding voltage supply current oscillation starting time Symbol VSTA VHOLD IDD TSTA VSTA VHOLD IDD TSTA Condition f =32kHz Typ. Unit OSC6D f =10MHz Please contact Toshiba DesignCenter for the values in shadowed columns. 1 - 32 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Oscillator Cells Corner Oscillator Cell The pin locations of OSCX05 and OSCX30 which are the corner oscillator cells are fixed at the corner of the package. Some packages may allow no package lead for the corner oscillator. Contact your Design Center for package leads allowed for the corner oscillator. Figure 1-3 shows the pins on the 144pin flat package (LFP144) reserved for these cornered oscillator cells. Figure 1-3 Pin Assignment Example of a Cornered Oscillator (LFP144 face up) XTI 109 108 XTO 107 VSS3 VDD3 110 144 XTO VSS3 1 2 VSS3 VSS3 XTI 35 36 37 XTO 38 VSS3 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) XTO XTI 143 Index Mark 74 VSS3 73 XTI 72 VDD3 71 1 - 33 DC Characteristics TOSHIBA DC Characteristics This section describes the characteristics for currents of output buffers and threshold voltage of input buffers, and pull-up, pull-down transistor DC characteristics. Output Characteristics Figure 1-4 shows VOH-IOH characteristics. Figure 1-5 shows VOL-IOL characteristics. 1 - 34 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA DC Characteristics Figure 1-4 VOH-IOH CHARACTERISTICS (VDD=3.3V, Ta=25C, typ.) Figure 1-5 VOL-IOL CHARACTERISTICS (VDD=3.3V, Ta=25C, typ.) TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 35 DC Characteristics TOSHIBA Threshold Characteristics Figure 1-6 and Figure 1-7 show CMOS level threshold characteristics. Figure 1-8 and Figure 1-9 show LVTTL level threshold characteristics. Figure 1-6 CMOS level threshold characteristics Figure 1-7 SCHMITT TRIGGER CMOS level threshold characteristics 1 - 36 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA DC Characteristics Figure 1-8 LVTTL level threshold characteristics Figure 1-9 SCHMITT TRIGGER LVTTL level threshold characteristics TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 37 DC Characteristics TOSHIBA Pull-Up, Pull- Down Characteristics Figure 1-10 shows pull-up transistor DC characteristics. Figure 1-11 shows pull-down transistor DC characteristics. Figure 1-10 Pull-up transistor DC characteristics (VDD=3.3V, Ta=25C, typ.) Figure 1-11 Pull-down transistor DC characteristics (VDD=3.3V, Ta=25C, typ.) 1 - 38 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Input Capacitance Values for I/O Buffers Input Capacitance Values for I/O Buffers This section gives the input capacitances associated with the input pins of input buffers and the output pins of tri-state output buffers in the high-impedance state. Input capacitance values are used to calculate I/O delays TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 39 Input Capacitance Values for I/O Buffers TOSHIBA . Table 1-16 Type Input buffers Input Capacitance Values for I/O Buffers Cell Name DRVC4x, DRVC8x, DRVC16x DRVSC4x, DRVSC8x, DRVSC16x DRVT4x, DRCT8x, DRVT16x IBUFx, IBUFNx, IBUFNHx SMTCx, SMTTx TLCHNx, TLCHNHx, TLCHTHx IPCIx DRVC4xFS, DRVC8xFS, DRVC16xFS DRVT4xFS, DRVT8xFS, DRVT16xFS IBUFxFS, IBUFNxFS, IBUFNHxFS SMTCxFS, SMTTxFS TLCHNxFS, TLCHNHxFS, TLCHTHxFS Tri-state output Buffers BT2, BT4, BT4H, BT4R, BT8, BT8H, BT8R, BT16, BT16H, BT16R, BTPCI BT24, BT24H, BT24R BT2ODFS, BT4ODFS, BT8ODFS, BT16ODFS BT24ODFS Bidirectional Biffers BD2x, BD4x, BD4Hx, BD4Rx, BD8x, BD8Hx, BD8Rx, BD16x, BD16Hx, BD16Rx, BDPCIx BD24x, BD24Hx, BD24Rx BD2xODFS, BD4xODFS, BD8xODFS, BD16xODFS BD24xODFS Pin Name A Capacitance (pF) 5.56 A 2.78 Z Z Z Z IO IO IO IO 5.56 9.13 2.78 3.56 5.56 9.13 2.78 3.56 1 - 40 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA The Power and Ground Lines The Power and Ground Lines The TC200G/E series has three types of VSS buses and two types of VDD buses. The positions of standard power of these power lines are fixed depending on combination of a package and master chip. Some additional power pins are required under the condition of input buffers, output buffers or simultaneous switchings. Please contact Toshiba Design Center for the details. Figure 1-12 Power Supply Lines VDD VDD3 Internal Logic Circuit Output Buffer VSS VSS2 VSS3 VDD VDD3 VSS VSS2 VSS3 : : : : : a power bus for external output buffers and internal macrocells a power bus for external input buffers a ground bus for external output buffers a ground bus for internal macrocells a ground bus for external input buffers Input Buffer TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 41 Delay Estimation TOSHIBA Delay Estimation As feature sizes shrink, timing accuracy plays a more critical role in the success of deep-submicron ASIC technologies. You must use as accurate timing estimations as possible in the early stage of the design to minimize design iterations involved in complex designs. To this end, the accuracy of the libraries and the delay equation was enhanced for the release of our sign-off verification systems, Verilog-XL Sign-off (VSO) System and VITAL Sign-off System. The advanced technical features for delay prediction include Nonlinear Delay Models (NLDMs) and State-Dependent Path Delays (SDPDs). The NLDMs and SDPDs combine to realize sign-off-accuracy simulation that is "very close" to Spice results and representative of actual silicon. State-Dependent Path Delays (SDPDs) The new modeling methodology uses state-dependent path delays (SDPDs), which describe pin-to-pin delays whose validity is conditioned by other pins. This feature is illustrated below in Figure 1-13, where input A is at logic 1, and when input C makes a 0-to-1 transition, output Z goes low. The signal flows indicated by bold paths show that the C-to-Z timing arc is conditioned by the state at input B. 1 - 42 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation Figure 1-13 State-Dependent Path Delays (SDPDs) Gate-Level Network A B C Transistor-Level Network A B Z A B Z Z AO7 C A 1 B 0 C 0-1 Z 1-0 C-to-Z Delay: 0.38 ns C A 1 B 1 C 0-1 Z 1-0 C-to-Z Delay: 0.31 ns TC200G/E Series Load=5.0 LU Input Slew=0.38 ns Non-linear Delay Model In the deep-submicron world, the traditional linear scaling of the fanout time estimates are not accurate enough. Wire delays are beginning to dominate designs, and the traditional method can not accurately model interconnect wires. The new delay estimation method interprets the input wave as a slope, based on table lookup and interpolation. Figure 1-14 illustrates the procedures Toshiba uses to extract delay table data. This example shows the steps for creating a lookup table for the rise delay of a 2-input NAND gate. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 43 Delay Estimation TOSHIBA Figure 1-14 Extracting Delay Table Data for an 2-input NAND Gate A B ND2 Z CL Tf Input B Delay extraction is performed with the input transition time of input B and the output load of CL set at four different points each. TpLH Output Z 1.0 d33 d32 Tf=3.0ns(S3) TpLH (ns) 0.5 d30 d20 d10 d31 d23 d22 d21 d12 d11 d01 d02 d03 d13 Tf=1.0ns(S2) Tf=0.38ns(S1) Tf=0.01ns(S0) Tf: input transition time 0 01 d00 5 (C1) 10 (C2) Output Load (LU) 30 (C3) (C0) C0 S0 S1 S2 S3 d00 d10 d20 d30 C1 d01 d11 d21 d31 C2 d02 d12 d22 d32 C3 d03 d13 d23 d33 Four-by-four points of the delay curves are translated into a look-up table. 1 - 44 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation Figure 1-15 illustrates by example how the macrocell propagation delay is computed using the new delay modeling method. Figure 1-15 Table Lookup and Interpolation Propagation Delay Interpolated Value 1.0 0.01 0.378 0.42 1.00 Sle w ut 5.0 5.372 10.0 Output Load 30.0 3.00 This technique uses a two-dimensional table indexed by output load and input slew rate. The output load is either estimated using library-defined wire load models or back-annotated from the physical layout of a design. The slew rate (or the transition time) of a gate's input pin is computed by evaluating the output delay of the previous gate. Assuming the output load is 5.372 LU, and the input slew rate is 0.378 ns, four bounding-table values (or corner values in the figure) are found by examining the index values. The delay value is then determined by "interpolating" between these four points. In Figure 1-15, the black dots represent points that are defined in the lookup table in the technology library. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) Inp 1 - 45 Delay Estimation TOSHIBA Non-linear Delay Calculation Example The following example illustrates the process to determine the fall delay across the A-to-Z timing arc of the NAND cell (ND2) in Figure 1-16. Figure 1-16 Non-linear Delay Calculation Example A IV Z A AN2 Z IV Z A ND2 Z A IV Z IV Z A If you have a need to calculate a macrocell's propagation delay manually, use the following steps. 1. Calculate the total capacitive load on the ND2's output pin. a. Determine the total fanout load. It represents the sum of loading units of the driven macrocell input pins. Input loading unit numbers are listed in the "INPUT LOAD" section of each macrocell data sheet. Fanout load associated with the ND2's output pin is calculated as: Fanout = 1.0+ 1.0= 2.0(LU) * Remember to include the INPUT CAPACITANCE value for tri-state drivers. b. Determine the estimated wire load (EWL), referring to an appropriate equation in Table 1-17, Table 1-18, Table 1-19 and Table 1-20. If a design is implemented using array TC200G10, it is calculated as: EWL= 1.349 x 2 + 0.674 =3.372 (LU) Therefore, the total capacitive load (Ctotal) on the ND2's output pin is: Ctotal(ND2) = 2.0+ 3.372 = 5.372 (LU) 1 - 46 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation 2. Calculate the slew rate (or transition time) of the ND2's A input. a. Calculate the capacitive load on the AN2's output pin, using the sequence shown at step 1. Ctotal(AN2) = fanout + EWL = (1.0 + 1.0+ 1.03) + (1.349 x 3 + 0.674) = 7.751 (LU) b. The equation for calculating the input slew rate (Slew) is: Slew(ND2)= FACTOR(AN2) x Ctotal(AN2) + CONSTANT(AN2) FACTOR and CONSTANT parameters are defined, for each timing arc and transition, in the SLEW FACTOR sections in each library cell data sheet. When the ND2's output rises, the driving output of the previousstage AN2 falls. Obtain the FACTOR and CONSTANT parameters, taking care to use the figures of corresponding output conditions(s). Referring to the AN2 page, Slew(ND2) is calculated as: Slew(ND2) = 0.0397 x 7.751 + 0.07 = 0.378 (ns) 3. Referring to the PATH DELAY section of the ND2 page, choose four neighboring points for interpolation. The new delay estimation method uses a 4 x 4 lookup table indexed by output load and input slew rate. Use these two values to index into ND2's rise path delay table. Four bounding-table values (or corner values in Figure 1-15) used for interpolation are found by examining the index values. PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.11 0.13 0.15 5.00 0.23 0.26 0.30 0.37 10.00 0.40 0.43 0.49 0.60 30.00 1.09 1.12 1.17 1.35 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 47 Delay Estimation TOSHIBA 4. Interpolate the bounding-table values. Use the capacitive-load and slew-rate values computed at step 1 and step 2 to choose a table cell from the following interpolation matrix, where C0 to C3 are the capacitance index values in the x-axis, and S0 to S3 are the slewrate index values in the y-axis in the PATH DELAY table. C0 d00 cell 00 d10 cell 10 d20 cell 20 d30 C1 d01 cell 01 d11 cell 11 d21 cell 21 d31 d32 d22 d12 C2 d02 C3 d03 cell 02 d13 cell 12 d23 cell 22 d33 *S0,S1,S2,S3: Input Slew C0,C1,C2,C3: Output Load S0 S1 S2 S3 Cell Selection cell 00 ( sS1, cC1) cell 01 ( sS1, C1The interpolation equation for cell(ij) is: Propagation Delay d=(Xij x s x c + Yij x s + Zij x c + Wij) / Vij where: Xij= + dij - di j+1 - di+1 j + di+1 j+1 Yij= -Cj+1 x dij + Cj x di j+1 + Cj+1x di+1 j - Cj x di+1 j+1 Zij= -Si+1 x dij + Si+1 x di j+1 + Si x di+1 j - Si x di+1 j+1 Wij= + Si+1 xCj+1x dij -Si+1 x Cj x di j+1 -Si x Cj+1 x di+1 j + Si x Cj x di+1 j+1 Vij=(Si+1-Si)( Cj+1- Cj) The output-load/input-slew condition in our example rises into cell(01). Using the above equation, the rise delay (TpLH) across the A-to-Z timing arc of the ND2 in Figure 1-16 is computed as follows: 1 - 48 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation X01 = d01 - d02 - d11 + d12 = 0.23 - 0.40 - 0.26 +0.43 = 0 = -(C2 x d01) + (C1 x d02) + (C2 x d11) - (C1 x d12) = -(10.00 x 0.23) + (5.00 x 0.40) + (10.00 x 0.26) - (5.00 x0.43) = 0.15 = -(S1 x d01) + (S1 x d02) + (S0 x d11) - (S0 x d12) = -(0.38 x 0.23) + (0.38 x 0.40) + (0.01 x 0.26) - (0.01 x 0.43) = 0.063 = (S1 x C2 x d01) - (S1 x C1 x d02) - (S0 x C2 x d11) + (S0 x C1 x d12) = (0.38 x 10.00 x 0.23) - (0.38 x 5.00 x 0.40) - (0.01 x 10.00 x 0.26) + (0.01 x 5.00 x 0.43) = 0.11 = (S1 - S0)(C2 - C1) = (0.38 - 0.01) x (10.00 - 5.00) = 1.85 Y01 Z01 W01 V01 Therefore, d = {(X01 x s x c) + (Y01 x s) + (Z01 x c) + W01} / V01 = {(0 x 0.378 x 5.372) + (0.15 x 0.378) + (0.063 x 5.372) + 0.11} / 1.85 = 0.27 (ns) TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 49 Delay Estimation TOSHIBA Figure 1-17 ND2 Data Sheet TC200G SERIES DATA SHEET ND2 ND2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0997 0.16 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 30.00 0.09 0.23 0.40 1.09 0.11 0.26 0.43 1.12 0.13 0.30 0.49 1.17 0.15 0.37 0.60 1.35 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0654 0.10 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 30.00 0.09 0.24 0.43 1.17 0.15 0.32 0.51 1.25 0.21 0.42 0.63 1.39 0.32 0.62 0.90 1.79 Non-linear Setup/Hold Time Calculation Example The following example illustrates the process to determine the setup time on the D input of the FD1 flip-flop in Figure 1-18. 1 - 50 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation Figure 1-18 Non-linear Setup/Hold Time Calculation Example A B AN2 Z B5I Z D FD1 Q A IV Z CP QN 1. Calculate the input slew rates (or transition times) of the data (D) and clock (CP) pins of the FD1, using the steps discussed in the previous section. CP input: D input: D input: Slewup = 0.185 (ns) Slewup = 0.383 (ns) Slewdn = 0.190 (ns) 2. Referring to the SETUP section of the FD1 page, choose four neighboring points for interpolation. The setup/hold estimation method uses a 4 x 4 lookup table indexed by clock and data slew rates. There are two lookup tables, depending on the data values. Use the clock and data slew rate values to index into the FD1's setup time tables. Four bounding-table values used for interpolation are found by examining the index values. 3. Interpolate the bounding-table values for these two cases, D=High and D=Low, using the equation shown in the previous section. In our example, setup(H) and setup(L) are calculated to be as follows: setup(H) = 0.38 (ns) setup(L) = 0.37 (ns) 4. Use the larger value of the two as the setup time. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 51 Delay Estimation TOSHIBA Figure 1-19 FD1 Data Sheet TC200G SERIES DATA SHEET FD1 FD1 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.352 0.334 0.38 0.388 0.370 1.00 0.448 0.429 3.00 0.641 0.620 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.305 0.339 0.397 0.584 3.00 0.209 0.241 0.295 0.468 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.291 0.323 0.38 0.257 0.289 1.00 0.200 0.232 3.00 0.016 0.048 1.00 0.377 0.343 0.286 0.102 3.00 0.551 0.517 0.460 0.276 CONDITION --WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.305 0.322 0.38 0.269 0.287 1.00 0.209 0.228 3.00 0.016 0.038 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.368 0.336 0.38 0.402 0.369 1.00 0.458 0.426 3.00 0.641 0.609 1.00 0.282 0.315 0.372 0.555 3.00 0.107 0.141 0.198 0.382 1.00 0.352 0.318 0.260 0.074 3.00 0.447 0.416 0.362 0.190 1 - 52 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation Estimated Wiring Load Table Table 1-17 TC200G Series (Double-layer Metal) Double-layer metal Part Number TC200G42 TC200G40 TC200G36 TC200G32 TC200G24 TC200G20 TC200G16 TC200G14 TC200G12 TC200G10 TC200G08 TC200G06 TC200G04 TC200G02 EWL (LU) 2.056xWAY+1.028 1.935xWAY+0.968 1.855xWAY+0.928 1.769xWAY+0.885 1.641xWAY+0.821 1.570xWAY+0.785 1.493xWAY+0.746 1.440xWAY+0.720 1.396xWAY+0.698 1.349xWAY+0.674 1.305xWAY+0.652 1.237xWAY+0.618 1.146xWAY+0.573 1.040xWAY+0.520 Note: "WAY" stands for the number of branches into which the output pin forks. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 53 Delay Estimation TOSHIBA Table 1-18 TC200G Series (Triple-layer Metal) Triple-layer metal Part Number TC200G92 TC200G90 TC200G86 TC200G82 TC200G74 TC200G70 TC200G66 TC200G64 TC200G62 TC200G60 TC200G58 TC200G56 TC200G54 TC200G52 EWL (LU) 1.966xWAY+0.983 1.851xWAY+0.925 1.774xWAY+0.887 1.692xWAY+0.846 1.570xWAY+0.785 1.501xWAY+0.751 1.427xWAY+0.714 1.378xWAY+0.689 1.335xWAY+0.668 1.290xWAY+0.645 1.248xWAY+0.624 1.183xWAY+0.591 1.096xWAY+0.548 0.994xWAY+0.497 Note: "WAY" stands for the number of branches into which the output pin forks. 1 - 54 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation Table 1-19 TC200E Series (Double-layer Metal) Double-layer metal Part Number TC200E020 TC200E040 TC200E060 TC200E080 TC200E100 TC200E120 TC200E140 TC200E160 TC200E180 TC200E200 TC200E220 TC200E240 TC200E260 TC200E280 TC200E300 TC200E320 TC200E340 TC200E360 TC200E380 TC200E400 *TC200E420 EWL (LU) 1.040xWAY+0.520 1.146xWAY+0.573 1.237xWAY+0.618 1.305xWAY+0.652 1.349xWAY+0.674 1.396xWAY+0.698 1.440xWAY+0.720 1.493xWAY+0.746 1.532xWAY+0.766 1.570xWAY+0.785 1.606xWAY+0.803 1.641xWAY+0.821 1.675xWAY+0.837 1.707xWAY+0.854 1.739xWAY+0.869 1.769xWAY+0.885 1.813xWAY+0.907 1.855xWAY+0.928 1.896xWAY+0.948 1.935xWAY+0.968 2.056xWAY+1.028 * : Under development Note: "WAY" stands for the number of branches into which the output pin forks. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 55 Delay Estimation TOSHIBA Table 1-20 TC200E Series (Triple-layer Metal) Triple-layer metal Part Number TC200E580 TC200E600 TC200E620 TC200E640 TC200E660 TC200E680 TC200E700 TC200E720 TC200E740 TC200E760 TC200E780 TC200E800 TC200E820 TC200E840 TC200E860 TC200E880 TC200E900 *TC200E920 EWL (LU) 1.248xWAY+0.624 1.290xWAY+0.645 1.335xWAY+0.668 1.378xWAY+0.689 1.427xWAY+0.714 1.465xWAY+0.733 1.501xWAY+0.751 1.536xWAY+0.768 1.570xWAY+0.785 1.602xWAY+0.801 1.633xWAY+0.816 1.663xWAY+0.832 1.692xWAY+0.846 1.734xWAY+0.867 1.774xWAY+0.887 1.813xWAY+0.907 1.851xWAY+0.925 1.966xWAY+0.983 * : Under development Note: "WAY" stands for the number of branches into which the output pin forks. 1 - 56 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Delay Estimation Variations in Propagation Delays The previous subsections explained how to determine propagation delays under the "nominal" (typical) condition. The nominal condition represents a 3.3V power supply, 25 temperature, and nominal process model. Once the nominal delay is calculated, the best- and worst-case analyses should be made. the best- and worst-case propagation delays of a macrocell are determined by multiplying its nominal delay by appropriate factors called Kfactors(Kf). Process variation could decrease or increase delays. Thus, a multiplier factor called Kp is used to estimate the effect of best- and worst-case processing. Junction Multipliers for Kt and Kv are shown in Figure 1-20. Figure 1-20 Propagation Delay as a Function of Temperature and as a Function on Supply Voltage 1.22 1.29 1.18 1.13 Kt 1.00 0.93 0.81 0.77 -55 -40 0 25 70 85 125 1.00 1.10 Kv 0.92 2.7 3.0 3.3 3.6 Temperature ( C) VDD (Volts) TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 57 Delay Estimation TOSHIBA The formula for calculating the overall K-factor (Kf) is: KpxKtxKv The typical-case, best-case, and worst-case Kf factors are shown in Table 1-21 and Table 1-22. The "commercial" operating conditions are defined below: Worst-case commercial: Best-case commercial: 70 C, 2.7V 0 C, 3.6V It is probable that the supply voltage and junction temperature differ from these standards. The user can calculate K-factors for operating conditions other than the standard ones in a similar manner. Table 1-21 TC200G Series Maximum Delay Factor (Kf) VDD 3.3V0.3V 3.0V0.3V Kf (Ta=0 C~70C) Best-case 0.51 0.56 Typical-case 1.00 (1.10) Worst-case 1.68 1.86 Table 1-22 TC200E Series Maximum Delay Factor (Kf) VDD 3.3V0.3V 3.0V0.3V Kf (Ta=0 C~70C) Best-case 0.51 0.56 Typical-case 1.00 (1.10) Worst-case 1.74 1.93 1 - 58 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Reading Data Sheets Reading Data Sheets Macrocell "ND2" is given as an example. (1) CELL NAME: Macrocell name. `x' can be substituted by characteristics, for example, pull-up, pulldown, open-drain, high-speed and slew-rate, etc. on I/O macrocells. Please see "CELL NAME" of data sheet for more details. (2) FUNCTION: Function of macrocells. (3) CELL COUNT: Numbers of gates and I/O slots used by the macrocell. (4) LOGIC SYMBOL: Logic symbol of macrocell. (5) TRUTH TABLE Truth table which shows the state of I/O. X indicates the state of "Do not care" and Hz is "High impedance". (6) Verilog-HDL DESCRIPTION (7) VHDL DESCRIPTION TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 59 Reading Data Sheets TOSHIBA (8) ELECTROMIGRATION: To avoid potential electromigration problems, the maximum load that an macrocell output can drive is specified, based on its switching speed. The "ELECTROMIGRATION" table lists the maximum values of the load (in LU) times the switching frequency (in MHz). The following examples illustrate the way to calculate the maximum output drive using the switching frequency (f) as a basis: When f=10 MHz: 6880/ 10 = 688 When f=100 MHz: 6880/ 100 = 69 Notes: The maximum load a macrocell output can drive is determined as the smaller of this result and the OUTPUT DRIVE value. (9) INPUT LOAD: Load capacitance of macrocell input in LU unit. It is also a factor of delay calculation. (10) OUTPUT DRIVE: Load drive capability of macrocell output in units of LU. (11) PATH CONDITION This table shows the conditions when the validity of pin-to-pin delays are conditioned by other pins. PATH: shows a module path. Since more than one source may have a module path to the same destination, each source (or input) pin is listed for each destination (or output) pin. CONDITION: shows the Boolean equation when the validity of the path delay is state-dependent. Examples of Boolean equations are given below: ~B ~A|B&~C A&~B The tilde character (~) denotes negation or NOT. 1 - 60 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Reading Data Sheets FUNCTION: There may be delay values independently for each of the four output transitions. IO LEVEL: Output buffer propagation delay is a function of buffer type, capacitive load, and type of device being driven. When driving CMOS chips, output buffer propagation delays are measured from their inception to the time at which the signal achieves the CMOS threshold of 1.5 volts. When driving LVTTL chips, the delays are measured from their inception to the time at which the signal achieves the LVTTL threshold of 1.5 volts. (12) SLEW FACTOR This table shows parameters used to calculate the input slew rate (or transition time). Input slew rate is determined by the following equation: (Input slew rate) = FACTOR x output_load + CONSTANT (13) PATH DELAY This is a lookup table indexed by output loads and input slew rates. The total propagation delay is computed by interpolating table values. Notes: (1) For I/O macrocells, following values are shown in chapter "DC Characteristics" table on page 1-34: output current, threshold voltage, and pull-up/pull-down transistor characteristic. (2)Pad capacitance is shown in `INPUT CAPACITANCE' table on input buffer and a state of output buffer is `Hz'. (3) `TRUTH TABLE' and `AC CHARACTERISTICS' of input buffer are not included in Data Sheet of bidirectional buffer. Please see Data Sheet of same type macrocell. TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 - 61 Reading Data Sheets TOSHIBA Figure 1-21 Example of Macrocell Data Sheet 1 - 62 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Chapter 2 Internal Macrocells TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 TOSHIBA 2 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index Alphanumeric Index CELL NAME AN2 AN2P AN3 AN3P AN4 AN4P AO1 AO1P AO2 AO2P AO3 AO3P AO4 AO4P AO5 AO5P AO6 AO6P 4-INPUT AND 3-INPUT AND 2-INPUT AND FUNCTION PAGE 2-1 3 5 8 11 14 2-INPUT AND into 3-INPUT NOR 17 22 2-WIDE 2-INPUT AND into 2-INPUT NOR 27 34 2-INPUT OR into 3-INPUT NAND 41 46 2-WIDE 2-INPUT OR into 2-INPUT NAND 51 58 INVERTING 2 of 3 MAJORITY GATE 65 69 2-INPUT AND into 2-INPUT NOR 73 77 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 3 Alphanumeric Index TOSHIBA CELL NAME AO7 AO7P BTS4 BTS4P BTS5 BTS5P B2I B2IP B3I B3IP B4I B4IP B5I B5IP D24GL D24GLP D24L D24LP EN ENP EN3 EN3P EO EOP EON1 EON1P EO1 EO1P EO3 EO3P 3-INPUT EXCLUSIVE OR 2-INPUT EXCLUSIVE OR 3-INPUT EXCLUSIVE NOR 2-INPUT EXCLUSIVE NOR 3 PARALLEL INVERTERS 4 PARALLEL INVERTERS FUNCTION 2-INPUT OR into 2-INPUT NAND PAGE 2 - 81 85 TRI-STATE INTERNAL BUFFER ( HIGH ENABLE ) 89 92 TRI-STATE INTERNAL INVERTING BUFFER ( HIGH ENABLE ) 95 98 INVERTER into 3 PARALLEL INVERTERS 101 103 2 PARALLEL INVERTERS into 2 PARALLEL INVERTERS 105 107 109 111 113 115 2 TO 4 DECODER ( GATED OUTPUTS ACTIVE LOW ) 117 124 2 TO 4 DECODER ( OUTPUT ACTIVE LOW ) 131 136 141 144 147 154 161 164 2-INPUT OR and 2-INPUT NAND into 2-INPUT NAND 167 174 2-INPUT AND and 2-INPUT NOR into 2-INPUT NOR 181 188 195 202 4 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index CELL NAME FA1 FA1P FA1A FA1AP FD1 FD1P FD1SF FD1SFP FD1S FD1SP FD2 FD2P FD2SF FD2SFP FD2S FD2SP FD3 FD3P FD3SF FD3SFP FD3S FD3SP FD4 FD4P FD4SF FD4SFP FD4S FD4SP FJK1 J-K FLIP FLOP with PRESET with CLEAR D-TYPE FLIP FLOP FULL ADDER FUNCTION PAGE 2 - 209 219 229 239 249 253 with Independent two-phase SCAN clock 257 267 with common single-phase SCAN clock 277 283 289 295 with Independent two-phase SCAN clock with CLEAR 301 314 with common single-phase SCAN clock with CLEAR 327 335 with CLEAR and PRESET 343 351 with Independent two-phase SCAN clock with CLEAR and PRESET 359 374 with common single-phase SCAN clock with CLEAR and PRESET 389 399 409 415 with Independent two-phase SCAN clock with PRESET 421 434 with common single-phase SCAN clock with PRESET 447 455 463 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 5 Alphanumeric Index TOSHIBA CELL NAME FJK1P FJK2 FJK2P FJK3 FJK3P FT2 FT2P FT4 FT4P HA1 HA1P IDRV4 IDRV8 IDRV16 IDRV24 IV IVP IVA IVAP IVDA IVDAP LD1 LD1P LD2 LD2P LD3 LD3P LD4 LD4P LS1 INVERTER into INVERTER INVERTER INTERNAL CLOCK DRIVER HALF ADDER with PRESET with CLEAR FUNCTION PAGE 2 - 467 471 477 with CLEAR and PRESET 483 491 TOGGLE FLIP FLOP with CLEAR 499 504 509 514 519 523 ( equal 4mA DRIVER ) ( equal 8mA DRIVER ) ( equal 16mA DRIVER ) ( equal 24mA DRIVER ) 527 529 531 533 535 537 with PARALLEL Pch TRANSISTORS 539 541 543 545 D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) 547 552 ( LOW ENABLE ) 557 562 D-TYPE TRANSPARENT LATCH with CLEAR ( HIGH ENABLE ) 567 574 ( LOW ENABLE ) 581 588 D-TYPE TRANSPARENT LATCH with SCAN TESTINPUT 595 6 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index CELL NAME LS1P LS2 LS2P LSR1 LSR1P LSR2 LSR2P MUX21H MUX21HP MUX21L MUX21LP MUX41 MUX41P MUX81 MUX81P ND2 ND2P ND3 ND3P ND4 ND4P ND5 ND5P ND6 ND6P ND8 ND8P NR2 NR2P NR3 3-INPUT NOR 2-INPUT NOR 8-INPUT NAND 6-INPUT NAND 5-INPUT NAND 4-INPUT NAND 3-INPUT NAND 2-INPUT NAND 8 TO 1 MULTIPLEXER 4 TO 1 MULTIPLEXER 2 TO 1 MULTIPLEXER FUNCTION PAGE 2 - 609 623 650 SR-LATCH with SEPARATE GATE SD and RD 677 683 SR-LATCH with COMMON GATE SD and RD 689 694 699 702 2 TO 1 INVERTING MULTIPLEXER 705 708 711 718 725 742 759 761 763 766 769 772 775 779 783 787 791 796 801 803 805 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 7 Alphanumeric Index TOSHIBA CELL NAME NR3P NR4 NR4P NR5 NR5P NR6 NR6P NR8 NR8P OR2 OR2P OR3 OR3P OR4 OR4P PDI PUI YCAN2 YCAN2P YCBUF YCBUFP YCOR2 YCOR2P YD24GH YD24GHP YD24H YD24HP YDLY1 YDLY1P YDLY2 DELAY BUFFER 2 TO 4 DECODER CLOCK BUFFER 4-INPUT OR 3-INPUT OR 2-INPUT OR 8-INPUT NOR 6-INPUT NOR 5-INPUT NOR 4-INPUT NOR FUNCTION PAGE 2 - 808 811 814 817 821 825 829 833 838 843 845 847 850 853 856 INTERNAL PULL-DOWN for PREVENTING BUS FLOATING INTERNAL PULL-UP for PREVENTING BUS FLOATING CLOCK BUFFER with 2-INPUT AND 859 861 863 865 867 869 CLOCK BUFFER with 2-INPUT OR 871 873 ( GATED OUTPUTS ACTIVE HIGH ) 875 882 ( OUTPUTS ACTIVE HIGH ) 889 894 899 901 903 8 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index CELL NAME YDLY2P YDLY3 YDLY3P YFD1 YFD2 YFD3 YFD4 YLD1 YLD14B YLD2 YLD24B YMUX24H YMUX24HP YMUX24L YMUX24LP D-TYPE FLIP FLOP FUNCTION PAGE 905 907 909 911 with CLEAR with CLEAR and PRESET with PRESET D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) QUAD D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) QUAD D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) QUAD 2 TO 1 MULTIPLEXER 915 921 930 936 941 957 962 978 987 ( INVERTED OUTPUT ) 996 1005 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 9 Alphanumeric Index TOSHIBA 10 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index Internal Macrocell Data Sheets ver. 1.10.5 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 11 Alphanumeric Index TOSHIBA 12 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TC200G SERIES DATA SHEET AN2 CELL NAME AN2 FUNCTION 2-INPUT AND 2 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 AN2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L L L H A B AN2 Z Verilog-HDL DESCRIPTION AN2 inst(Z,A,B); VHDL DESCRIPTION inst:AN2 port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 1.08 1.09 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 45.6 Rev.1.01.10 2-1 TC200G SERIES DATA SHEET AN2 AN2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0939 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.31 0.48 0.24 0.38 0.54 0.31 0.45 0.61 0.46 0.61 0.77 30.00 1.12 1.18 1.26 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0397 0.07 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.20 0.24 0.31 5.00 0.28 0.30 0.35 0.43 FUNCTION FALL 10.00 0.39 0.42 0.47 0.55 30.00 0.85 0.88 0.93 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0939 0.10 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.49 0.24 0.38 0.54 0.29 0.43 0.60 0.40 0.54 0.71 30.00 1.13 1.18 1.24 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0397 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.31 0.43 0.23 0.34 0.46 0.29 0.40 0.52 0.40 0.53 0.65 30.00 0.89 0.91 0.98 1.12 Rev.1.01.10 2-2 TC200G SERIES DATA SHEET AN2P CELL NAME AN2P FUNCTION 2-INPUT AND 2 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 AN2P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L L L H A B AN2P Z Verilog-HDL DESCRIPTION AN2P inst(Z,A,B); VHDL DESCRIPTION inst:AN2P port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 1.01 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 82.1 Rev.1.01.10 2-3 TC200G SERIES DATA SHEET AN2P AN2P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0546 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.27 0.37 0.26 0.35 0.45 0.35 0.43 0.53 0.54 0.62 0.72 30.00 0.74 0.82 0.90 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0203 0.09 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.19 0.22 0.27 0.36 5.00 0.26 0.28 0.34 0.44 FUNCTION FALL 10.00 0.33 0.36 0.41 0.51 30.00 0.58 0.61 0.67 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0546 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.29 0.38 0.25 0.34 0.44 0.32 0.41 0.50 0.45 0.54 0.64 30.00 0.76 0.81 0.88 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0203 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.29 0.36 0.24 0.32 0.39 0.31 0.38 0.45 0.44 0.52 0.60 30.00 0.62 0.64 0.71 0.87 Rev.1.01.10 2-4 TC200G SERIES DATA SHEET AN3 CELL NAME AN3 FUNCTION 3-INPUT AND 2 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 AN3 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C AN3 Z C L H L H L H L H OUTPUT Z L L L L L L L H Verilog-HDL DESCRIPTION AN3 inst(Z,A,B,C); VHDL DESCRIPTION inst:AN3 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.06 1.02 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 46.0 Rev.1.01.10 2-5 TC200G SERIES DATA SHEET AN3 AN3 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0957 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.38 0.55 0.31 0.45 0.63 0.40 0.55 0.72 0.64 0.79 0.97 30.00 1.22 1.29 1.39 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0362 0.07 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.18 0.21 0.24 0.26 5.00 0.28 0.31 0.35 0.38 FUNCTION FALL 10.00 0.40 0.43 0.46 0.50 30.00 0.82 0.85 0.89 0.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0957 0.12 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.40 0.58 0.31 0.46 0.63 0.40 0.55 0.72 0.61 0.76 0.93 30.00 1.24 1.30 1.39 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0362 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.32 0.43 0.24 0.35 0.46 0.28 0.39 0.51 0.35 0.47 0.59 30.00 0.86 0.89 0.94 1.02 Rev.1.01.10 2-6 TC200G SERIES DATA SHEET AN3 AN3 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0957 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.42 0.59 0.31 0.45 0.62 0.35 0.50 0.67 0.45 0.61 0.78 30.00 1.25 1.29 1.34 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0362 0.07 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.24 0.26 0.32 0.45 5.00 0.35 0.37 0.44 0.58 FUNCTION FALL 10.00 0.46 0.49 0.55 0.70 30.00 0.90 0.92 0.99 1.13 Rev.1.01.10 2-7 TC200G SERIES DATA SHEET AN3P CELL NAME AN3P FUNCTION 3-INPUT AND 3 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 AN3P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C AN3P Z C L H L H L H L H OUTPUT Z L L L L L L L H Verilog-HDL DESCRIPTION AN3P inst(Z,A,B,C); VHDL DESCRIPTION inst:AN3P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.07 1.08 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 78.5 Rev.1.01.10 2-8 TC200G SERIES DATA SHEET AN3P AN3P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0541 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.35 0.45 0.34 0.43 0.53 0.45 0.54 0.64 0.72 0.81 0.91 30.00 0.83 0.91 1.02 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.09 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.23 0.28 0.32 5.00 0.28 0.31 0.35 0.41 FUNCTION FALL 10.00 0.36 0.39 0.43 0.49 30.00 0.64 0.67 0.72 0.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0541 0.12 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.38 0.48 0.34 0.43 0.53 0.44 0.53 0.63 0.67 0.76 0.86 30.00 0.86 0.91 1.01 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.26 0.34 0.42 0.31 0.39 0.47 0.39 0.48 0.57 30.00 0.68 0.71 0.76 0.87 Rev.1.01.10 2-9 TC200G SERIES DATA SHEET AN3P AN3P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0541 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.39 0.49 0.34 0.43 0.53 0.39 0.48 0.58 0.52 0.61 0.72 30.00 0.87 0.91 0.96 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.09 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.27 0.34 0.46 5.00 0.33 0.36 0.42 0.56 FUNCTION FALL 10.00 0.41 0.44 0.51 0.65 30.00 0.71 0.73 0.80 0.95 Rev.1.01.10 2 - 10 TC200G SERIES DATA SHEET AN4 CELL NAME AN4 FUNCTION 4-INPUT AND 3 LOGIC SYMBOL 0 AN4 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D H H H H ALL OTHER COMBINATIONS OUTPUT Z H L A B C D AN4 Z Verilog-HDL DESCRIPTION AN4 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AN4 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B C D (LU) LOAD 1.04 0.98 1.08 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 46.4 Rev.1.01.10 2 - 11 TC200G SERIES DATA SHEET AN4 AN4 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0928 0.15 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.43 0.60 0.35 0.50 0.67 0.45 0.60 0.78 0.74 0.89 1.06 30.00 1.25 1.32 1.43 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0370 0.08 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.19 0.22 0.24 0.23 5.00 0.29 0.32 0.35 0.35 FUNCTION FALL 10.00 0.40 0.44 0.47 0.47 30.00 0.84 0.87 0.90 0.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0928 0.15 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.46 0.63 0.37 0.52 0.69 0.46 0.61 0.79 0.73 0.88 1.05 30.00 1.28 1.34 1.44 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0370 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.33 0.44 0.25 0.35 0.47 0.28 0.40 0.51 0.31 0.43 0.56 30.00 0.88 0.91 0.95 1.01 Rev.1.01.10 2 - 12 TC200G SERIES DATA SHEET AN4 AN4 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0928 0.15 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.49 0.67 0.38 0.53 0.70 0.45 0.60 0.77 0.64 0.80 0.97 30.00 1.32 1.35 1.42 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0370 0.08 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.28 0.33 0.41 5.00 0.37 0.39 0.45 0.55 FUNCTION FALL 10.00 0.49 0.51 0.57 0.67 30.00 0.93 0.95 1.01 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0928 0.15 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.51 0.68 0.39 0.54 0.71 0.43 0.58 0.76 0.56 0.72 0.90 30.00 1.33 1.36 1.41 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0370 0.08 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.39 0.52 0.30 0.41 0.54 0.36 0.48 0.60 0.47 0.60 0.73 30.00 0.96 0.98 1.04 1.19 Rev.1.01.10 2 - 13 TC200G SERIES DATA SHEET AN4P CELL NAME AN4P FUNCTION 4-INPUT AND 3 LOGIC SYMBOL 0 AN4P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D H H H H ALL OTHER COMBINATIONS OUTPUT Z H L A B C D AN4P Z Verilog-HDL DESCRIPTION AN4P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AN4P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,D B,C (LU) LOAD 1.06 1.01 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 78.4 Rev.1.01.10 2 - 14 TC200G SERIES DATA SHEET AN4P AN4P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0539 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.39 0.50 0.38 0.47 0.58 0.50 0.59 0.69 0.81 0.90 1.00 30.00 0.89 0.96 1.08 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0237 0.09 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.23 0.27 0.28 5.00 0.27 0.31 0.35 0.37 FUNCTION FALL 10.00 0.35 0.39 0.43 0.46 30.00 0.64 0.67 0.72 0.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0539 0.14 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.43 0.54 0.39 0.49 0.59 0.50 0.59 0.69 0.78 0.87 0.97 30.00 0.92 0.98 1.08 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0237 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.26 0.34 0.42 0.30 0.39 0.47 0.35 0.44 0.53 30.00 0.67 0.70 0.76 0.83 Rev.1.01.10 2 - 15 TC200G SERIES DATA SHEET AN4P AN4P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0539 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.46 0.57 0.41 0.50 0.60 0.47 0.56 0.67 0.67 0.76 0.87 30.00 0.95 0.99 1.06 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0237 0.09 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.26 0.29 0.35 0.45 5.00 0.35 0.37 0.43 0.54 FUNCTION FALL 10.00 0.43 0.45 0.52 0.63 30.00 0.72 0.75 0.81 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0539 0.14 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.47 0.58 0.41 0.50 0.61 0.45 0.54 0.65 0.59 0.68 0.79 30.00 0.96 0.99 1.04 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0237 0.09 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.34 0.43 0.28 0.37 0.45 0.34 0.43 0.51 0.46 0.55 0.65 30.00 0.72 0.75 0.81 0.95 Rev.1.01.10 2 - 16 TC200G SERIES DATA SHEET AO1 CELL NAME AO1 FUNCTION 2-INPUT AND into 3-INPUT NOR 2 LOGIC SYMBOL 0 AO1 CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L L L L L H L L H L L L ALL OTHER COMBINATIONS A B C D AO1 Z OUTPUT Z H H H L Verilog-HDL DESCRIPTION AO1 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO1 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.08 1.05 0.98 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 14.5 Rev.1.01.10 2 - 17 TC200G SERIES DATA SHEET AO1 AO1 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.74 1.23 0.36 0.75 1.23 0.44 0.81 1.29 0.69 1.08 1.54 30.00 3.17 3.18 3.21 3.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.18 0.21 0.20 5.00 0.27 0.33 0.40 0.48 FUNCTION FALL 10.00 0.46 0.52 0.60 0.76 30.00 1.20 1.26 1.35 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.67 1.16 0.30 0.68 1.17 0.37 0.75 1.22 0.58 0.99 1.46 30.00 3.11 3.12 3.15 3.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.26 0.44 0.18 0.34 0.53 0.23 0.44 0.65 0.24 0.57 0.88 30.00 1.18 1.27 1.41 1.79 Rev.1.01.10 2 - 18 TC200G SERIES DATA SHEET AO1 AO1 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&~B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.77 1.26 0.36 0.76 1.25 0.39 0.77 1.25 0.56 0.94 1.40 30.00 3.21 3.20 3.19 3.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION C->Z A&~B&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.16 0.20 0.20 5.00 0.19 0.27 0.36 0.46 FUNCTION FALL 10.00 0.31 0.40 0.51 0.70 30.00 0.79 0.88 1.02 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH CONDITION PATH CONDITION C->Z ~A&B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.85 1.34 0.44 0.84 1.33 0.46 0.85 1.33 0.64 1.01 1.47 30.00 3.28 3.28 3.27 3.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION C->Z ~A&B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.20 0.32 0.17 0.28 0.41 0.22 0.37 0.52 0.23 0.48 0.72 30.00 0.81 0.89 1.04 1.39 Rev.1.01.10 2 - 19 TC200G SERIES DATA SHEET AO1 AO1 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&~B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.67 1.08 0.33 0.66 1.07 0.37 0.69 1.09 0.55 0.88 1.27 30.00 2.70 2.70 2.71 2.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION C->Z ~A&~B&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.17 0.22 0.24 5.00 0.20 0.28 0.37 0.49 FUNCTION FALL 10.00 0.32 0.41 0.52 0.72 30.00 0.80 0.89 1.03 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH CONDITION PATH CONDITION D->Z A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.80 1.28 0.38 0.78 1.27 0.37 0.76 1.24 0.49 0.86 1.31 30.00 3.23 3.22 3.18 3.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION D->Z A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.20 0.32 0.16 0.28 0.40 0.20 0.37 0.52 0.22 0.48 0.71 30.00 0.80 0.89 1.03 1.39 Rev.1.01.10 2 - 20 TC200G SERIES DATA SHEET AO1 AO1 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z ~A&B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.87 1.36 0.45 0.85 1.34 0.44 0.83 1.32 0.56 0.93 1.38 30.00 3.30 3.30 3.26 3.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION D->Z ~A&B&~C PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.17 0.23 0.26 5.00 0.21 0.29 0.38 0.50 FUNCTION FALL 10.00 0.33 0.42 0.53 0.73 30.00 0.82 0.90 1.05 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2784 0.46 PATH CONDITION PATH CONDITION D->Z ~A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.69 1.10 0.34 0.67 1.09 0.34 0.66 1.07 0.45 0.77 1.15 30.00 2.72 2.71 2.68 2.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0656 0.13 PATH CONDITION PATH CONDITION D->Z ~A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.21 0.33 0.17 0.29 0.41 0.23 0.38 0.53 0.27 0.51 0.74 30.00 0.81 0.90 1.04 1.40 Rev.1.01.10 2 - 21 TC200G SERIES DATA SHEET AO1P CELL NAME AO1P FUNCTION 2-INPUT AND into 3-INPUT NOR 4 LOGIC SYMBOL 0 AO1P CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L L L L L H L L H L L L ALL OTHER COMBINATIONS A B C D AO1P Z OUTPUT Z H H H L Verilog-HDL DESCRIPTION AO1P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO1P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A,C B D (LU) LOAD 2.08 2.16 1.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 27.9 Rev.1.01.10 2 - 22 TC200G SERIES DATA SHEET AO1P AO1P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.45 0.71 0.26 0.46 0.72 0.34 0.54 0.78 0.55 0.78 1.03 30.00 1.72 1.74 1.78 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.16 0.19 0.18 5.00 0.16 0.24 0.31 0.38 FUNCTION FALL 10.00 0.25 0.34 0.43 0.57 30.00 0.61 0.70 0.83 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.53 0.78 0.33 0.53 0.78 0.41 0.61 0.85 0.66 0.87 1.12 30.00 1.80 1.80 1.84 2.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.18 0.27 0.15 0.23 0.32 0.18 0.29 0.39 0.15 0.31 0.48 30.00 0.62 0.69 0.77 0.97 Rev.1.01.10 2 - 23 TC200G SERIES DATA SHEET AO1P AO1P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&~B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.64 0.89 0.41 0.62 0.88 0.43 0.63 0.88 0.60 0.80 1.04 30.00 1.91 1.90 1.89 2.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION C->Z A&~B&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.15 0.19 0.19 5.00 0.14 0.21 0.28 0.34 FUNCTION FALL 10.00 0.20 0.28 0.37 0.48 30.00 0.43 0.52 0.65 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH CONDITION PATH CONDITION C->Z ~A&B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.56 0.82 0.33 0.54 0.80 0.35 0.55 0.81 0.52 0.73 0.97 30.00 1.83 1.82 1.81 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION C->Z ~A&B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.12 0.18 0.14 0.20 0.27 0.17 0.27 0.36 0.15 0.31 0.46 30.00 0.42 0.51 0.63 0.89 Rev.1.01.10 2 - 24 TC200G SERIES DATA SHEET AO1P AO1P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&~B&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.49 0.70 0.30 0.47 0.69 0.34 0.50 0.71 0.51 0.69 0.90 30.00 1.54 1.54 1.55 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION C->Z ~A&~B&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.15 0.20 0.20 5.00 0.13 0.21 0.28 0.34 FUNCTION FALL 10.00 0.19 0.28 0.37 0.49 30.00 0.43 0.52 0.65 0.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH CONDITION PATH CONDITION D->Z A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.66 0.91 0.42 0.63 0.89 0.41 0.62 0.87 0.54 0.73 0.97 30.00 1.93 1.91 1.88 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION D->Z A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.14 0.20 0.16 0.22 0.28 0.20 0.29 0.38 0.21 0.36 0.50 30.00 0.44 0.53 0.65 0.92 Rev.1.01.10 2 - 25 TC200G SERIES DATA SHEET AO1P AO1P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z ~A&B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.58 0.84 0.34 0.55 0.81 0.34 0.54 0.79 0.46 0.67 0.90 30.00 1.85 1.84 1.80 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION D->Z ~A&B&~C PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.14 0.18 0.17 5.00 0.13 0.20 0.27 0.33 FUNCTION FALL 10.00 0.19 0.27 0.36 0.47 30.00 0.43 0.52 0.64 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1458 0.49 PATH CONDITION PATH CONDITION D->Z ~A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.51 0.72 0.31 0.49 0.70 0.31 0.48 0.69 0.42 0.60 0.80 30.00 1.56 1.55 1.52 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0305 0.14 PATH CONDITION PATH CONDITION D->Z ~A&~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.14 0.20 0.16 0.22 0.28 0.20 0.29 0.38 0.23 0.37 0.51 30.00 0.44 0.52 0.65 0.92 Rev.1.01.10 2 - 26 TC200G SERIES DATA SHEET AO2 CELL NAME AO2 FUNCTION 2-WIDE 2-INPUT AND into 2-INPUT NOR 2 LOGIC SYMBOL 0 AO2 CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B AO2 Z C D TRUTH TABLE INPUT A B C D L L H H L H H H H L H H H H L L H H L H H H H L H H H H ALL OTHER COMBINATIONS OUTPUT Z L L L L L L L H Verilog-HDL DESCRIPTION AO2 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO2 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.04 1.08 1.00 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 19.5 Rev.1.01.10 2 - 27 TC200G SERIES DATA SHEET AO2 AO2 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.50 0.85 0.23 0.51 0.86 0.29 0.57 0.92 0.45 0.77 1.13 30.00 2.25 2.27 2.31 2.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION A->Z B&C&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.18 0.23 0.27 5.00 0.26 0.34 0.44 0.59 FUNCTION FALL 10.00 0.44 0.53 0.65 0.89 30.00 1.18 1.27 1.41 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.53 0.86 0.27 0.54 0.88 0.33 0.61 0.93 0.49 0.80 1.14 30.00 2.21 2.23 2.27 2.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.28 0.46 0.20 0.36 0.55 0.25 0.46 0.67 0.32 0.62 0.91 30.00 1.20 1.29 1.43 1.81 Rev.1.01.10 2 - 28 TC200G SERIES DATA SHEET AO2 AO2 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.39 0.65 0.19 0.41 0.67 0.24 0.46 0.73 0.34 0.62 0.91 30.00 1.73 1.75 1.79 2.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION A->Z B&~C&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.18 0.23 0.30 5.00 0.26 0.34 0.44 0.61 FUNCTION FALL 10.00 0.44 0.53 0.65 0.90 30.00 1.18 1.27 1.41 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.55 0.90 0.28 0.56 0.91 0.35 0.62 0.96 0.54 0.84 1.19 30.00 2.30 2.31 2.35 2.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.27 0.46 0.17 0.33 0.52 0.21 0.40 0.60 0.22 0.50 0.76 30.00 1.20 1.26 1.35 1.61 Rev.1.01.10 2 - 29 TC200G SERIES DATA SHEET AO2 AO2 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.58 0.92 0.32 0.59 0.93 0.39 0.65 0.98 0.58 0.87 1.20 30.00 2.26 2.27 2.31 2.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION B->Z A&~C&D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.14 0.19 0.24 0.26 5.00 0.29 0.35 0.42 0.53 FUNCTION FALL 10.00 0.48 0.54 0.62 0.79 30.00 1.22 1.28 1.37 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH CONDITION PATH CONDITION B->Z A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.43 0.69 0.23 0.44 0.71 0.28 0.50 0.77 0.43 0.69 0.97 30.00 1.77 1.78 1.83 2.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION B->Z A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.27 0.46 0.17 0.33 0.52 0.21 0.40 0.60 0.24 0.51 0.77 30.00 1.20 1.26 1.35 1.61 Rev.1.01.10 2 - 30 TC200G SERIES DATA SHEET AO2 AO2 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.62 0.96 0.34 0.62 0.96 0.35 0.62 0.95 0.43 0.70 1.02 30.00 2.30 2.30 2.29 2.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION C->Z D&A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.22 0.27 0.33 5.00 0.32 0.38 0.45 0.58 FUNCTION FALL 10.00 0.51 0.57 0.65 0.83 30.00 1.25 1.31 1.40 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.57 0.91 0.29 0.57 0.90 0.30 0.57 0.90 0.38 0.65 0.97 30.00 2.25 2.25 2.23 2.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.30 0.49 0.20 0.36 0.55 0.25 0.43 0.63 0.30 0.56 0.81 30.00 1.23 1.29 1.38 1.64 Rev.1.01.10 2 - 31 TC200G SERIES DATA SHEET AO2 AO2 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.45 0.71 0.25 0.46 0.71 0.26 0.47 0.73 0.34 0.56 0.82 30.00 1.72 1.73 1.74 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION C->Z D&~A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.16 0.21 0.27 0.34 5.00 0.32 0.37 0.45 0.59 FUNCTION FALL 10.00 0.50 0.56 0.64 0.84 30.00 1.24 1.30 1.39 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.60 0.95 0.31 0.60 0.96 0.32 0.60 0.95 0.37 0.67 1.01 30.00 2.35 2.36 2.34 2.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.31 0.50 0.23 0.39 0.58 0.30 0.49 0.70 0.40 0.68 0.96 30.00 1.24 1.32 1.46 1.85 Rev.1.01.10 2 - 32 TC200G SERIES DATA SHEET AO2 AO2 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.55 0.90 0.26 0.55 0.90 0.27 0.55 0.90 0.32 0.61 0.96 30.00 2.30 2.31 2.29 2.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION D->Z C&~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.14 0.21 0.27 0.36 5.00 0.29 0.37 0.47 0.65 FUNCTION FALL 10.00 0.48 0.56 0.68 0.94 30.00 1.22 1.30 1.44 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2017 0.43 PATH CONDITION PATH CONDITION D->Z C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.44 0.71 0.22 0.45 0.72 0.24 0.46 0.74 0.29 0.54 0.82 30.00 1.78 1.80 1.81 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION D->Z C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.30 0.49 0.22 0.38 0.57 0.30 0.49 0.70 0.41 0.69 0.97 30.00 1.23 1.31 1.45 1.85 Rev.1.01.10 2 - 33 TC200G SERIES DATA SHEET AO2P CELL NAME AO2P FUNCTION 2-WIDE 2-INPUT AND into 2-INPUT NOR 4 LOGIC SYMBOL 0 AO2P CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B AO2P Z C D TRUTH TABLE INPUT A B C D L L H H L H H H H L H H H H L L H H L H H H H L H H H H ALL OTHER COMBINATIONS OUTPUT Z L L L L L L L H Verilog-HDL DESCRIPTION AO2P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO2P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B,D C (LU) LOAD 2.00 2.15 2.16 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 37.8 Rev.1.01.10 2 - 34 TC200G SERIES DATA SHEET AO2P AO2P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.33 0.51 0.20 0.34 0.52 0.26 0.41 0.58 0.41 0.59 0.79 30.00 1.21 1.23 1.28 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION A->Z B&C&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.16 0.19 0.22 5.00 0.17 0.24 0.32 0.41 FUNCTION FALL 10.00 0.26 0.34 0.44 0.59 30.00 0.63 0.72 0.85 1.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.38 0.56 0.26 0.40 0.58 0.32 0.46 0.64 0.48 0.65 0.84 30.00 1.27 1.29 1.33 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.19 0.28 0.18 0.26 0.36 0.23 0.34 0.46 0.27 0.45 0.62 30.00 0.65 0.74 0.87 1.16 Rev.1.01.10 2 - 35 TC200G SERIES DATA SHEET AO2P AO2P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.27 0.41 0.17 0.29 0.43 0.22 0.34 0.49 0.33 0.49 0.66 30.00 0.98 1.00 1.05 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION A->Z B&~C&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.15 0.20 0.24 5.00 0.17 0.24 0.32 0.43 FUNCTION FALL 10.00 0.26 0.34 0.44 0.61 30.00 0.63 0.71 0.85 1.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.38 0.56 0.25 0.39 0.57 0.32 0.46 0.64 0.51 0.68 0.86 30.00 1.27 1.28 1.33 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.27 0.16 0.24 0.33 0.19 0.29 0.40 0.18 0.34 0.50 30.00 0.65 0.71 0.79 1.00 Rev.1.01.10 2 - 36 TC200G SERIES DATA SHEET AO2P AO2P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.44 0.62 0.31 0.45 0.63 0.37 0.52 0.69 0.58 0.74 0.91 30.00 1.33 1.34 1.38 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION B->Z A&~C&D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.13 0.18 0.21 0.22 5.00 0.20 0.26 0.31 0.37 FUNCTION FALL 10.00 0.30 0.35 0.42 0.53 30.00 0.67 0.73 0.81 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH CONDITION PATH CONDITION B->Z A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.31 0.46 0.21 0.33 0.47 0.27 0.39 0.53 0.43 0.57 0.73 30.00 1.02 1.04 1.09 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION B->Z A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.27 0.15 0.24 0.33 0.19 0.29 0.40 0.20 0.35 0.51 30.00 0.65 0.71 0.79 1.01 Rev.1.01.10 2 - 37 TC200G SERIES DATA SHEET AO2P AO2P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.49 0.66 0.33 0.48 0.66 0.34 0.48 0.65 0.41 0.56 0.73 30.00 1.37 1.37 1.35 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION C->Z D&A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.16 0.20 0.25 0.30 5.00 0.23 0.28 0.35 0.44 FUNCTION FALL 10.00 0.33 0.38 0.45 0.59 30.00 0.70 0.76 0.84 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.61 0.28 0.42 0.60 0.28 0.42 0.60 0.36 0.50 0.68 30.00 1.32 1.31 1.30 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.21 0.31 0.18 0.26 0.36 0.22 0.32 0.43 0.26 0.41 0.56 30.00 0.68 0.74 0.82 1.04 Rev.1.01.10 2 - 38 TC200G SERIES DATA SHEET AO2P AO2P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.34 0.48 0.23 0.34 0.48 0.25 0.36 0.49 0.32 0.44 0.58 30.00 1.01 1.01 1.02 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION C->Z D&~A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.20 0.25 0.31 5.00 0.23 0.28 0.34 0.45 FUNCTION FALL 10.00 0.32 0.37 0.45 0.59 30.00 0.69 0.75 0.84 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.61 0.28 0.43 0.61 0.28 0.43 0.60 0.33 0.48 0.66 30.00 1.32 1.32 1.31 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.22 0.31 0.21 0.29 0.39 0.27 0.38 0.50 0.37 0.52 0.69 30.00 0.69 0.77 0.90 1.21 Rev.1.01.10 2 - 39 TC200G SERIES DATA SHEET AO2P AO2P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.38 0.56 0.23 0.37 0.55 0.23 0.37 0.55 0.27 0.42 0.60 30.00 1.26 1.27 1.25 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION D->Z C&~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.19 0.24 0.32 5.00 0.20 0.27 0.36 0.49 FUNCTION FALL 10.00 0.29 0.37 0.48 0.66 30.00 0.67 0.75 0.88 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1014 0.31 PATH CONDITION PATH CONDITION D->Z C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.31 0.44 0.19 0.31 0.44 0.20 0.32 0.45 0.24 0.37 0.52 30.00 0.97 0.98 0.99 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0319 0.14 PATH CONDITION PATH CONDITION D->Z C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.21 0.31 0.21 0.29 0.39 0.27 0.38 0.50 0.38 0.54 0.70 30.00 0.68 0.76 0.89 1.22 Rev.1.01.10 2 - 40 TC200G SERIES DATA SHEET AO3 CELL NAME AO3 FUNCTION 2-INPUT OR into 3-INPUT NAND 2 LOGIC SYMBOL 0 AO3 CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L H H H H L H H H H H H ALL OTHER COMBINATIONS A B C D AO3 Z OUTPUT Z L L L H Verilog-HDL DESCRIPTION AO3 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO3 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.05 1.08 0.98 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 19.4 Rev.1.01.10 2 - 41 TC200G SERIES DATA SHEET AO3 AO3 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.75 0.21 0.46 0.77 0.24 0.51 0.82 0.31 0.63 0.97 30.00 1.98 2.01 2.05 2.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.23 0.30 0.43 5.00 0.38 0.46 0.58 0.81 FUNCTION FALL 10.00 0.66 0.74 0.87 1.19 30.00 1.77 1.86 2.00 2.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.21 0.47 0.78 0.21 0.47 0.78 0.20 0.49 0.81 30.00 2.01 2.02 2.02 2.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.41 0.68 0.26 0.49 0.77 0.34 0.61 0.90 0.51 0.86 1.23 30.00 1.80 1.88 2.02 2.45 Rev.1.01.10 2 - 42 TC200G SERIES DATA SHEET AO3 AO3 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.31 0.48 0.19 0.33 0.51 0.22 0.38 0.56 0.25 0.45 0.67 30.00 1.16 1.19 1.24 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION C->Z D&A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.19 0.24 0.32 0.47 5.00 0.37 0.44 0.53 0.75 FUNCTION FALL 10.00 0.61 0.67 0.78 1.04 30.00 1.54 1.60 1.71 2.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.29 0.47 0.18 0.32 0.49 0.20 0.36 0.55 0.21 0.42 0.64 30.00 1.15 1.18 1.23 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.43 0.71 0.25 0.48 0.76 0.32 0.56 0.84 0.47 0.76 1.08 30.00 1.82 1.88 1.96 2.23 Rev.1.01.10 2 - 43 TC200G SERIES DATA SHEET AO3 AO3 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.30 0.48 0.19 0.33 0.50 0.21 0.37 0.56 0.22 0.43 0.65 30.00 1.16 1.19 1.24 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION C->Z D&~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.23 0.28 0.35 0.51 5.00 0.46 0.51 0.59 0.80 FUNCTION FALL 10.00 0.74 0.79 0.87 1.11 30.00 1.85 1.91 1.99 2.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.33 0.50 0.21 0.35 0.52 0.25 0.40 0.58 0.30 0.50 0.71 30.00 1.19 1.21 1.26 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.39 0.62 0.24 0.43 0.67 0.29 0.50 0.73 0.40 0.65 0.92 30.00 1.55 1.60 1.67 1.89 Rev.1.01.10 2 - 44 TC200G SERIES DATA SHEET AO3 AO3 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.31 0.49 0.19 0.34 0.51 0.22 0.38 0.57 0.25 0.46 0.68 30.00 1.17 1.20 1.25 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION D->Z C&A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.25 0.30 0.40 5.00 0.44 0.48 0.53 0.67 FUNCTION FALL 10.00 0.72 0.76 0.81 0.97 30.00 1.83 1.88 1.93 2.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.50 0.20 0.35 0.52 0.23 0.39 0.58 0.26 0.47 0.69 30.00 1.19 1.21 1.26 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1000 0.19 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.47 0.75 0.28 0.51 0.79 0.33 0.56 0.84 0.44 0.71 1.00 30.00 1.86 1.91 1.96 2.13 Rev.1.01.10 2 - 45 TC200G SERIES DATA SHEET AO3P CELL NAME AO3P FUNCTION 2-INPUT OR into 3-INPUT NAND 4 LOGIC SYMBOL 0 AO3P CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L H H H H L H H H H H H ALL OTHER COMBINATIONS A B C D AO3P Z OUTPUT Z L L L H Verilog-HDL DESCRIPTION AO3P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO3P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A,B C D (LU) LOAD 2.17 2.05 1.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 38.0 Rev.1.01.10 2 - 46 TC200G SERIES DATA SHEET AO3P AO3P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.29 0.44 0.18 0.31 0.46 0.20 0.34 0.51 0.25 0.42 0.62 30.00 1.06 1.09 1.13 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.14 0.21 0.27 0.40 5.00 0.26 0.34 0.44 0.64 FUNCTION FALL 10.00 0.41 0.50 0.62 0.87 30.00 1.01 1.10 1.24 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.31 0.46 0.18 0.31 0.47 0.18 0.31 0.47 0.14 0.30 0.48 30.00 1.08 1.09 1.09 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.29 0.44 0.24 0.37 0.52 0.32 0.48 0.65 0.49 0.70 0.92 30.00 1.04 1.12 1.26 1.65 Rev.1.01.10 2 - 47 TC200G SERIES DATA SHEET AO3P AO3P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.22 0.31 0.17 0.25 0.33 0.20 0.28 0.38 0.22 0.33 0.45 30.00 0.65 0.68 0.74 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION C->Z D&A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.23 0.29 0.44 5.00 0.27 0.33 0.41 0.60 FUNCTION FALL 10.00 0.40 0.46 0.55 0.76 30.00 0.89 0.96 1.06 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.21 0.29 0.16 0.23 0.32 0.17 0.26 0.36 0.16 0.28 0.41 30.00 0.64 0.66 0.72 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.31 0.46 0.23 0.36 0.51 0.29 0.43 0.58 0.43 0.60 0.78 30.00 1.06 1.11 1.19 1.43 Rev.1.01.10 2 - 48 TC200G SERIES DATA SHEET AO3P AO3P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.22 0.31 0.17 0.24 0.33 0.18 0.27 0.37 0.18 0.29 0.42 30.00 0.65 0.67 0.73 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION C->Z D&~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.26 0.33 0.48 5.00 0.34 0.39 0.46 0.64 FUNCTION FALL 10.00 0.49 0.54 0.62 0.82 30.00 1.10 1.15 1.22 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.24 0.33 0.19 0.26 0.35 0.22 0.31 0.40 0.26 0.37 0.49 30.00 0.67 0.70 0.76 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.29 0.41 0.23 0.33 0.46 0.27 0.39 0.52 0.37 0.51 0.67 30.00 0.91 0.95 1.02 1.21 Rev.1.01.10 2 - 49 TC200G SERIES DATA SHEET AO3P AO3P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.22 0.31 0.17 0.25 0.34 0.19 0.28 0.38 0.20 0.31 0.44 30.00 0.66 0.68 0.74 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION D->Z C&A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.24 0.28 0.37 5.00 0.32 0.36 0.41 0.53 FUNCTION FALL 10.00 0.47 0.51 0.56 0.70 30.00 1.08 1.12 1.16 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.23 0.32 0.18 0.26 0.35 0.20 0.29 0.39 0.22 0.33 0.45 30.00 0.67 0.69 0.75 0.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0537 0.21 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.35 0.50 0.27 0.39 0.55 0.31 0.44 0.59 0.41 0.56 0.73 30.00 1.11 1.15 1.20 1.35 Rev.1.01.10 2 - 50 TC200G SERIES DATA SHEET AO4 CELL NAME AO4 FUNCTION 2-WIDE 2-INPUT OR into 2-INPUT NAND 2 LOGIC SYMBOL 0 AO4 CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B AO4 Z C D TRUTH TABLE INPUT A B C D L L L L L L L H L L H L L L H H L H L L H L L L H H L L ALL OTHER COMBINATIONS OUTPUT Z H H H H H H H L Verilog-HDL DESCRIPTION AO4 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO4 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.04 1.08 1.00 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 20.2 Rev.1.01.10 2 - 51 TC200G SERIES DATA SHEET AO4 AO4 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.74 0.20 0.45 0.76 0.25 0.51 0.81 0.38 0.68 1.01 30.00 1.98 2.00 2.04 2.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION A->Z ~B&C&D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.17 0.22 0.27 5.00 0.24 0.32 0.42 0.58 FUNCTION FALL 10.00 0.41 0.50 0.62 0.87 30.00 1.10 1.19 1.33 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.22 0.47 0.78 0.27 0.53 0.83 0.38 0.68 1.01 30.00 2.00 2.02 2.06 2.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.30 0.51 0.21 0.39 0.60 0.28 0.50 0.72 0.38 0.70 1.00 30.00 1.33 1.42 1.56 1.97 Rev.1.01.10 2 - 52 TC200G SERIES DATA SHEET AO4 AO4 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.75 0.20 0.45 0.76 0.25 0.51 0.81 0.35 0.66 0.99 30.00 1.98 2.00 2.04 2.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION A->Z ~B&~C&D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.19 0.25 0.34 5.00 0.30 0.38 0.49 0.69 FUNCTION FALL 10.00 0.51 0.60 0.73 1.01 30.00 1.38 1.47 1.61 2.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH CONDITION PATH CONDITION B->Z ~A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.20 0.46 0.77 0.22 0.47 0.78 0.28 0.55 0.86 30.00 2.00 2.01 2.01 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION B->Z ~A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.43 0.19 0.34 0.51 0.24 0.44 0.64 0.33 0.62 0.90 30.00 1.12 1.20 1.35 1.75 Rev.1.01.10 2 - 53 TC200G SERIES DATA SHEET AO4 AO4 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.48 0.79 0.23 0.48 0.79 0.24 0.49 0.80 0.27 0.55 0.86 30.00 2.03 2.03 2.03 2.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION B->Z ~A&C&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.16 0.23 0.31 0.44 5.00 0.32 0.41 0.52 0.74 FUNCTION FALL 10.00 0.53 0.61 0.74 1.04 30.00 1.35 1.44 1.58 1.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.21 0.46 0.77 0.21 0.47 0.78 0.24 0.52 0.84 30.00 2.01 2.01 2.01 2.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.32 0.54 0.21 0.40 0.62 0.28 0.51 0.75 0.41 0.73 1.04 30.00 1.40 1.49 1.63 2.05 Rev.1.01.10 2 - 54 TC200G SERIES DATA SHEET AO4 AO4 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.57 0.88 0.31 0.56 0.88 0.34 0.58 0.89 0.44 0.69 0.99 30.00 2.12 2.11 2.11 2.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION C->Z ~D&A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.14 0.19 0.24 0.29 5.00 0.26 0.33 0.40 0.53 FUNCTION FALL 10.00 0.42 0.49 0.58 0.76 30.00 1.05 1.12 1.22 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.55 0.86 0.29 0.54 0.85 0.31 0.55 0.86 0.40 0.65 0.95 30.00 2.09 2.09 2.09 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.33 0.53 0.21 0.38 0.58 0.25 0.44 0.65 0.29 0.55 0.81 30.00 1.36 1.41 1.48 1.69 Rev.1.01.10 2 - 55 TC200G SERIES DATA SHEET AO4 AO4 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.57 0.88 0.31 0.56 0.87 0.33 0.57 0.88 0.42 0.67 0.97 30.00 2.11 2.11 2.11 2.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION C->Z ~D&~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.18 0.23 0.28 0.33 5.00 0.35 0.40 0.46 0.58 FUNCTION FALL 10.00 0.56 0.61 0.67 0.83 30.00 1.38 1.43 1.50 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH CONDITION PATH CONDITION D->Z ~C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.55 0.86 0.31 0.56 0.87 0.37 0.62 0.92 0.56 0.82 1.13 30.00 2.10 2.11 2.15 2.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION D->Z ~C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.27 0.44 0.19 0.33 0.51 0.24 0.41 0.60 0.28 0.53 0.79 30.00 1.11 1.18 1.29 1.58 Rev.1.01.10 2 - 56 TC200G SERIES DATA SHEET AO4 AO4 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z ~C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.53 0.84 0.28 0.54 0.85 0.34 0.59 0.90 0.51 0.79 1.10 30.00 2.07 2.08 2.12 2.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION D->Z ~C&A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.20 0.24 0.27 5.00 0.33 0.38 0.44 0.55 FUNCTION FALL 10.00 0.54 0.60 0.67 0.83 30.00 1.41 1.47 1.54 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.34 PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.55 0.86 0.30 0.56 0.87 0.36 0.61 0.92 0.54 0.81 1.12 30.00 2.10 2.10 2.14 2.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0775 0.17 PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.35 0.57 0.23 0.40 0.62 0.27 0.47 0.69 0.32 0.58 0.86 30.00 1.44 1.49 1.57 1.79 Rev.1.01.10 2 - 57 TC200G SERIES DATA SHEET AO4P CELL NAME AO4P FUNCTION 2-WIDE 2-INPUT OR into 2-INPUT NAND 4 LOGIC SYMBOL 0 AO4P CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B AO4P Z C D TRUTH TABLE INPUT A B C D L L L L L L L H L L H L L L H H L H L L H L L L H H L L ALL OTHER COMBINATIONS OUTPUT Z H H H H H H H L Verilog-HDL DESCRIPTION AO4P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:AO4P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A,B C D (LU) LOAD 2.17 1.98 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 39.1 Rev.1.01.10 2 - 58 TC200G SERIES DATA SHEET AO4P AO4P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.28 0.44 0.17 0.30 0.46 0.21 0.35 0.51 0.32 0.48 0.67 30.00 1.06 1.08 1.12 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION A->Z ~B&C&D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.16 0.21 0.26 5.00 0.17 0.25 0.34 0.46 FUNCTION FALL 10.00 0.27 0.36 0.47 0.65 30.00 0.66 0.75 0.89 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.30 0.46 0.19 0.32 0.48 0.23 0.37 0.53 0.31 0.48 0.66 30.00 1.08 1.10 1.14 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.23 0.35 0.21 0.32 0.44 0.28 0.41 0.56 0.39 0.58 0.78 30.00 0.83 0.91 1.06 1.41 Rev.1.01.10 2 - 59 TC200G SERIES DATA SHEET AO4P AO4P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.28 0.44 0.17 0.30 0.46 0.21 0.35 0.51 0.28 0.46 0.64 30.00 1.06 1.08 1.12 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION A->Z ~B&~C&D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.18 0.23 0.32 5.00 0.21 0.29 0.38 0.53 FUNCTION FALL 10.00 0.33 0.41 0.53 0.74 30.00 0.80 0.89 1.03 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION B->Z ~A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.31 0.46 0.17 0.30 0.46 0.18 0.31 0.47 0.21 0.36 0.53 30.00 1.08 1.09 1.09 1.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION B->Z ~A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.19 0.29 0.18 0.27 0.37 0.24 0.36 0.49 0.33 0.51 0.69 30.00 0.68 0.77 0.91 1.25 Rev.1.01.10 2 - 60 TC200G SERIES DATA SHEET AO4P AO4P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.33 0.48 0.19 0.33 0.49 0.20 0.33 0.49 0.20 0.35 0.53 30.00 1.10 1.11 1.11 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION B->Z ~A&C&~D PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.16 0.23 0.31 0.46 5.00 0.25 0.34 0.44 0.64 FUNCTION FALL 10.00 0.37 0.46 0.58 0.83 30.00 0.85 0.93 1.08 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.31 0.46 0.17 0.31 0.46 0.18 0.31 0.47 0.18 0.33 0.50 30.00 1.08 1.09 1.09 1.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.23 0.35 0.20 0.31 0.43 0.27 0.41 0.55 0.40 0.59 0.79 30.00 0.83 0.91 1.05 1.41 Rev.1.01.10 2 - 61 TC200G SERIES DATA SHEET AO4P AO4P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.42 0.57 0.28 0.41 0.57 0.30 0.43 0.58 0.39 0.52 0.68 30.00 1.19 1.19 1.19 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION C->Z ~D&A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.14 0.19 0.24 0.30 5.00 0.22 0.27 0.34 0.43 FUNCTION FALL 10.00 0.31 0.37 0.44 0.58 30.00 0.67 0.74 0.83 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.39 0.55 0.26 0.39 0.54 0.27 0.40 0.55 0.34 0.47 0.63 30.00 1.17 1.17 1.17 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.26 0.38 0.21 0.31 0.43 0.25 0.36 0.48 0.29 0.45 0.61 30.00 0.86 0.90 0.97 1.15 Rev.1.01.10 2 - 62 TC200G SERIES DATA SHEET AO4P AO4P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.41 0.57 0.28 0.41 0.56 0.29 0.42 0.57 0.36 0.50 0.65 30.00 1.19 1.19 1.19 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION C->Z ~D&~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.19 0.23 0.28 0.34 5.00 0.29 0.33 0.38 0.48 FUNCTION FALL 10.00 0.41 0.45 0.51 0.64 30.00 0.88 0.93 0.99 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION D->Z ~C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.40 0.55 0.28 0.41 0.56 0.34 0.47 0.62 0.52 0.66 0.82 30.00 1.17 1.18 1.23 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION D->Z ~C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.20 0.29 0.18 0.26 0.35 0.22 0.32 0.43 0.24 0.39 0.55 30.00 0.66 0.72 0.81 1.03 Rev.1.01.10 2 - 63 TC200G SERIES DATA SHEET AO4P AO4P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z ~C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.53 0.26 0.38 0.54 0.31 0.44 0.60 0.47 0.62 0.78 30.00 1.15 1.16 1.20 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION D->Z ~C&A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.14 0.19 0.22 0.24 5.00 0.24 0.29 0.34 0.40 FUNCTION FALL 10.00 0.36 0.41 0.46 0.57 30.00 0.83 0.89 0.95 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.39 0.55 0.28 0.40 0.56 0.33 0.46 0.62 0.49 0.64 0.80 30.00 1.17 1.18 1.22 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0420 0.20 PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.26 0.38 0.21 0.31 0.43 0.25 0.36 0.49 0.29 0.44 0.60 30.00 0.86 0.91 0.97 1.15 Rev.1.01.10 2 - 64 TC200G SERIES DATA SHEET AO5 CELL NAME AO5 FUNCTION INVERTING 2 of 3 MAJORITY GATE 3 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H H L ALL OTHER COMBINATIONS Z AO5 CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. C L H L L A AO5 B OUTPUT Z H H H H L C Verilog-HDL DESCRIPTION AO5 inst(Z,A,B,C); VHDL DESCRIPTION inst:AO5 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.98 1.97 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 18.0 Rev.1.01.10 2 - 65 TC200G SERIES DATA SHEET AO5 AO5 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1896 0.78 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.61 0.91 0.37 0.62 0.92 0.42 0.67 0.96 0.58 0.84 1.15 30.00 2.09 2.10 2.14 2.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0739 0.29 PATH CONDITION PATH CONDITION A->Z B&~C PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.29 0.37 0.49 5.00 0.35 0.44 0.56 0.76 FUNCTION FALL 10.00 0.54 0.63 0.76 1.03 30.00 1.28 1.37 1.51 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1896 0.78 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.60 0.91 0.36 0.61 0.93 0.41 0.66 0.97 0.57 0.84 1.16 30.00 2.15 2.18 2.21 2.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0739 0.29 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.51 0.27 0.42 0.59 0.35 0.53 0.72 0.45 0.71 0.98 30.00 1.20 1.29 1.43 1.81 Rev.1.01.10 2 - 66 TC200G SERIES DATA SHEET AO5 AO5 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1896 0.78 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.73 1.06 0.45 0.72 1.05 0.50 0.77 1.09 0.70 0.97 1.30 30.00 2.37 2.37 2.41 2.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0739 0.29 PATH CONDITION PATH CONDITION B->Z A&~C PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.26 0.32 0.37 5.00 0.36 0.42 0.49 0.61 FUNCTION FALL 10.00 0.54 0.60 0.69 0.87 30.00 1.28 1.34 1.44 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1896 0.78 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.60 0.90 0.34 0.59 0.90 0.34 0.60 0.91 0.39 0.65 0.97 30.00 2.14 2.14 2.14 2.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0739 0.29 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.40 0.61 0.31 0.49 0.69 0.41 0.61 0.83 0.58 0.85 1.14 30.00 1.44 1.52 1.66 2.08 Rev.1.01.10 2 - 67 TC200G SERIES DATA SHEET AO5 AO5 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1896 0.78 PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.70 1.02 0.42 0.69 1.02 0.43 0.69 1.02 0.53 0.78 1.10 30.00 2.34 2.33 2.32 2.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0739 0.29 PATH CONDITION PATH CONDITION C->Z A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.25 0.31 0.38 5.00 0.34 0.40 0.47 0.60 FUNCTION FALL 10.00 0.51 0.57 0.65 0.83 30.00 1.21 1.27 1.36 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1896 0.78 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.60 0.89 0.36 0.60 0.89 0.37 0.61 0.90 0.45 0.69 0.98 30.00 2.07 2.07 2.07 2.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0739 0.29 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.40 0.61 0.28 0.45 0.66 0.33 0.51 0.72 0.41 0.64 0.89 30.00 1.43 1.48 1.55 1.77 Rev.1.01.10 2 - 68 TC200G SERIES DATA SHEET AO5P CELL NAME AO5P FUNCTION INVERTING 2 of 3 MAJORITY GATE 5 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H H L ALL OTHER COMBINATIONS Z AO5P CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. C L H L L A AO5P B OUTPUT Z H H H H L C Verilog-HDL DESCRIPTION AO5P inst(Z,A,B,C); VHDL DESCRIPTION inst:AO5P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 4.14 3.97 2.19 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 30.2 Rev.1.01.10 2 - 69 TC200G SERIES DATA SHEET AO5P AO5P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1114 0.85 PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.47 0.63 0.34 0.47 0.63 0.39 0.52 0.68 0.55 0.69 0.86 30.00 1.25 1.26 1.30 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0432 0.33 PATH CONDITION PATH CONDITION A->Z B&~C PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.25 0.33 0.42 5.00 0.24 0.33 0.43 0.57 FUNCTION FALL 10.00 0.34 0.42 0.54 0.73 30.00 0.70 0.79 0.92 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1114 0.85 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.59 0.31 0.44 0.60 0.36 0.49 0.65 0.50 0.65 0.82 30.00 1.21 1.23 1.27 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0432 0.33 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.24 0.34 0.25 0.33 0.42 0.32 0.43 0.54 0.41 0.57 0.73 30.00 0.70 0.78 0.92 1.24 Rev.1.01.10 2 - 70 TC200G SERIES DATA SHEET AO5P AO5P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1114 0.85 PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.62 0.82 0.45 0.61 0.80 0.50 0.66 0.85 0.72 0.88 1.07 30.00 1.58 1.57 1.61 1.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0432 0.33 PATH CONDITION PATH CONDITION B->Z A&~C PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.23 0.27 0.29 5.00 0.24 0.30 0.37 0.43 FUNCTION FALL 10.00 0.33 0.39 0.47 0.58 30.00 0.69 0.76 0.84 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1114 0.85 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.42 0.58 0.29 0.41 0.57 0.29 0.42 0.58 0.30 0.44 0.61 30.00 1.19 1.20 1.20 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0432 0.33 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.33 0.46 0.32 0.42 0.54 0.41 0.53 0.67 0.59 0.76 0.94 30.00 0.94 1.03 1.17 1.54 Rev.1.01.10 2 - 71 TC200G SERIES DATA SHEET AO5P AO5P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1114 0.85 PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.60 0.79 0.43 0.58 0.78 0.43 0.58 0.77 0.53 0.68 0.86 30.00 1.55 1.54 1.53 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0432 0.33 PATH CONDITION PATH CONDITION C->Z A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.18 0.23 0.29 0.35 5.00 0.25 0.31 0.38 0.47 FUNCTION FALL 10.00 0.34 0.40 0.48 0.61 30.00 0.71 0.77 0.85 1.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1114 0.85 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.46 0.62 0.33 0.46 0.62 0.34 0.47 0.62 0.41 0.54 0.70 30.00 1.24 1.24 1.24 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0432 0.33 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.34 0.46 0.28 0.38 0.50 0.33 0.43 0.56 0.40 0.54 0.69 30.00 0.94 0.99 1.05 1.23 Rev.1.01.10 2 - 72 TC200G SERIES DATA SHEET AO6 CELL NAME AO6 FUNCTION 2-INPUT AND into 2-INPUT NOR 2 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L H H L ALL OTHER COMBINATIONS A B C AO6 Z AO6 CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. C L L L OUTPUT Z H H H L Verilog-HDL DESCRIPTION AO6 inst(Z,A,B,C); VHDL DESCRIPTION inst:AO6 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.07 1.03 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 20.1 Rev.1.01.10 2 - 73 TC200G SERIES DATA SHEET AO6 AO6 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.53 0.87 0.27 0.54 0.88 0.34 0.61 0.94 0.53 0.82 1.16 30.00 2.22 2.24 2.28 2.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.12 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.17 0.21 0.22 5.00 0.27 0.33 0.40 0.50 FUNCTION FALL 10.00 0.46 0.52 0.60 0.76 30.00 1.20 1.26 1.35 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.48 0.82 0.23 0.50 0.84 0.28 0.56 0.89 0.43 0.75 1.10 30.00 2.17 2.19 2.24 2.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.12 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.26 0.44 0.18 0.34 0.53 0.23 0.44 0.65 0.27 0.59 0.89 30.00 1.18 1.27 1.41 1.79 Rev.1.01.10 2 - 74 TC200G SERIES DATA SHEET AO6 AO6 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.52 0.86 0.24 0.52 0.86 0.26 0.53 0.86 0.37 0.64 0.97 30.00 2.22 2.22 2.20 2.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.12 PATH CONDITION PATH CONDITION C->Z A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.14 0.19 0.21 5.00 0.18 0.25 0.34 0.45 FUNCTION FALL 10.00 0.29 0.37 0.49 0.67 30.00 0.74 0.83 0.97 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.57 0.91 0.29 0.57 0.91 0.31 0.58 0.91 0.42 0.69 1.01 30.00 2.27 2.27 2.26 2.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.12 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.19 0.30 0.16 0.27 0.39 0.21 0.35 0.50 0.24 0.47 0.69 30.00 0.76 0.84 0.98 1.33 Rev.1.01.10 2 - 75 TC200G SERIES DATA SHEET AO6 AO6 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.42 0.67 0.21 0.42 0.68 0.24 0.44 0.70 0.33 0.56 0.82 30.00 1.70 1.71 1.72 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.12 PATH CONDITION PATH CONDITION C->Z ~A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.16 0.21 0.25 5.00 0.18 0.26 0.35 0.48 FUNCTION FALL 10.00 0.30 0.38 0.50 0.70 30.00 0.75 0.84 0.98 1.33 Rev.1.01.10 2 - 76 TC200G SERIES DATA SHEET AO6P CELL NAME AO6P FUNCTION 2-INPUT AND into 2-INPUT NOR 3 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L H H L ALL OTHER COMBINATIONS A B C AO6P Z AO6P CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. C L L L OUTPUT Z H H H L Verilog-HDL DESCRIPTION AO6P inst(Z,A,B,C); VHDL DESCRIPTION inst:AO6P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 2.11 2.03 1.96 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 39.3 Rev.1.01.10 2 - 77 TC200G SERIES DATA SHEET AO6P AO6P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1001 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.37 0.54 0.24 0.38 0.55 0.31 0.45 0.62 0.50 0.66 0.84 30.00 1.24 1.25 1.30 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0318 0.14 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.15 0.18 0.17 5.00 0.18 0.23 0.29 0.33 FUNCTION FALL 10.00 0.27 0.33 0.40 0.50 30.00 0.64 0.70 0.79 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1001 0.29 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.19 0.33 0.51 0.25 0.39 0.57 0.40 0.57 0.77 30.00 1.19 1.21 1.25 1.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0318 0.14 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.16 0.26 0.15 0.24 0.34 0.19 0.31 0.44 0.21 0.40 0.59 30.00 0.63 0.71 0.84 1.14 Rev.1.01.10 2 - 78 TC200G SERIES DATA SHEET AO6P AO6P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1001 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.37 0.54 0.21 0.36 0.54 0.23 0.37 0.54 0.31 0.46 0.63 30.00 1.24 1.24 1.23 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0318 0.14 PATH CONDITION PATH CONDITION C->Z A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.15 0.19 0.23 5.00 0.15 0.22 0.29 0.38 FUNCTION FALL 10.00 0.22 0.30 0.39 0.54 30.00 0.50 0.58 0.71 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1001 0.29 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.42 0.60 0.27 0.41 0.59 0.28 0.42 0.59 0.37 0.51 0.69 30.00 1.29 1.29 1.28 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0318 0.14 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.16 0.23 0.17 0.24 0.31 0.22 0.31 0.41 0.27 0.41 0.56 30.00 0.51 0.60 0.73 1.01 Rev.1.01.10 2 - 79 TC200G SERIES DATA SHEET AO6P AO6P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1001 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.30 0.44 0.19 0.30 0.44 0.21 0.32 0.46 0.29 0.41 0.56 30.00 0.97 0.97 0.99 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0318 0.14 PATH CONDITION PATH CONDITION C->Z ~A&~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.17 0.22 0.28 5.00 0.15 0.23 0.31 0.42 FUNCTION FALL 10.00 0.23 0.31 0.41 0.57 30.00 0.50 0.59 0.72 1.01 Rev.1.01.10 2 - 80 TC200G SERIES DATA SHEET AO7 CELL NAME AO7 FUNCTION 2-INPUT OR into 2-INPUT NAND 2 LOGIC SYMBOL TRUTH TABLE INPUT A B L H H L H H ALL OTHER COMBINATIONS A B C AO7 Z AO7 CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. C H H H OUTPUT Z L L L H Verilog-HDL DESCRIPTION AO7 inst(Z,A,B,C); VHDL DESCRIPTION inst:AO7 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.08 1.03 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 21.6 Rev.1.01.10 2 - 81 TC200G SERIES DATA SHEET AO7 AO7 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.21 0.46 0.77 0.22 0.47 0.78 0.25 0.53 0.84 30.00 2.01 2.01 2.01 2.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0726 0.16 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.13 0.21 0.27 0.39 5.00 0.30 0.38 0.49 0.70 FUNCTION FALL 10.00 0.50 0.59 0.72 1.00 30.00 1.32 1.40 1.55 1.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.75 0.20 0.45 0.76 0.25 0.51 0.82 0.36 0.66 0.99 30.00 1.98 2.00 2.04 2.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0726 0.16 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.28 0.48 0.19 0.36 0.57 0.24 0.47 0.70 0.32 0.66 0.97 30.00 1.30 1.39 1.53 1.94 Rev.1.01.10 2 - 82 TC200G SERIES DATA SHEET AO7 AO7 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.18 0.31 0.47 0.22 0.36 0.53 0.30 0.47 0.67 30.00 1.08 1.11 1.17 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0726 0.16 PATH CONDITION PATH CONDITION C->Z A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.18 0.23 0.30 5.00 0.25 0.31 0.39 0.53 FUNCTION FALL 10.00 0.40 0.47 0.56 0.75 30.00 1.02 1.09 1.19 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.17 0.31 0.47 0.20 0.35 0.52 0.26 0.45 0.65 30.00 1.08 1.11 1.16 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0726 0.16 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.33 0.53 0.21 0.37 0.58 0.26 0.44 0.65 0.34 0.58 0.82 30.00 1.35 1.40 1.47 1.69 Rev.1.01.10 2 - 83 TC200G SERIES DATA SHEET AO7 AO7 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1783 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.17 0.31 0.47 0.20 0.35 0.52 0.26 0.45 0.65 30.00 1.08 1.11 1.16 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0726 0.16 PATH CONDITION PATH CONDITION C->Z ~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.16 0.21 0.26 0.34 5.00 0.33 0.37 0.44 0.58 FUNCTION FALL 10.00 0.53 0.58 0.65 0.82 30.00 1.35 1.40 1.47 1.69 Rev.1.01.10 2 - 84 TC200G SERIES DATA SHEET AO7P CELL NAME AO7P FUNCTION 2-INPUT OR into 2-INPUT NAND 3 LOGIC SYMBOL TRUTH TABLE INPUT A B L H H L H H ALL OTHER COMBINATIONS A B C AO7P Z AO7P CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. C H H H OUTPUT Z L L L H Verilog-HDL DESCRIPTION AO7P inst(Z,A,B,C); VHDL DESCRIPTION inst:AO7P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 2.11 2.03 1.96 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 42.7 Rev.1.01.10 2 - 85 TC200G SERIES DATA SHEET AO7P AO7P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.30 0.46 0.17 0.30 0.46 0.18 0.31 0.47 0.20 0.35 0.52 30.00 1.08 1.08 1.09 1.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0376 0.18 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.19 0.25 0.35 5.00 0.21 0.28 0.37 0.54 FUNCTION FALL 10.00 0.31 0.40 0.51 0.73 30.00 0.74 0.83 0.97 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.17 0.30 0.45 0.21 0.35 0.51 0.30 0.47 0.66 30.00 1.05 1.07 1.12 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0376 0.18 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.18 0.29 0.17 0.26 0.38 0.21 0.35 0.49 0.28 0.48 0.68 30.00 0.72 0.81 0.95 1.28 Rev.1.01.10 2 - 86 TC200G SERIES DATA SHEET AO7P AO7P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.25 0.34 0.19 0.27 0.37 0.23 0.32 0.42 0.33 0.44 0.56 30.00 0.74 0.76 0.82 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0376 0.18 PATH CONDITION PATH CONDITION C->Z A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.17 0.21 0.27 5.00 0.18 0.24 0.31 0.41 FUNCTION FALL 10.00 0.26 0.33 0.41 0.55 30.00 0.60 0.66 0.76 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.24 0.34 0.18 0.27 0.36 0.22 0.31 0.42 0.30 0.41 0.54 30.00 0.73 0.76 0.81 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0376 0.18 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.24 0.34 0.20 0.28 0.39 0.24 0.34 0.46 0.31 0.45 0.60 30.00 0.77 0.83 0.90 1.10 Rev.1.01.10 2 - 87 TC200G SERIES DATA SHEET AO7P AO7P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0890 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.23 0.33 0.17 0.25 0.35 0.21 0.30 0.40 0.29 0.40 0.53 30.00 0.72 0.74 0.80 0.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0376 0.18 PATH CONDITION PATH CONDITION C->Z ~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.13 0.17 0.21 0.27 5.00 0.21 0.26 0.32 0.41 FUNCTION FALL 10.00 0.32 0.37 0.44 0.57 30.00 0.75 0.80 0.87 1.07 Rev.1.01.10 2 - 88 TC200G SERIES DATA SHEET BTS4 CELL NAME BTS4 FUNCTION TRI-STATE INTERNAL BUFFER ( HIGH ENABLE ) TRUTH TABLE INPUT E H H L BTS4 CELL COUNT GATE 3 I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A L H X OUTPUT Z L H HZ A EBTS4 Z Verilog-HDL DESCRIPTION BTS4 inst(Z,A,E); VHDL DESCRIPTION inst:BTS4 port map(Z,A,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT CAPACITANCE PIN NAME Cin (LU) Z 0.79 INPUT LOAD PIN NAME A E (LU) TYPICAL 2.17 2.04 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 45.2 Rev.1.01.11 2 - 89 TC200G SERIES DATA SHEET BTS4 BTS4 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0944 0.09 PATH DELAY (ns) 1.79 5.79 10.79 0.17 0.31 0.47 0.21 0.35 0.52 0.25 0.40 0.56 0.32 0.48 0.66 30.79 1.13 1.17 1.23 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0399 0.08 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.79 5.79 10.79 0.23 0.34 0.47 0.23 0.34 0.46 0.27 0.38 0.51 0.38 0.51 0.65 30.79 0.94 0.93 0.98 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0399 0.08 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 1-Z PATH DELAY (ns) 1.79 5.79 10.79 0.12 0.12 0.12 0.16 0.16 0.16 0.21 0.21 0.21 0.31 0.31 0.31 30.79 0.12 0.16 0.21 0.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0944 0.09 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 0-Z PATH DELAY (ns) 1.79 5.79 10.79 0.19 0.19 0.19 0.22 0.22 0.22 0.27 0.27 0.27 0.40 0.40 0.40 30.79 0.19 0.22 0.27 0.40 Rev.1.01.11 2 - 90 TC200G SERIES DATA SHEET BTS4 BTS4 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-1 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0944 0.09 PATH DELAY (ns) 1.79 5.79 10.79 0.14 0.28 0.44 0.20 0.34 0.50 0.26 0.40 0.57 0.37 0.53 0.71 30.79 1.10 1.16 1.22 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0399 0.08 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-0 PATH DELAY (ns) 1.79 5.79 10.79 0.26 0.37 0.50 0.31 0.43 0.55 0.37 0.48 0.61 0.46 0.57 0.70 30.79 0.97 1.02 1.08 1.17 Rev.1.01.11 2 - 91 TC200G SERIES DATA SHEET BTS4P CELL NAME BTS4P FUNCTION TRI-STATE INTERNAL BUFFER ( HIGH ENABLE ) TRUTH TABLE INPUT E H H L BTS4P CELL COUNT GATE 4 I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A L H X OUTPUT Z L H HZ A EBTS4P Z Verilog-HDL DESCRIPTION BTS4P inst(Z,A,E); VHDL DESCRIPTION inst:BTS4P port map(Z,A,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT CAPACITANCE PIN NAME Cin (LU) Z 0.79 INPUT LOAD PIN NAME A E (LU) TYPICAL 2.14 2.05 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 85.4 Rev.1.01.11 2 - 92 TC200G SERIES DATA SHEET BTS4P BTS4P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0462 0.11 PATH DELAY (ns) 1.79 5.79 10.79 0.16 0.24 0.33 0.22 0.29 0.38 0.27 0.35 0.43 0.37 0.45 0.55 30.79 0.65 0.70 0.76 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0244 0.10 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.79 5.79 10.79 0.24 0.32 0.40 0.24 0.32 0.40 0.28 0.36 0.44 0.39 0.48 0.57 30.79 0.70 0.69 0.74 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0244 0.10 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 1-Z PATH DELAY (ns) 1.79 5.79 10.79 0.16 0.16 0.16 0.19 0.19 0.19 0.25 0.25 0.25 0.37 0.37 0.37 30.79 0.16 0.19 0.25 0.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0462 0.11 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 0-Z PATH DELAY (ns) 1.79 5.79 10.79 0.21 0.21 0.21 0.24 0.24 0.24 0.29 0.29 0.29 0.41 0.41 0.41 30.79 0.21 0.24 0.29 0.41 Rev.1.01.11 2 - 93 TC200G SERIES DATA SHEET BTS4P BTS4P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-1 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0462 0.11 PATH DELAY (ns) 1.79 5.79 10.79 0.14 0.22 0.30 0.20 0.28 0.37 0.27 0.35 0.44 0.39 0.49 0.59 30.79 0.63 0.69 0.77 0.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0244 0.10 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-0 PATH DELAY (ns) 1.79 5.79 10.79 0.27 0.34 0.43 0.32 0.40 0.48 0.37 0.45 0.53 0.45 0.53 0.62 30.79 0.72 0.78 0.83 0.91 Rev.1.01.11 2 - 94 TC200G SERIES DATA SHEET BTS5 CELL NAME BTS5 FUNCTION TRI-STATE INTERNAL INVERTING BUFFER ( HIGH ENABLE ) TRUTH TABLE INPUT E H H L BTS5 CELL COUNT GATE 3 I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A L H X OUTPUT Z H L HZ A EBTS5 Z Verilog-HDL DESCRIPTION BTS5 inst(Z,A,E); VHDL DESCRIPTION inst:BTS5 port map(Z,A,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT CAPACITANCE PIN NAME Cin (LU) Z 0.79 INPUT LOAD PIN NAME A E (LU) TYPICAL 0.99 1.48 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 39.0 Rev.1.01.11 2 - 95 TC200G SERIES DATA SHEET BTS5 BTS5 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0901 0.08 PATH DELAY (ns) 1.79 5.79 10.79 0.31 0.45 0.60 0.34 0.48 0.63 0.41 0.54 0.70 0.54 0.68 0.83 30.79 1.21 1.25 1.31 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0662 0.08 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.79 5.79 10.79 0.26 0.41 0.60 0.33 0.49 0.67 0.40 0.55 0.74 0.52 0.67 0.86 30.79 1.34 1.41 1.48 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0662 0.08 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 1-Z PATH DELAY (ns) 1.79 5.79 10.79 0.12 0.12 0.12 0.16 0.16 0.16 0.21 0.21 0.21 0.31 0.31 0.31 30.79 0.12 0.16 0.21 0.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0901 0.08 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 0-Z PATH DELAY (ns) 1.79 5.79 10.79 0.00 0.00 0.00 0.05 0.05 0.05 0.14 0.14 0.14 0.41 0.41 0.41 30.79 0.00 0.05 0.14 0.41 Rev.1.01.11 2 - 96 TC200G SERIES DATA SHEET BTS5 BTS5 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-1 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0901 0.08 PATH DELAY (ns) 1.79 5.79 10.79 0.14 0.27 0.43 0.21 0.34 0.49 0.26 0.40 0.56 0.38 0.54 0.70 30.79 1.04 1.10 1.17 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0662 0.08 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-0 PATH DELAY (ns) 1.79 5.79 10.79 0.10 0.25 0.44 0.14 0.30 0.49 0.14 0.35 0.56 0.01 0.35 0.65 30.79 1.18 1.23 1.32 1.54 Rev.1.01.11 2 - 97 TC200G SERIES DATA SHEET BTS5P CELL NAME BTS5P FUNCTION TRI-STATE INTERNAL INVERTING BUFFER ( HIGH ENABLE ) TRUTH TABLE INPUT E H H L BTS5P CELL COUNT GATE 4 I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A L H X OUTPUT Z H L HZ A EBTS5P Z Verilog-HDL DESCRIPTION BTS5P inst(Z,A,E); VHDL DESCRIPTION inst:BTS5P port map(Z,A,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT CAPACITANCE PIN NAME Cin (LU) Z 0.79 INPUT LOAD PIN NAME A E (LU) TYPICAL 0.99 1.95 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 67.8 Rev.1.01.11 2 - 98 TC200G SERIES DATA SHEET BTS5P BTS5P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0451 0.07 PATH DELAY (ns) 1.79 5.79 10.79 0.29 0.37 0.46 0.33 0.41 0.49 0.39 0.47 0.55 0.52 0.60 0.69 30.79 0.77 0.81 0.87 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.79 5.79 10.79 0.26 0.37 0.50 0.34 0.44 0.57 0.40 0.51 0.64 0.52 0.63 0.76 30.79 0.99 1.07 1.14 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.09 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 1-Z PATH DELAY (ns) 1.79 5.79 10.79 0.16 0.16 0.16 0.19 0.19 0.19 0.25 0.25 0.25 0.37 0.37 0.37 30.79 0.16 0.19 0.25 0.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0451 0.07 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 0-Z PATH DELAY (ns) 1.79 5.79 10.79 0.00 0.00 0.00 0.05 0.05 0.05 0.14 0.14 0.14 0.41 0.41 0.41 30.79 0.00 0.05 0.14 0.41 Rev.1.01.11 2 - 99 TC200G SERIES DATA SHEET BTS5P BTS5P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-1 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0451 0.07 PATH DELAY (ns) 1.79 5.79 10.79 0.13 0.20 0.28 0.19 0.27 0.35 0.25 0.34 0.42 0.37 0.48 0.57 30.79 0.60 0.67 0.74 0.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.09 PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION Z-0 PATH DELAY (ns) 1.79 5.79 10.79 0.08 0.19 0.32 0.11 0.22 0.35 0.09 0.24 0.39 -0.08 0.15 0.36 30.79 0.82 0.85 0.90 1.01 Rev.1.01.11 2 - 100 TC200G SERIES DATA SHEET B2I CELL NAME B2I FUNCTION INVERTER into 3 PARALLEL INVERTERS 2 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 B2I CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z1 H L Z2 L H A B2I Z1 Z2 Verilog-HDL DESCRIPTION B2I inst(Z1,Z2,A); VHDL DESCRIPTION inst:B2I port map(Z1,Z2,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1 6880.0 (LU*MHz) Z2 12880.0 INPUT LOAD PIN NAME A (LU) LOAD 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z1 36.9 Z2 95.5 Rev.1.01.10 2 - 101 TC200G SERIES DATA SHEET B2I B2I 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0976 0.47 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.34 0.51 0.23 0.37 0.53 0.28 0.42 0.60 0.39 0.57 0.76 30.00 1.17 1.20 1.26 1.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0397 0.24 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.24 0.35 0.21 0.32 0.44 0.30 0.43 0.56 0.43 0.62 0.81 30.00 0.81 0.90 1.04 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0341 0.11 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.10 0.16 0.07 0.12 0.18 0.08 0.14 0.22 0.09 0.18 0.27 30.00 0.38 0.41 0.46 0.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0151 0.10 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.04 0.08 0.12 0.09 0.14 0.20 0.12 0.20 0.28 0.16 0.29 0.41 30.00 0.31 0.40 0.52 0.76 Rev.1.01.10 2 - 102 TC200G SERIES DATA SHEET B2IP CELL NAME B2IP FUNCTION INVERTER into 3 PARALLEL INVERTERS 4 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 B2IP CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z1 H L Z2 L H A B2IP Z1 Z2 Verilog-HDL DESCRIPTION B2IP inst(Z1,Z2,A); VHDL DESCRIPTION inst:B2IP port map(Z1,Z2,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1 6880.0 (LU*MHz) Z2 12880.0 INPUT LOAD PIN NAME A (LU) LOAD 2.15 OUTPUT DRIVE PIN NAME DRIVE Z1 75.0 (LU) Z2 169.6 Rev.1.01.10 2 - 103 TC200G SERIES DATA SHEET B2IP B2IP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0450 0.42 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.22 0.30 0.19 0.25 0.33 0.23 0.30 0.38 0.31 0.40 0.50 30.00 0.61 0.64 0.70 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0230 0.29 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.20 0.27 0.22 0.28 0.35 0.29 0.37 0.45 0.41 0.52 0.64 30.00 0.54 0.62 0.75 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0169 0.10 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.04 0.07 0.10 0.06 0.09 0.12 0.08 0.12 0.16 0.12 0.17 0.23 30.00 0.23 0.25 0.30 0.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0072 0.10 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.03 0.05 0.07 0.06 0.10 0.13 0.07 0.12 0.17 0.07 0.14 0.22 30.00 0.16 0.24 0.31 0.44 Rev.1.01.10 2 - 104 TC200G SERIES DATA SHEET B3I CELL NAME B3I FUNCTION 2 PARALLEL INVERTERS into 2 PARALLEL INVERTERS TRUTH TABLE INPUT A L H B3I CELL COUNT GATE 2 I/O 0 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z1 H L Z2 L H A B3I Z1 Z2 Verilog-HDL DESCRIPTION B3I inst(Z1,Z2,A); VHDL DESCRIPTION inst:B3I port map(Z1,Z2,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1,Z2 6880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z1 77.4 Z2 68.5 Rev.1.01.10 2 - 105 TC200G SERIES DATA SHEET B3I B3I 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0444 0.20 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.15 0.23 0.11 0.18 0.26 0.14 0.22 0.31 0.19 0.30 0.41 30.00 0.54 0.57 0.63 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0231 0.15 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.13 0.20 0.13 0.20 0.27 0.17 0.27 0.36 0.25 0.38 0.52 30.00 0.47 0.55 0.68 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0541 0.08 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.13 0.23 0.08 0.16 0.25 0.10 0.20 0.30 0.15 0.28 0.40 30.00 0.59 0.62 0.68 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0225 0.09 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.04 0.09 0.16 0.08 0.16 0.24 0.10 0.21 0.31 0.11 0.28 0.43 30.00 0.43 0.52 0.64 0.88 Rev.1.01.10 2 - 106 TC200G SERIES DATA SHEET B3IP CELL NAME B3IP FUNCTION 2 PARALLEL INVERTERS into 2 PARALLEL INVERTERS TRUTH TABLE INPUT A L H B3IP CELL COUNT GATE 4 I/O 0 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z1 H L Z2 L H A B3IP Z1 Z2 Verilog-HDL DESCRIPTION B3IP inst(Z1,Z2,A); VHDL DESCRIPTION inst:B3IP port map(Z1,Z2,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1,Z2 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 4.12 OUTPUT DRIVE PIN NAME DRIVE Z1 142.6 (LU) Z2 122.6 Rev.1.01.10 2 - 107 TC200G SERIES DATA SHEET B3IP B3IP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0213 0.21 PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.11 0.15 0.10 0.14 0.18 0.13 0.17 0.22 0.18 0.23 0.30 30.00 0.31 0.34 0.39 0.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0113 0.15 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.09 0.13 0.12 0.16 0.20 0.16 0.21 0.27 0.23 0.30 0.38 30.00 0.27 0.35 0.45 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0262 0.09 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.09 0.13 0.06 0.11 0.16 0.08 0.14 0.20 0.13 0.20 0.28 30.00 0.32 0.34 0.40 0.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0108 0.10 PATH CONDITION PATH CONDITION Z1->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.03 0.06 0.09 0.07 0.11 0.16 0.08 0.15 0.21 0.08 0.18 0.28 30.00 0.23 0.31 0.40 0.57 Rev.1.01.10 2 - 108 TC200G SERIES DATA SHEET B4I CELL NAME B4I FUNCTION 4 PARALLEL INVERTERS 2 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 B4I CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z H L A B4I Z Verilog-HDL DESCRIPTION B4I inst(Z,A); VHDL DESCRIPTION inst:B4I port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 4.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 132.2 Rev.1.01.10 2 - 109 TC200G SERIES DATA SHEET B4I B4I 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0211 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.04 0.08 0.12 0.06 0.10 0.14 0.07 0.12 0.17 0.10 0.17 0.24 30.00 0.27 0.30 0.35 0.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0109 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.03 0.06 0.10 0.07 0.11 0.16 0.09 0.15 0.22 0.11 0.20 0.30 30.00 0.23 0.31 0.41 0.58 Rev.1.01.10 2 - 110 TC200G SERIES DATA SHEET B4IP CELL NAME B4IP FUNCTION 4 PARALLEL INVERTERS 4 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 B4IP CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z H L A B4IP Z Verilog-HDL DESCRIPTION B4IP inst(Z,A); VHDL DESCRIPTION inst:B4IP port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 8.05 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 219.1 Rev.1.01.10 2 - 111 TC200G SERIES DATA SHEET B4IP B4IP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0100 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.03 0.05 0.08 0.05 0.07 0.10 0.06 0.09 0.12 0.09 0.13 0.17 30.00 0.15 0.18 0.22 0.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0056 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.03 0.04 0.06 0.06 0.09 0.11 0.08 0.11 0.15 0.09 0.15 0.20 30.00 0.13 0.20 0.27 0.38 Rev.1.01.10 2 - 112 TC200G SERIES DATA SHEET B5I CELL NAME B5I FUNCTION 3 PARALLEL INVERTERS 2 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 B5I CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z H L A B5I Z Verilog-HDL DESCRIPTION B5I inst(Z,A); VHDL DESCRIPTION inst:B5I port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 3.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 109.3 Rev.1.01.10 2 - 113 TC200G SERIES DATA SHEET B5I B5I 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0282 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.09 0.14 0.07 0.11 0.17 0.09 0.15 0.21 0.12 0.21 0.29 30.00 0.35 0.38 0.43 0.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0136 0.10 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.04 0.07 0.11 0.08 0.13 0.19 0.10 0.18 0.25 0.12 0.24 0.35 30.00 0.28 0.37 0.48 0.68 Rev.1.01.10 2 - 114 TC200G SERIES DATA SHEET B5IP CELL NAME B5IP FUNCTION 3 PARALLEL INVERTERS 3 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 B5IP CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z H L A B5IP Z Verilog-HDL DESCRIPTION B5IP inst(Z,A); VHDL DESCRIPTION inst:B5IP port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 6.04 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 178.8 Rev.1.01.10 2 - 115 TC200G SERIES DATA SHEET B5IP B5IP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0136 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.04 0.06 0.09 0.05 0.08 0.11 0.07 0.10 0.14 0.09 0.14 0.19 30.00 0.19 0.22 0.27 0.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0073 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.03 0.05 0.07 0.06 0.10 0.13 0.08 0.13 0.17 0.10 0.17 0.24 30.00 0.16 0.24 0.32 0.45 Rev.1.01.10 2 - 116 TC200G SERIES DATA SHEET D24GL CELL NAME D24GL FUNCTION 2 TO 4 DECODER ( GATED OUTPUTS ACTIVE LOW ) TRUTH TABLE INPUT G A L X H L H H H L H H D24GL CELL COUNT GATE 7 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL D24GL AA Z0 Z0 B X L L H H Z0 H L H H H OUTPUT Z1 Z2 H H H H L H H L H H Z3 H H H H L BB Z1 Z1 Z2 Z2 Z3 Z3 GG Verilog-HDL DESCRIPTION D24GL inst(Z0,Z1,Z2,Z3,A,B,G); VHDL DESCRIPTION inst:D24GL port map(Z0,Z1,Z2,Z3,A,B,G); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B G (LU) LOAD 3.42 3.47 4.21 OUTPUT DRIVE PIN NAME Z0,Z1 DRIVE 28.0 Z2 28.4 (LU) Z3 29.5 Rev.1.01.10 2 - 117 TC200G SERIES DATA SHEET D24GL D24GL 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1001 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.36 0.53 0.29 0.43 0.60 0.35 0.49 0.67 0.44 0.59 0.77 30.00 1.21 1.29 1.35 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1115 0.20 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.36 0.39 0.46 0.61 5.00 0.62 0.65 0.72 0.87 FUNCTION FALL 10.00 0.94 0.97 1.04 1.19 30.00 2.18 2.21 2.28 2.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1001 0.13 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.27 0.44 0.15 0.30 0.47 0.16 0.33 0.52 0.13 0.35 0.59 30.00 1.12 1.15 1.21 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1115 0.20 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.44 0.75 0.26 0.50 0.81 0.33 0.61 0.92 0.53 0.86 1.22 30.00 1.99 2.05 2.16 2.51 Rev.1.01.10 2 - 118 TC200G SERIES DATA SHEET D24GL D24GL 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1000 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.36 0.53 0.29 0.43 0.61 0.35 0.50 0.67 0.45 0.60 0.78 30.00 1.22 1.29 1.36 1.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1062 0.18 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.36 0.39 0.45 0.61 5.00 0.60 0.63 0.70 0.85 FUNCTION FALL 10.00 0.90 0.93 1.00 1.15 30.00 2.09 2.12 2.19 2.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0999 0.19 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.27 0.44 0.15 0.30 0.47 0.17 0.34 0.52 0.18 0.39 0.62 30.00 1.12 1.15 1.21 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0909 0.16 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.37 0.63 0.22 0.43 0.69 0.29 0.53 0.79 0.45 0.75 1.06 30.00 1.66 1.72 1.82 2.15 Rev.1.01.10 2 - 119 TC200G SERIES DATA SHEET D24GL D24GL 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1001 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.50 0.26 0.40 0.58 0.32 0.46 0.64 0.40 0.56 0.74 30.00 1.19 1.26 1.32 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1115 0.20 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.36 0.43 0.58 5.00 0.60 0.63 0.69 0.85 FUNCTION FALL 10.00 0.91 0.94 1.01 1.16 30.00 2.15 2.18 2.25 2.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1001 0.13 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.50 0.26 0.40 0.58 0.32 0.46 0.64 0.40 0.56 0.74 30.00 1.19 1.26 1.32 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1115 0.20 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.60 0.91 0.37 0.63 0.94 0.43 0.70 1.01 0.59 0.85 1.17 30.00 2.15 2.18 2.25 2.41 Rev.1.01.10 2 - 120 TC200G SERIES DATA SHEET D24GL D24GL 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1000 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.13 0.31 0.50 0.08 0.32 0.56 30.00 1.10 1.13 1.19 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1062 0.18 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.16 0.23 0.32 0.53 5.00 0.40 0.48 0.60 0.89 FUNCTION FALL 10.00 0.69 0.78 0.91 1.26 30.00 1.88 1.96 2.10 2.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0999 0.19 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.24 0.42 0.13 0.27 0.45 0.14 0.31 0.50 0.11 0.34 0.58 30.00 1.10 1.13 1.19 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0909 0.16 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.35 0.60 0.21 0.43 0.68 0.29 0.55 0.82 0.48 0.81 1.15 30.00 1.63 1.71 1.85 2.27 Rev.1.01.10 2 - 121 TC200G SERIES DATA SHEET D24GL D24GL 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1001 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.30 0.47 0.18 0.32 0.49 0.20 0.36 0.55 0.20 0.42 0.64 30.00 1.15 1.17 1.22 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1115 0.20 PATH CONDITION PATH CONDITION G->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.23 0.26 0.30 0.39 5.00 0.48 0.52 0.56 0.68 FUNCTION FALL 10.00 0.80 0.83 0.87 1.01 30.00 2.04 2.07 2.11 2.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1001 0.13 PATH CONDITION PATH CONDITION G->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.30 0.47 0.18 0.32 0.50 0.20 0.37 0.55 0.21 0.42 0.64 30.00 1.15 1.17 1.23 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1115 0.20 PATH CONDITION PATH CONDITION G->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.48 0.79 0.26 0.52 0.83 0.30 0.56 0.87 0.40 0.69 1.01 30.00 2.03 2.07 2.11 2.25 Rev.1.01.10 2 - 122 TC200G SERIES DATA SHEET D24GL D24GL 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1000 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.30 0.47 0.18 0.32 0.49 0.20 0.37 0.55 0.22 0.43 0.65 30.00 1.15 1.17 1.23 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1062 0.18 PATH CONDITION PATH CONDITION G->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.24 0.28 0.36 5.00 0.46 0.49 0.52 0.64 FUNCTION FALL 10.00 0.75 0.79 0.82 0.95 30.00 1.94 1.97 2.01 2.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0999 0.19 PATH CONDITION PATH CONDITION G->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.30 0.47 0.18 0.32 0.49 0.21 0.37 0.55 0.26 0.46 0.67 30.00 1.15 1.17 1.23 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0909 0.16 PATH CONDITION PATH CONDITION G->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.39 0.65 0.22 0.43 0.69 0.26 0.48 0.74 0.33 0.60 0.88 30.00 1.68 1.72 1.76 1.92 Rev.1.01.10 2 - 123 TC200G SERIES DATA SHEET D24GLP CELL NAME D24GLP FUNCTION 2 TO 4 DECODER ( GATED OUTPUTS ACTIVE LOW ) TRUTH TABLE INPUT G A L X H L H H H L H H D24GLP CELL COUNT GATE 13 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL D24GLP AA Z0 Z0 B X L L H H Z0 H L H H H OUTPUT Z1 Z2 H H H H L H H L H H Z3 H H H H L BB Z1 Z1 Z2 Z2 Z3 Z3 GG Verilog-HDL DESCRIPTION D24GLP inst(Z0,Z1,Z2,Z3,A,B,G); VHDL DESCRIPTION inst:D24GLP port map(Z0,Z1,Z2,Z3,A,B,G); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B G (LU) LOAD 5.77 5.59 8.76 OUTPUT DRIVE PIN NAME Z0 DRIVE 52.4 Z1 53.2 Z2 53.1 (LU) Z3 50.6 Rev.1.01.10 2 - 124 TC200G SERIES DATA SHEET D24GLP D24GLP 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0566 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.42 0.33 0.41 0.50 0.42 0.50 0.59 0.55 0.64 0.73 30.00 0.76 0.85 0.93 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0572 0.19 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.40 0.43 0.50 0.68 5.00 0.54 0.57 0.64 0.82 FUNCTION FALL 10.00 0.71 0.73 0.81 0.99 30.00 1.35 1.38 1.45 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0551 0.13 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.17 0.25 0.12 0.20 0.28 0.13 0.22 0.31 0.08 0.20 0.33 30.00 0.58 0.60 0.66 0.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0572 0.18 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.29 0.45 0.21 0.34 0.49 0.26 0.41 0.57 0.41 0.58 0.76 30.00 1.07 1.11 1.19 1.44 Rev.1.01.10 2 - 125 TC200G SERIES DATA SHEET D24GLP D24GLP 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0547 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.32 0.40 0.32 0.40 0.48 0.41 0.49 0.57 0.55 0.63 0.72 30.00 0.73 0.81 0.90 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0553 0.18 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.40 0.43 0.51 0.69 5.00 0.54 0.56 0.64 0.82 FUNCTION FALL 10.00 0.69 0.72 0.80 0.98 30.00 1.31 1.34 1.41 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0547 0.13 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.17 0.26 0.12 0.20 0.28 0.13 0.22 0.32 0.09 0.21 0.35 30.00 0.58 0.60 0.66 0.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0543 0.17 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.28 0.43 0.20 0.32 0.48 0.25 0.39 0.55 0.38 0.55 0.73 30.00 1.03 1.08 1.15 1.38 Rev.1.01.10 2 - 126 TC200G SERIES DATA SHEET D24GLP D24GLP 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0566 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.30 0.40 0.29 0.38 0.48 0.37 0.46 0.56 0.50 0.59 0.70 30.00 0.79 0.87 0.96 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0572 0.19 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.37 0.40 0.48 0.65 5.00 0.52 0.55 0.63 0.81 FUNCTION FALL 10.00 0.69 0.72 0.79 0.98 30.00 1.33 1.36 1.44 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0551 0.13 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.29 0.39 0.29 0.37 0.48 0.37 0.46 0.56 0.50 0.59 0.69 30.00 0.78 0.86 0.95 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0572 0.18 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.52 0.69 0.40 0.55 0.72 0.48 0.63 0.80 0.66 0.81 0.98 30.00 1.33 1.36 1.44 1.62 Rev.1.01.10 2 - 127 TC200G SERIES DATA SHEET D24GLP D24GLP 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0547 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.17 0.26 0.11 0.19 0.29 0.11 0.22 0.33 0.05 0.20 0.35 30.00 0.65 0.68 0.73 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0553 0.18 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.20 0.27 0.45 5.00 0.25 0.33 0.43 0.67 FUNCTION FALL 10.00 0.40 0.48 0.61 0.89 30.00 1.02 1.10 1.24 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0547 0.13 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.17 0.26 0.11 0.19 0.29 0.11 0.22 0.33 0.05 0.20 0.35 30.00 0.65 0.68 0.73 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0543 0.17 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.25 0.40 0.19 0.32 0.48 0.26 0.43 0.60 0.44 0.66 0.87 30.00 1.00 1.08 1.22 1.60 Rev.1.01.10 2 - 128 TC200G SERIES DATA SHEET D24GLP D24GLP 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0566 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.20 0.29 0.15 0.23 0.32 0.16 0.25 0.36 0.14 0.26 0.40 30.00 0.64 0.66 0.72 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0572 0.19 PATH CONDITION PATH CONDITION G->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.18 0.21 0.25 0.34 5.00 0.32 0.35 0.39 0.51 FUNCTION FALL 10.00 0.48 0.51 0.56 0.69 30.00 1.12 1.15 1.19 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0551 0.13 PATH CONDITION PATH CONDITION G->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.19 0.27 0.14 0.21 0.30 0.15 0.24 0.34 0.12 0.24 0.37 30.00 0.60 0.62 0.68 0.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0572 0.18 PATH CONDITION PATH CONDITION G->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.31 0.47 0.21 0.35 0.51 0.25 0.39 0.55 0.35 0.51 0.69 30.00 1.11 1.14 1.19 1.34 Rev.1.01.10 2 - 129 TC200G SERIES DATA SHEET D24GLP D24GLP 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0547 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.27 0.13 0.21 0.29 0.14 0.23 0.33 0.12 0.24 0.36 30.00 0.59 0.61 0.67 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0553 0.18 PATH CONDITION PATH CONDITION G->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.21 0.24 0.34 5.00 0.30 0.33 0.38 0.49 FUNCTION FALL 10.00 0.46 0.49 0.53 0.67 30.00 1.07 1.11 1.15 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0547 0.13 PATH CONDITION PATH CONDITION G->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.19 0.27 0.14 0.21 0.30 0.15 0.24 0.34 0.13 0.25 0.38 30.00 0.60 0.62 0.68 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0543 0.17 PATH CONDITION PATH CONDITION G->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.29 0.44 0.20 0.32 0.48 0.24 0.37 0.52 0.32 0.48 0.65 30.00 1.04 1.08 1.12 1.26 Rev.1.01.10 2 - 130 TC200G SERIES DATA SHEET D24L CELL NAME D24L FUNCTION 2 TO 4 DECODER ( OUTPUT ACTIVE LOW ) 5 LOGIC SYMBOL TRUTH TABLE INPUT A B L L H L L H H H D24L AA BB Z0 Z0 Z1 Z1 Z2 Z2 Z3 Z3 D24L CELL COUNT GATE I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. Z0 L H H H OUTPUT Z1 Z2 H H L H H L H H Z3 H H H L Verilog-HDL DESCRIPTION D24L inst(Z0,Z1,Z2,Z3,A,B); VHDL DESCRIPTION inst:D24L port map(Z0,Z1,Z2,Z3,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 3.08 3.17 OUTPUT DRIVE PIN NAME Z0 DRIVE 39.3 Z1 42.3 Z2 39.0 (LU) Z3 36.4 Rev.1.01.10 2 - 131 TC200G SERIES DATA SHEET D24L D24L 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0971 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.32 0.49 0.24 0.39 0.56 0.31 0.45 0.62 0.41 0.56 0.73 30.00 1.16 1.23 1.30 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0577 0.10 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.23 0.27 0.33 0.46 5.00 0.38 0.42 0.48 0.62 FUNCTION FALL 10.00 0.56 0.59 0.65 0.80 30.00 1.22 1.25 1.32 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0862 0.09 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.21 0.36 0.10 0.24 0.39 0.12 0.28 0.44 0.14 0.35 0.55 30.00 0.96 0.99 1.05 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0587 0.09 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.22 0.39 0.15 0.30 0.47 0.20 0.40 0.59 0.31 0.60 0.86 30.00 1.06 1.14 1.28 1.68 Rev.1.01.10 2 - 132 TC200G SERIES DATA SHEET D24L D24L 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0971 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.32 0.49 0.24 0.39 0.56 0.31 0.45 0.62 0.41 0.56 0.73 30.00 1.16 1.23 1.30 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0588 0.09 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.24 0.27 0.33 0.46 5.00 0.39 0.42 0.49 0.63 FUNCTION FALL 10.00 0.56 0.60 0.66 0.81 30.00 1.24 1.27 1.34 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0967 0.10 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.14 0.30 0.48 0.17 0.39 0.61 30.00 1.07 1.10 1.15 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0584 0.09 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.22 0.39 0.15 0.30 0.47 0.20 0.40 0.59 0.30 0.59 0.86 30.00 1.06 1.14 1.29 1.68 Rev.1.01.10 2 - 133 TC200G SERIES DATA SHEET D24L D24L 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0971 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.32 0.47 0.27 0.39 0.55 0.33 0.46 0.61 0.45 0.58 0.74 30.00 1.07 1.14 1.21 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0577 0.10 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.24 0.27 0.33 0.46 5.00 0.39 0.42 0.48 0.62 FUNCTION FALL 10.00 0.56 0.59 0.65 0.79 30.00 1.22 1.25 1.31 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0862 0.09 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.32 0.47 0.27 0.39 0.54 0.33 0.46 0.61 0.45 0.58 0.74 30.00 1.05 1.13 1.20 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0587 0.09 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.39 0.56 0.28 0.42 0.59 0.34 0.48 0.65 0.47 0.62 0.79 30.00 1.23 1.26 1.33 1.47 Rev.1.01.10 2 - 134 TC200G SERIES DATA SHEET D24L D24L 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0971 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.23 0.39 0.13 0.26 0.41 0.16 0.31 0.47 0.22 0.41 0.61 30.00 1.00 1.02 1.08 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0588 0.09 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.14 0.18 0.24 5.00 0.23 0.29 0.36 0.49 FUNCTION FALL 10.00 0.40 0.45 0.54 0.73 30.00 1.06 1.12 1.21 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0967 0.10 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.23 0.38 0.13 0.26 0.41 0.16 0.31 0.47 0.22 0.41 0.61 30.00 1.00 1.02 1.08 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0584 0.09 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.23 0.40 0.14 0.29 0.46 0.18 0.36 0.54 0.24 0.49 0.73 30.00 1.07 1.13 1.22 1.49 Rev.1.01.10 2 - 135 TC200G SERIES DATA SHEET D24LP CELL NAME D24LP FUNCTION 2 TO 4 DECODER ( OUTPUT ACTIVE LOW ) 9 LOGIC SYMBOL TRUTH TABLE INPUT A B L L H L L H H H D24LP AA BB Z0 Z0 Z1 Z1 Z2 Z2 Z3 Z3 D24LP CELL COUNT GATE I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. Z0 L H H H OUTPUT Z1 Z2 H H L H H L H H Z3 H H H L Verilog-HDL DESCRIPTION D24LP inst(Z0,Z1,Z2,Z3,A,B); VHDL DESCRIPTION inst:D24LP port map(Z0,Z1,Z2,Z3,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 5.10 5.36 OUTPUT DRIVE PIN NAME Z0 DRIVE 77.1 Z1 74.1 Z2 79.1 (LU) Z3 75.6 Rev.1.01.10 2 - 136 TC200G SERIES DATA SHEET D24LP D24LP 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0480 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.29 0.38 0.30 0.38 0.46 0.39 0.47 0.56 0.55 0.63 0.72 30.00 0.72 0.81 0.90 1.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0309 0.13 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.32 0.39 0.54 5.00 0.38 0.41 0.48 0.64 FUNCTION FALL 10.00 0.48 0.51 0.58 0.74 30.00 0.85 0.88 0.96 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0450 0.14 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.15 0.23 0.10 0.17 0.25 0.12 0.21 0.30 0.14 0.26 0.38 30.00 0.54 0.57 0.63 0.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0306 0.13 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.15 0.24 0.13 0.22 0.31 0.17 0.28 0.40 0.25 0.42 0.57 30.00 0.60 0.67 0.78 1.06 Rev.1.01.10 2 - 137 TC200G SERIES DATA SHEET D24LP D24LP 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0423 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.27 0.35 0.29 0.36 0.44 0.38 0.45 0.53 0.54 0.61 0.70 30.00 0.65 0.73 0.83 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0295 0.13 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.32 0.39 0.54 5.00 0.37 0.40 0.48 0.63 FUNCTION FALL 10.00 0.47 0.50 0.57 0.73 30.00 0.83 0.86 0.93 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0424 0.13 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.14 0.21 0.10 0.16 0.24 0.12 0.20 0.28 0.14 0.25 0.36 30.00 0.51 0.53 0.60 0.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0287 0.11 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.15 0.23 0.12 0.21 0.30 0.17 0.27 0.38 0.24 0.40 0.55 30.00 0.58 0.64 0.75 1.02 Rev.1.01.10 2 - 138 TC200G SERIES DATA SHEET D24LP D24LP 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0480 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.29 0.37 0.30 0.37 0.45 0.38 0.46 0.54 0.54 0.62 0.71 30.00 0.68 0.77 0.86 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0309 0.13 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.31 0.38 0.53 5.00 0.37 0.40 0.47 0.63 FUNCTION FALL 10.00 0.47 0.50 0.58 0.73 30.00 0.85 0.88 0.95 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0450 0.14 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.29 0.38 0.30 0.37 0.46 0.39 0.46 0.55 0.55 0.63 0.71 30.00 0.70 0.78 0.87 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0306 0.13 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.47 0.32 0.41 0.51 0.39 0.48 0.58 0.54 0.63 0.73 30.00 0.85 0.88 0.95 1.11 Rev.1.01.10 2 - 139 TC200G SERIES DATA SHEET D24LP D24LP 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0423 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.14 0.22 0.10 0.17 0.25 0.12 0.20 0.29 0.14 0.25 0.37 30.00 0.52 0.55 0.61 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0295 0.13 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.13 0.17 0.25 5.00 0.15 0.21 0.28 0.41 FUNCTION FALL 10.00 0.24 0.30 0.39 0.56 30.00 0.58 0.65 0.76 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0424 0.13 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.14 0.22 0.10 0.17 0.25 0.12 0.20 0.29 0.14 0.26 0.37 30.00 0.52 0.55 0.61 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0287 0.11 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.15 0.23 0.13 0.21 0.30 0.17 0.28 0.39 0.25 0.41 0.56 30.00 0.58 0.65 0.76 1.03 Rev.1.01.10 2 - 140 TC200G SERIES DATA SHEET EN CELL NAME EN FUNCTION 2-INPUT EXCLUSIVE NOR 3 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 EN CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z H L L H A B EN Z Verilog-HDL DESCRIPTION EN inst(Z,A,B); VHDL DESCRIPTION inst:EN port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 0.98 2.11 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 44.6 Rev.1.01.10 2 - 141 TC200G SERIES DATA SHEET EN EN 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0961 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.42 0.59 0.34 0.50 0.67 0.43 0.58 0.76 0.59 0.74 0.92 30.00 1.26 1.34 1.43 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0389 0.12 PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.47 0.61 0.36 0.50 0.64 0.43 0.58 0.72 0.59 0.75 0.89 30.00 1.09 1.12 1.20 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0961 0.11 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.53 0.70 0.42 0.56 0.73 0.48 0.62 0.80 0.61 0.75 0.92 30.00 1.37 1.40 1.47 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0389 0.12 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.47 0.61 0.42 0.55 0.68 0.48 0.61 0.74 0.58 0.71 0.85 30.00 1.08 1.15 1.22 1.32 Rev.1.01.10 2 - 142 TC200G SERIES DATA SHEET EN EN 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0961 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.33 0.49 0.26 0.40 0.57 0.32 0.46 0.63 0.41 0.56 0.73 30.00 1.16 1.24 1.30 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0389 0.12 PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.35 0.48 0.26 0.38 0.51 0.32 0.45 0.58 0.46 0.59 0.73 30.00 0.95 0.98 1.05 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0961 0.11 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.44 0.61 0.33 0.47 0.65 0.39 0.54 0.71 0.51 0.66 0.83 30.00 1.28 1.32 1.37 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0389 0.12 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.35 0.48 0.30 0.43 0.56 0.41 0.53 0.66 0.52 0.64 0.78 30.00 0.96 1.04 1.14 1.25 Rev.1.01.10 2 - 143 TC200G SERIES DATA SHEET ENP CELL NAME ENP FUNCTION 2-INPUT EXCLUSIVE NOR 4 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 ENP CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z H L L H A B ENP Z Verilog-HDL DESCRIPTION ENP inst(Z,A,B); VHDL DESCRIPTION inst:ENP port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 0.98 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 89.9 Rev.1.01.10 2 - 144 TC200G SERIES DATA SHEET ENP ENP 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.34 0.43 0.34 0.42 0.51 0.44 0.52 0.61 0.61 0.70 0.79 30.00 0.77 0.85 0.95 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.12 PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.41 0.50 0.36 0.45 0.54 0.43 0.52 0.61 0.60 0.70 0.79 30.00 0.78 0.82 0.89 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.46 0.55 0.42 0.50 0.59 0.48 0.56 0.65 0.61 0.69 0.78 30.00 0.89 0.92 0.98 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.12 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.43 0.51 0.42 0.50 0.59 0.48 0.56 0.65 0.59 0.67 0.76 30.00 0.79 0.86 0.92 1.03 Rev.1.01.10 2 - 145 TC200G SERIES DATA SHEET ENP ENP 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.27 0.36 0.27 0.35 0.44 0.35 0.43 0.52 0.49 0.57 0.66 30.00 0.70 0.78 0.86 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.12 PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.26 0.34 0.42 0.32 0.41 0.49 0.47 0.56 0.65 30.00 0.66 0.69 0.76 0.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.45 0.31 0.39 0.48 0.37 0.45 0.54 0.49 0.57 0.66 30.00 0.78 0.82 0.88 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.12 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.28 0.37 0.28 0.37 0.45 0.40 0.49 0.57 0.52 0.60 0.68 30.00 0.64 0.73 0.84 0.95 Rev.1.01.10 2 - 146 TC200G SERIES DATA SHEET EN3 CELL NAME EN3 FUNCTION 3-INPUT EXCLUSIVE NOR 7 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 EN3 CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B C EN3 Z C L H L H L H L H OUTPUT Z H L L H L H H L Verilog-HDL DESCRIPTION EN3 inst(Z,A,B,C); VHDL DESCRIPTION inst:EN3 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.04 3.30 2.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 48.8 Rev.1.01.10 2 - 147 TC200G SERIES DATA SHEET EN3 EN3 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.85 1.01 0.74 0.88 1.04 0.81 0.96 1.12 0.99 1.13 1.30 30.00 1.62 1.65 1.72 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.77 0.92 0.70 0.85 1.01 0.80 0.96 1.11 0.99 1.14 1.30 30.00 1.41 1.49 1.60 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.57 0.73 0.51 0.65 0.81 0.61 0.76 0.92 0.82 0.97 1.13 30.00 1.34 1.42 1.53 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.66 0.82 0.53 0.69 0.85 0.60 0.77 0.92 0.79 0.96 1.12 30.00 1.31 1.34 1.42 1.63 Rev.1.01.10 2 - 148 TC200G SERIES DATA SHEET EN3 EN3 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.56 0.73 0.50 0.65 0.81 0.61 0.75 0.91 0.82 0.96 1.12 30.00 1.33 1.41 1.52 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.65 0.81 0.52 0.68 0.84 0.60 0.76 0.92 0.78 0.95 1.12 30.00 1.30 1.33 1.41 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.72 0.86 1.02 0.75 0.89 1.05 0.82 0.97 1.13 1.00 1.15 1.31 30.00 1.63 1.66 1.74 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.77 0.92 0.70 0.85 1.01 0.80 0.96 1.11 0.99 1.15 1.30 30.00 1.41 1.49 1.60 1.79 Rev.1.01.10 2 - 149 TC200G SERIES DATA SHEET EN3 EN3 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.57 0.73 0.46 0.60 0.76 0.52 0.67 0.83 0.66 0.80 0.96 30.00 1.34 1.37 1.43 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.48 0.63 0.40 0.56 0.71 0.54 0.69 0.85 0.69 0.85 1.00 30.00 1.12 1.20 1.33 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.47 0.64 0.41 0.55 0.72 0.49 0.64 0.80 0.62 0.76 0.92 30.00 1.24 1.32 1.41 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.57 0.72 0.44 0.59 0.74 0.51 0.66 0.81 0.68 0.84 0.99 30.00 1.21 1.23 1.30 1.49 Rev.1.01.10 2 - 150 TC200G SERIES DATA SHEET EN3 EN3 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.50 0.66 0.43 0.58 0.74 0.52 0.67 0.83 0.67 0.82 0.98 30.00 1.27 1.35 1.44 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.54 0.69 0.41 0.56 0.71 0.48 0.63 0.78 0.64 0.80 0.95 30.00 1.17 1.19 1.26 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.61 0.77 0.49 0.63 0.80 0.55 0.70 0.86 0.69 0.83 0.99 30.00 1.38 1.41 1.47 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.60 0.39 0.54 0.69 0.53 0.68 0.83 0.67 0.82 0.97 30.00 1.09 1.18 1.31 1.45 Rev.1.01.10 2 - 151 TC200G SERIES DATA SHEET EN3 EN3 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.45 0.62 0.34 0.49 0.65 0.40 0.54 0.71 0.52 0.66 0.82 30.00 1.22 1.25 1.31 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.35 0.49 0.30 0.44 0.58 0.43 0.57 0.71 0.55 0.69 0.82 30.00 0.97 1.06 1.17 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.34 0.50 0.27 0.42 0.58 0.34 0.49 0.65 0.46 0.59 0.75 30.00 1.10 1.18 1.25 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.36 0.49 0.26 0.39 0.53 0.32 0.46 0.60 0.47 0.62 0.76 30.00 0.96 1.00 1.07 1.23 Rev.1.01.10 2 - 152 TC200G SERIES DATA SHEET EN3 EN3 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.51 0.28 0.43 0.59 0.36 0.50 0.66 0.49 0.63 0.79 30.00 1.12 1.20 1.27 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.49 0.26 0.39 0.52 0.32 0.45 0.59 0.47 0.60 0.74 30.00 0.95 0.99 1.05 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.13 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.47 0.63 0.35 0.50 0.66 0.41 0.56 0.72 0.53 0.67 0.83 30.00 1.24 1.27 1.33 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.16 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.49 0.30 0.43 0.57 0.42 0.56 0.69 0.54 0.67 0.80 30.00 0.96 1.05 1.16 1.27 Rev.1.01.10 2 - 153 TC200G SERIES DATA SHEET EN3P CELL NAME EN3P FUNCTION 3-INPUT EXCLUSIVE NOR 7 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 EN3P CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B C EN3P Z C L H L H L H L H OUTPUT Z H L L H L H H L Verilog-HDL DESCRIPTION EN3P inst(Z,A,B,C); VHDL DESCRIPTION inst:EN3P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.04 3.30 2.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 84.4 Rev.1.01.10 2 - 154 TC200G SERIES DATA SHEET EN3P EN3P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.82 0.92 0.77 0.85 0.95 0.84 0.93 1.03 1.02 1.11 1.21 30.00 1.27 1.30 1.38 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.74 0.84 0.72 0.82 0.93 0.82 0.93 1.03 1.00 1.11 1.22 30.00 1.17 1.25 1.36 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.54 0.64 0.54 0.62 0.72 0.64 0.73 0.83 0.86 0.95 1.05 30.00 0.99 1.08 1.18 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.63 0.74 0.55 0.66 0.77 0.62 0.73 0.84 0.82 0.93 1.04 30.00 1.07 1.10 1.17 1.38 Rev.1.01.10 2 - 155 TC200G SERIES DATA SHEET EN3P EN3P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.53 0.63 0.53 0.62 0.71 0.63 0.72 0.82 0.85 0.94 1.04 30.00 0.98 1.07 1.17 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.62 0.73 0.54 0.65 0.76 0.62 0.73 0.83 0.81 0.92 1.04 30.00 1.06 1.09 1.17 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.84 0.94 0.78 0.87 0.97 0.86 0.94 1.04 1.04 1.12 1.22 30.00 1.29 1.32 1.40 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.74 0.84 0.72 0.82 0.93 0.82 0.93 1.03 1.01 1.12 1.22 30.00 1.17 1.25 1.36 1.55 Rev.1.01.10 2 - 156 TC200G SERIES DATA SHEET EN3P EN3P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.54 0.64 0.49 0.57 0.67 0.55 0.64 0.73 0.68 0.77 0.87 30.00 0.99 1.02 1.08 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.45 0.55 0.42 0.52 0.63 0.56 0.66 0.76 0.73 0.83 0.94 30.00 0.88 0.96 1.09 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.45 0.55 0.44 0.53 0.63 0.53 0.62 0.72 0.68 0.76 0.86 30.00 0.90 0.98 1.07 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.54 0.64 0.46 0.56 0.67 0.53 0.63 0.74 0.70 0.81 0.92 30.00 0.97 0.99 1.06 1.24 Rev.1.01.10 2 - 157 TC200G SERIES DATA SHEET EN3P EN3P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.47 0.57 0.47 0.56 0.65 0.57 0.65 0.75 0.73 0.82 0.92 30.00 0.93 1.01 1.10 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.51 0.61 0.43 0.53 0.64 0.50 0.60 0.70 0.67 0.77 0.87 30.00 0.93 0.96 1.02 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.58 0.68 0.52 0.61 0.71 0.58 0.67 0.77 0.72 0.80 0.90 30.00 1.03 1.06 1.12 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.42 0.52 0.40 0.51 0.61 0.54 0.65 0.75 0.70 0.80 0.90 30.00 0.85 0.93 1.07 1.22 Rev.1.01.10 2 - 158 TC200G SERIES DATA SHEET EN3P EN3P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.42 0.52 0.37 0.46 0.56 0.43 0.51 0.61 0.54 0.63 0.73 30.00 0.87 0.91 0.96 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.32 0.42 0.30 0.40 0.50 0.45 0.55 0.65 0.61 0.71 0.80 30.00 0.73 0.82 0.96 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.41 0.31 0.39 0.49 0.39 0.48 0.58 0.55 0.64 0.73 30.00 0.76 0.84 0.93 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.43 0.27 0.37 0.46 0.34 0.43 0.53 0.49 0.59 0.69 30.00 0.74 0.77 0.84 1.01 Rev.1.01.10 2 - 159 TC200G SERIES DATA SHEET EN3P EN3P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.32 0.42 0.32 0.41 0.51 0.41 0.50 0.59 0.59 0.67 0.76 30.00 0.78 0.86 0.95 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.33 0.42 0.27 0.36 0.46 0.33 0.43 0.52 0.48 0.58 0.68 30.00 0.73 0.76 0.83 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0465 0.14 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.44 0.54 0.39 0.47 0.57 0.44 0.53 0.63 0.56 0.65 0.75 30.00 0.89 0.93 0.98 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0241 0.16 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.31 0.41 0.30 0.40 0.50 0.45 0.55 0.64 0.60 0.69 0.78 30.00 0.73 0.81 0.95 1.08 Rev.1.01.10 2 - 160 TC200G SERIES DATA SHEET EO CELL NAME EO FUNCTION 2-INPUT EXCLUSIVE OR 3 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 EO CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L H H L A B EO Z Verilog-HDL DESCRIPTION EO inst(Z,A,B); VHDL DESCRIPTION inst:EO port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 0.98 2.11 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 45.1 Rev.1.01.10 2 - 161 TC200G SERIES DATA SHEET EO EO 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0940 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.52 0.69 0.41 0.56 0.73 0.47 0.62 0.79 0.60 0.75 0.92 30.00 1.35 1.39 1.45 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0400 0.12 PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.48 0.62 0.42 0.55 0.69 0.48 0.62 0.75 0.59 0.72 0.86 30.00 1.10 1.17 1.23 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0940 0.11 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.42 0.59 0.35 0.49 0.67 0.43 0.58 0.75 0.59 0.74 0.91 30.00 1.25 1.33 1.41 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0400 0.12 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.47 0.61 0.36 0.50 0.64 0.44 0.58 0.72 0.60 0.75 0.90 30.00 1.10 1.14 1.21 1.40 Rev.1.01.10 2 - 162 TC200G SERIES DATA SHEET EO EO 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0940 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.44 0.61 0.33 0.47 0.64 0.39 0.54 0.71 0.52 0.66 0.83 30.00 1.27 1.31 1.36 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0400 0.12 PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.49 0.30 0.43 0.57 0.41 0.53 0.66 0.52 0.64 0.77 30.00 0.97 1.05 1.14 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0940 0.11 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.48 0.26 0.40 0.56 0.32 0.46 0.62 0.41 0.55 0.72 30.00 1.14 1.22 1.28 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0400 0.12 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.35 0.49 0.26 0.39 0.52 0.32 0.45 0.58 0.47 0.60 0.74 30.00 0.97 1.00 1.07 1.22 Rev.1.01.10 2 - 163 TC200G SERIES DATA SHEET EOP CELL NAME EOP FUNCTION 2-INPUT EXCLUSIVE OR 4 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 EOP CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L H H L A B EOP Z Verilog-HDL DESCRIPTION EOP inst(Z,A,B); VHDL DESCRIPTION inst:EOP port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 0.98 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 90.0 Rev.1.01.10 2 - 164 TC200G SERIES DATA SHEET EOP EOP 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.46 0.55 0.41 0.49 0.58 0.47 0.55 0.64 0.60 0.68 0.77 30.00 0.88 0.92 0.98 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.11 PATH CONDITION PATH CONDITION A->Z B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.44 0.52 0.42 0.51 0.59 0.48 0.57 0.65 0.59 0.68 0.76 30.00 0.79 0.86 0.93 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.35 0.44 0.35 0.43 0.52 0.44 0.52 0.61 0.61 0.70 0.79 30.00 0.78 0.86 0.95 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.11 PATH CONDITION PATH CONDITION A->Z ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.41 0.50 0.36 0.45 0.53 0.43 0.52 0.61 0.60 0.70 0.79 30.00 0.78 0.81 0.89 1.08 Rev.1.01.10 2 - 165 TC200G SERIES DATA SHEET EOP EOP 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.45 0.31 0.40 0.49 0.37 0.45 0.54 0.49 0.57 0.66 30.00 0.79 0.82 0.88 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.11 PATH CONDITION PATH CONDITION B->Z A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.29 0.38 0.29 0.37 0.45 0.41 0.49 0.57 0.52 0.60 0.68 30.00 0.65 0.72 0.84 0.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0466 0.09 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.27 0.36 0.27 0.35 0.44 0.35 0.43 0.52 0.49 0.57 0.65 30.00 0.69 0.77 0.85 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0210 0.11 PATH CONDITION PATH CONDITION B->Z ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.26 0.34 0.42 0.32 0.40 0.49 0.47 0.56 0.65 30.00 0.66 0.70 0.76 0.93 Rev.1.01.10 2 - 166 TC200G SERIES DATA SHEET EON1 CELL NAME EON1 FUNCTION 2-INPUT OR and 2-INPUT NAND into 2-INPUT NAND EON1 CELL COUNT GATE 3 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A B EON1 Z TRUTH TABLE INPUT A B C D L L L L L L L H L L H L L L H H L H H H H L H H H H H H ALL OTHER COMBINATIONS OUTPUT Z H H H H H H H L C D Verilog-HDL DESCRIPTION EON1 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:EON1 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.03 1.12 1.00 1.05 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 22.8 Rev.1.01.10 2 - 167 TC200G SERIES DATA SHEET EON1 EON1 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.75 0.20 0.45 0.77 0.25 0.51 0.82 0.36 0.66 0.99 30.00 1.98 2.00 2.04 2.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.29 0.49 0.19 0.37 0.58 0.25 0.48 0.71 0.33 0.67 0.98 30.00 1.33 1.42 1.56 1.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH CONDITION PATH CONDITION A->Z ~B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.75 0.20 0.45 0.77 0.25 0.51 0.82 0.36 0.66 0.99 30.00 1.98 2.00 2.04 2.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION A->Z ~B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.29 0.49 0.19 0.37 0.58 0.25 0.48 0.71 0.33 0.67 0.98 30.00 1.33 1.42 1.56 1.97 Rev.1.01.10 2 - 168 TC200G SERIES DATA SHEET EON1 EON1 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.75 0.20 0.45 0.77 0.25 0.51 0.82 0.36 0.66 0.99 30.00 1.98 2.00 2.04 2.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION A->Z ~B&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.29 0.49 0.19 0.37 0.58 0.25 0.48 0.71 0.33 0.67 0.98 30.00 1.33 1.42 1.56 1.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH CONDITION PATH CONDITION B->Z ~A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.21 0.46 0.78 0.22 0.47 0.78 0.25 0.53 0.84 30.00 2.01 2.02 2.01 2.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION B->Z ~A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.31 0.52 0.21 0.39 0.60 0.28 0.50 0.73 0.40 0.71 1.02 30.00 1.35 1.44 1.58 1.99 Rev.1.01.10 2 - 169 TC200G SERIES DATA SHEET EON1 EON1 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.21 0.46 0.78 0.22 0.47 0.78 0.25 0.53 0.84 30.00 2.01 2.02 2.01 2.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.31 0.52 0.21 0.39 0.60 0.28 0.50 0.73 0.40 0.71 1.02 30.00 1.35 1.44 1.58 1.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH CONDITION PATH CONDITION B->Z ~A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.46 0.77 0.21 0.46 0.78 0.22 0.47 0.78 0.25 0.53 0.84 30.00 2.01 2.02 2.01 2.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION B->Z ~A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.31 0.52 0.21 0.39 0.60 0.28 0.50 0.73 0.40 0.71 1.02 30.00 1.35 1.44 1.58 1.99 Rev.1.01.10 2 - 170 TC200G SERIES DATA SHEET EON1 EON1 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.38 0.55 0.32 0.45 0.62 0.39 0.52 0.69 0.54 0.68 0.85 30.00 1.18 1.26 1.33 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION C->Z D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.53 0.27 0.40 0.56 0.31 0.44 0.61 0.38 0.52 0.68 30.00 1.18 1.21 1.25 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.37 0.53 0.30 0.44 0.60 0.37 0.51 0.67 0.52 0.66 0.83 30.00 1.17 1.24 1.32 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.42 0.63 0.28 0.45 0.66 0.32 0.49 0.70 0.38 0.56 0.77 30.00 1.47 1.50 1.54 1.60 Rev.1.01.10 2 - 171 TC200G SERIES DATA SHEET EON1 EON1 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.38 0.54 0.32 0.45 0.61 0.38 0.52 0.69 0.53 0.68 0.84 30.00 1.18 1.25 1.33 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.45 0.66 0.30 0.48 0.69 0.34 0.51 0.72 0.41 0.58 0.79 30.00 1.49 1.52 1.56 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.40 0.56 0.31 0.45 0.61 0.37 0.51 0.67 0.48 0.62 0.79 30.00 1.20 1.25 1.31 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.41 0.57 0.30 0.44 0.60 0.36 0.49 0.66 0.48 0.62 0.79 30.00 1.21 1.24 1.30 1.43 Rev.1.01.10 2 - 172 TC200G SERIES DATA SHEET EON1 EON1 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.38 0.55 0.30 0.44 0.60 0.36 0.49 0.66 0.46 0.60 0.77 30.00 1.19 1.24 1.30 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.46 0.67 0.31 0.49 0.70 0.37 0.54 0.75 0.49 0.66 0.87 30.00 1.50 1.53 1.59 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.24 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.40 0.56 0.31 0.45 0.61 0.37 0.51 0.67 0.47 0.62 0.78 30.00 1.20 1.25 1.31 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0749 0.12 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.48 0.69 0.34 0.51 0.72 0.39 0.56 0.77 0.51 0.68 0.89 30.00 1.53 1.56 1.61 1.73 Rev.1.01.10 2 - 173 TC200G SERIES DATA SHEET EON1P CELL NAME EON1P FUNCTION 2-INPUT OR and 2-INPUT NAND into 2-INPUT NAND EON1P CELL COUNT GATE 4 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A B EON1P Z TRUTH TABLE INPUT A B C D L L L L L L L H L L H L L L H H L H H H H L H H H H H H ALL OTHER COMBINATIONS OUTPUT Z H H H H H H H L C D Verilog-HDL DESCRIPTION EON1P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:EON1P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 2.02 1.99 1.05 1.07 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 39.1 Rev.1.01.10 2 - 174 TC200G SERIES DATA SHEET EON1P EON1P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.30 0.48 0.17 0.32 0.50 0.21 0.37 0.55 0.31 0.50 0.71 30.00 1.20 1.22 1.26 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION A->Z ~B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.19 0.32 0.16 0.28 0.41 0.20 0.36 0.51 0.25 0.48 0.70 30.00 0.81 0.90 1.04 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH CONDITION PATH CONDITION A->Z ~B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.30 0.48 0.17 0.32 0.50 0.21 0.37 0.55 0.31 0.50 0.71 30.00 1.20 1.22 1.26 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION A->Z ~B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.19 0.32 0.16 0.28 0.41 0.20 0.36 0.51 0.25 0.48 0.70 30.00 0.81 0.90 1.04 1.37 Rev.1.01.10 2 - 175 TC200G SERIES DATA SHEET EON1P EON1P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.30 0.48 0.17 0.32 0.50 0.21 0.37 0.55 0.31 0.50 0.71 30.00 1.20 1.22 1.26 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION A->Z ~B&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.19 0.32 0.16 0.28 0.41 0.20 0.36 0.51 0.25 0.48 0.70 30.00 0.81 0.90 1.04 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH CONDITION PATH CONDITION B->Z ~A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.33 0.51 0.17 0.32 0.51 0.17 0.32 0.50 0.16 0.32 0.52 30.00 1.22 1.23 1.21 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION B->Z ~A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.22 0.35 0.19 0.30 0.43 0.24 0.39 0.54 0.35 0.55 0.75 30.00 0.84 0.93 1.07 1.41 Rev.1.01.10 2 - 176 TC200G SERIES DATA SHEET EON1P EON1P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.33 0.51 0.17 0.32 0.51 0.17 0.32 0.50 0.16 0.32 0.52 30.00 1.22 1.23 1.21 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION B->Z ~A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.22 0.35 0.19 0.30 0.43 0.24 0.39 0.54 0.35 0.55 0.75 30.00 0.84 0.93 1.07 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH CONDITION PATH CONDITION B->Z ~A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.33 0.51 0.17 0.32 0.51 0.17 0.32 0.50 0.16 0.32 0.52 30.00 1.22 1.23 1.21 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION B->Z ~A&~C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.22 0.35 0.19 0.30 0.43 0.24 0.39 0.54 0.35 0.55 0.75 30.00 0.84 0.93 1.07 1.41 Rev.1.01.10 2 - 177 TC200G SERIES DATA SHEET EON1P EON1P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.34 0.44 0.34 0.42 0.51 0.42 0.50 0.59 0.58 0.67 0.76 30.00 0.81 0.88 0.96 1.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION C->Z D&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.34 0.44 0.29 0.37 0.47 0.34 0.42 0.52 0.44 0.53 0.62 30.00 0.81 0.84 0.89 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.32 0.42 0.32 0.40 0.50 0.40 0.48 0.58 0.56 0.64 0.74 30.00 0.79 0.87 0.95 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION C->Z D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.37 0.50 0.30 0.40 0.53 0.35 0.45 0.58 0.45 0.55 0.68 30.00 0.99 1.02 1.07 1.17 Rev.1.01.10 2 - 178 TC200G SERIES DATA SHEET EON1P EON1P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.34 0.44 0.34 0.42 0.51 0.42 0.50 0.60 0.58 0.66 0.76 30.00 0.81 0.88 0.97 1.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION C->Z D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.40 0.53 0.33 0.43 0.56 0.38 0.48 0.61 0.48 0.58 0.71 30.00 1.03 1.06 1.11 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.35 0.45 0.33 0.41 0.50 0.39 0.47 0.56 0.50 0.58 0.68 30.00 0.82 0.87 0.93 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION D->Z C&A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.47 0.32 0.40 0.50 0.39 0.47 0.56 0.53 0.62 0.72 30.00 0.84 0.87 0.94 1.09 Rev.1.01.10 2 - 179 TC200G SERIES DATA SHEET EON1P EON1P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.34 0.43 0.31 0.39 0.49 0.37 0.45 0.55 0.47 0.56 0.66 30.00 0.80 0.86 0.92 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION D->Z C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.40 0.53 0.33 0.43 0.56 0.39 0.49 0.62 0.54 0.64 0.77 30.00 1.03 1.05 1.12 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1051 0.22 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.36 0.45 0.33 0.41 0.51 0.39 0.47 0.57 0.49 0.58 0.68 30.00 0.82 0.87 0.94 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0446 0.14 PATH CONDITION PATH CONDITION D->Z C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.43 0.56 0.36 0.46 0.59 0.42 0.53 0.65 0.57 0.67 0.80 30.00 1.06 1.09 1.15 1.29 Rev.1.01.10 2 - 180 TC200G SERIES DATA SHEET EO1 CELL NAME EO1 FUNCTION 2-INPUT AND and 2-INPUT NOR into 2-INPUT NOR EO1 CELL COUNT GATE 3 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A B EO1 Z TRUTH TABLE INPUT A B C D L L L L L H L L H L L L H H L L H H L H H H H L H H H H ALL OTHER COMBINATIONS OUTPUT Z L L L L L L L H C D Verilog-HDL DESCRIPTION EO1 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:EO1 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.03 1.12 1.00 1.05 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 20.3 Rev.1.01.10 2 - 181 TC200G SERIES DATA SHEET EO1 EO1 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.48 0.82 0.23 0.50 0.84 0.28 0.56 0.89 0.44 0.75 1.10 30.00 2.18 2.20 2.24 2.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION A->Z B&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.26 0.44 0.18 0.34 0.53 0.23 0.44 0.65 0.27 0.59 0.89 30.00 1.18 1.27 1.41 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION A->Z B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.48 0.82 0.23 0.50 0.84 0.28 0.56 0.89 0.44 0.75 1.10 30.00 2.18 2.20 2.24 2.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION A->Z B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.26 0.44 0.18 0.34 0.53 0.23 0.44 0.65 0.27 0.59 0.89 30.00 1.18 1.27 1.41 1.79 Rev.1.01.10 2 - 182 TC200G SERIES DATA SHEET EO1 EO1 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.48 0.82 0.23 0.50 0.84 0.28 0.56 0.89 0.44 0.75 1.10 30.00 2.18 2.20 2.24 2.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.26 0.44 0.18 0.34 0.53 0.23 0.44 0.65 0.27 0.59 0.89 30.00 1.18 1.27 1.41 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION B->Z A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.53 0.87 0.27 0.54 0.88 0.34 0.61 0.94 0.53 0.82 1.16 30.00 2.23 2.24 2.28 2.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION B->Z A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.27 0.46 0.17 0.33 0.52 0.21 0.40 0.60 0.22 0.50 0.77 30.00 1.20 1.26 1.35 1.61 Rev.1.01.10 2 - 183 TC200G SERIES DATA SHEET EO1 EO1 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.53 0.87 0.27 0.54 0.88 0.34 0.61 0.94 0.53 0.82 1.16 30.00 2.23 2.24 2.28 2.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.27 0.46 0.17 0.33 0.52 0.21 0.40 0.60 0.22 0.50 0.77 30.00 1.20 1.26 1.35 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION B->Z A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.53 0.87 0.27 0.54 0.88 0.34 0.61 0.94 0.53 0.82 1.16 30.00 2.23 2.24 2.28 2.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION B->Z A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.27 0.46 0.17 0.33 0.52 0.21 0.40 0.60 0.22 0.50 0.77 30.00 1.20 1.26 1.35 1.61 Rev.1.01.10 2 - 184 TC200G SERIES DATA SHEET EO1 EO1 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.64 0.98 0.42 0.70 1.04 0.45 0.72 1.07 0.45 0.72 1.07 30.00 2.33 2.39 2.42 2.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.41 0.54 0.32 0.43 0.56 0.40 0.51 0.64 0.60 0.72 0.84 30.00 1.00 1.02 1.10 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION C->Z ~D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.58 0.92 0.37 0.64 0.99 0.39 0.67 1.01 0.40 0.67 1.01 30.00 2.28 2.34 2.37 2.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION C->Z ~D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.40 0.52 0.30 0.42 0.55 0.38 0.50 0.62 0.58 0.70 0.83 30.00 0.99 1.01 1.09 1.30 Rev.1.01.10 2 - 185 TC200G SERIES DATA SHEET EO1 EO1 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.48 0.74 0.33 0.54 0.80 0.36 0.57 0.83 0.36 0.58 0.84 30.00 1.77 1.83 1.86 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION C->Z ~D&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.41 0.53 0.32 0.43 0.55 0.39 0.51 0.63 0.60 0.71 0.84 30.00 1.00 1.02 1.10 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION D->Z ~C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.65 0.99 0.43 0.71 1.05 0.47 0.75 1.09 0.52 0.80 1.14 30.00 2.34 2.41 2.45 2.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION D->Z ~C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.44 0.56 0.32 0.43 0.56 0.36 0.48 0.60 0.50 0.62 0.75 30.00 1.03 1.02 1.07 1.22 Rev.1.01.10 2 - 186 TC200G SERIES DATA SHEET EO1 EO1 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.59 0.94 0.38 0.66 1.00 0.42 0.70 1.04 0.47 0.74 1.08 30.00 2.29 2.36 2.40 2.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.42 0.55 0.31 0.42 0.55 0.35 0.46 0.59 0.48 0.61 0.74 30.00 1.01 1.01 1.06 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1953 0.29 PATH CONDITION PATH CONDITION D->Z ~C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.49 0.75 0.34 0.55 0.81 0.39 0.60 0.86 0.44 0.65 0.91 30.00 1.78 1.84 1.89 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0655 0.13 PATH CONDITION PATH CONDITION D->Z ~C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.43 0.56 0.32 0.43 0.56 0.36 0.47 0.60 0.49 0.62 0.75 30.00 1.02 1.02 1.07 1.22 Rev.1.01.10 2 - 187 TC200G SERIES DATA SHEET EO1P CELL NAME EO1P FUNCTION 2-INPUT AND and 2-INPUT NOR into 2-INPUT NOR EO1P CELL COUNT GATE 4 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL A B EO1P Z TRUTH TABLE INPUT A B C D L L L L L H L L H L L L H H L L H H L H H H H L H H H H ALL OTHER COMBINATIONS OUTPUT Z L L L L L L L H C D Verilog-HDL DESCRIPTION EO1P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:EO1P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 2.02 1.99 1.05 1.07 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 35.6 Rev.1.01.10 2 - 188 TC200G SERIES DATA SHEET EO1P EO1P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.31 0.50 0.17 0.33 0.52 0.22 0.38 0.58 0.34 0.54 0.75 30.00 1.27 1.29 1.33 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION A->Z B&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.18 0.30 0.15 0.26 0.38 0.19 0.34 0.49 0.21 0.44 0.66 30.00 0.76 0.85 0.98 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH CONDITION PATH CONDITION A->Z B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.31 0.50 0.17 0.33 0.52 0.22 0.38 0.58 0.34 0.54 0.75 30.00 1.27 1.29 1.33 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION A->Z B&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.18 0.30 0.15 0.26 0.38 0.19 0.34 0.49 0.21 0.44 0.66 30.00 0.76 0.85 0.98 1.30 Rev.1.01.10 2 - 189 TC200G SERIES DATA SHEET EO1P EO1P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.31 0.50 0.17 0.33 0.52 0.22 0.38 0.58 0.34 0.54 0.75 30.00 1.27 1.29 1.33 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION A->Z B&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.18 0.30 0.15 0.26 0.38 0.19 0.34 0.49 0.21 0.44 0.66 30.00 0.76 0.85 0.98 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH CONDITION PATH CONDITION B->Z A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.38 0.57 0.23 0.39 0.58 0.30 0.45 0.64 0.49 0.66 0.85 30.00 1.33 1.34 1.39 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION B->Z A&C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.20 0.31 0.15 0.24 0.36 0.17 0.29 0.42 0.13 0.31 0.49 30.00 0.78 0.83 0.89 1.05 Rev.1.01.10 2 - 190 TC200G SERIES DATA SHEET EO1P EO1P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.38 0.57 0.23 0.39 0.58 0.30 0.45 0.64 0.49 0.66 0.85 30.00 1.33 1.34 1.39 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION B->Z A&C&~D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.20 0.31 0.15 0.24 0.36 0.17 0.29 0.42 0.13 0.31 0.49 30.00 0.78 0.83 0.89 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH CONDITION PATH CONDITION B->Z A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.38 0.57 0.23 0.39 0.58 0.30 0.45 0.64 0.49 0.66 0.85 30.00 1.33 1.34 1.39 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION B->Z A&~C&D LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.20 0.31 0.15 0.24 0.36 0.17 0.29 0.42 0.13 0.31 0.49 30.00 0.78 0.83 0.89 1.05 Rev.1.01.10 2 - 191 TC200G SERIES DATA SHEET EO1P EO1P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.50 0.70 0.41 0.57 0.77 0.46 0.62 0.81 0.50 0.66 0.85 30.00 1.46 1.53 1.58 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION C->Z ~D&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.42 0.50 0.36 0.44 0.52 0.44 0.52 0.60 0.65 0.73 0.82 30.00 0.80 0.82 0.90 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH CONDITION PATH CONDITION C->Z ~D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.43 0.63 0.34 0.50 0.69 0.39 0.55 0.74 0.43 0.59 0.78 30.00 1.39 1.46 1.51 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION C->Z ~D&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.48 0.34 0.42 0.50 0.42 0.50 0.58 0.62 0.71 0.80 30.00 0.78 0.80 0.88 1.10 Rev.1.01.10 2 - 192 TC200G SERIES DATA SHEET EO1P EO1P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~D&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.37 0.52 0.32 0.44 0.59 0.36 0.49 0.63 0.41 0.53 0.68 30.00 1.09 1.16 1.21 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION C->Z ~D&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.41 0.50 0.36 0.43 0.51 0.44 0.51 0.60 0.65 0.73 0.81 30.00 0.79 0.81 0.89 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH CONDITION PATH CONDITION D->Z ~C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.51 0.71 0.42 0.58 0.78 0.48 0.64 0.84 0.57 0.72 0.92 30.00 1.47 1.54 1.60 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION D->Z ~C&A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.44 0.52 0.36 0.44 0.52 0.40 0.48 0.56 0.53 0.61 0.70 30.00 0.82 0.82 0.86 1.01 Rev.1.01.10 2 - 193 TC200G SERIES DATA SHEET EO1P EO1P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.44 0.64 0.35 0.51 0.71 0.41 0.57 0.76 0.50 0.66 0.84 30.00 1.40 1.47 1.53 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION D->Z ~C&~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.42 0.50 0.34 0.42 0.50 0.37 0.46 0.54 0.50 0.59 0.68 30.00 0.80 0.80 0.84 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1115 0.24 PATH CONDITION PATH CONDITION D->Z ~C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.38 0.53 0.33 0.45 0.60 0.39 0.51 0.66 0.48 0.60 0.75 30.00 1.10 1.18 1.24 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0410 0.13 PATH CONDITION PATH CONDITION D->Z ~C&~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.43 0.52 0.35 0.43 0.51 0.39 0.47 0.55 0.53 0.61 0.70 30.00 0.81 0.81 0.85 1.00 Rev.1.01.10 2 - 194 TC200G SERIES DATA SHEET EO3 CELL NAME EO3 FUNCTION 3-INPUT EXCLUSIVE OR 7 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 EO3 CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B C EO3 Z C L H L H L H L H OUTPUT Z L H H L H L L H Verilog-HDL DESCRIPTION EO3 inst(Z,A,B,C); VHDL DESCRIPTION inst:EO3 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.04 3.30 2.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 48.9 Rev.1.01.10 2 - 195 TC200G SERIES DATA SHEET EO3 EO3 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.57 0.73 0.50 0.65 0.81 0.61 0.76 0.92 0.82 0.97 1.13 30.00 1.34 1.42 1.53 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.66 0.82 0.53 0.69 0.85 0.60 0.77 0.92 0.79 0.96 1.12 30.00 1.31 1.34 1.42 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.85 1.01 0.74 0.88 1.04 0.81 0.96 1.12 0.99 1.14 1.30 30.00 1.62 1.65 1.73 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.76 0.92 0.69 0.85 1.00 0.80 0.95 1.11 0.98 1.14 1.29 30.00 1.40 1.49 1.59 1.78 Rev.1.01.10 2 - 196 TC200G SERIES DATA SHEET EO3 EO3 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.86 1.02 0.75 0.89 1.05 0.82 0.97 1.13 1.00 1.15 1.31 30.00 1.63 1.66 1.74 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.77 0.92 0.70 0.86 1.01 0.80 0.96 1.11 0.99 1.15 1.30 30.00 1.41 1.50 1.60 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.57 0.73 0.50 0.65 0.81 0.61 0.75 0.91 0.82 0.96 1.12 30.00 1.33 1.42 1.52 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.65 0.81 0.52 0.68 0.84 0.59 0.76 0.92 0.78 0.95 1.12 30.00 1.30 1.33 1.41 1.62 Rev.1.01.10 2 - 197 TC200G SERIES DATA SHEET EO3 EO3 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.47 0.63 0.41 0.55 0.71 0.49 0.64 0.80 0.62 0.76 0.92 30.00 1.24 1.32 1.41 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.57 0.72 0.44 0.60 0.75 0.51 0.67 0.82 0.68 0.84 1.00 30.00 1.21 1.23 1.30 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.57 0.73 0.46 0.60 0.76 0.52 0.67 0.83 0.66 0.80 0.96 30.00 1.34 1.37 1.43 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.47 0.63 0.40 0.56 0.71 0.54 0.69 0.84 0.69 0.85 1.00 30.00 1.12 1.20 1.33 1.48 Rev.1.01.10 2 - 198 TC200G SERIES DATA SHEET EO3 EO3 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.60 0.77 0.49 0.63 0.80 0.55 0.70 0.86 0.69 0.83 0.99 30.00 1.37 1.40 1.47 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.61 0.39 0.54 0.70 0.53 0.68 0.83 0.67 0.82 0.97 30.00 1.09 1.18 1.31 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.50 0.66 0.43 0.58 0.74 0.52 0.67 0.83 0.67 0.81 0.98 30.00 1.27 1.35 1.44 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.54 0.69 0.41 0.56 0.71 0.48 0.63 0.78 0.64 0.80 0.95 30.00 1.17 1.19 1.26 1.44 Rev.1.01.10 2 - 199 TC200G SERIES DATA SHEET EO3 EO3 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.51 0.28 0.43 0.59 0.35 0.50 0.66 0.48 0.62 0.78 30.00 1.11 1.19 1.27 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.49 0.26 0.39 0.52 0.32 0.45 0.59 0.47 0.61 0.75 30.00 0.95 0.99 1.06 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.61 0.34 0.48 0.64 0.39 0.54 0.70 0.51 0.65 0.81 30.00 1.21 1.25 1.30 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.36 0.51 0.30 0.45 0.59 0.44 0.58 0.72 0.56 0.70 0.84 30.00 0.99 1.07 1.19 1.31 Rev.1.01.10 2 - 200 TC200G SERIES DATA SHEET EO3 EO3 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.46 0.62 0.35 0.49 0.65 0.40 0.55 0.71 0.52 0.66 0.82 30.00 1.23 1.26 1.32 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.35 0.49 0.30 0.44 0.58 0.43 0.57 0.70 0.55 0.68 0.82 30.00 0.97 1.05 1.17 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0841 0.13 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.36 0.52 0.29 0.44 0.60 0.37 0.51 0.67 0.51 0.65 0.81 30.00 1.12 1.21 1.28 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0375 0.13 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.48 0.26 0.38 0.52 0.32 0.45 0.58 0.46 0.60 0.74 30.00 0.94 0.98 1.04 1.20 Rev.1.01.10 2 - 201 TC200G SERIES DATA SHEET EO3P CELL NAME EO3P FUNCTION 3-INPUT EXCLUSIVE OR 7 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 EO3P CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. A B C EO3P Z C L H L H L H L H OUTPUT Z L H H L H L L H Verilog-HDL DESCRIPTION EO3P inst(Z,A,B,C); VHDL DESCRIPTION inst:EO3P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.04 3.30 2.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 82.1 Rev.1.01.10 2 - 202 TC200G SERIES DATA SHEET EO3P EO3P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.54 0.64 0.53 0.62 0.72 0.64 0.72 0.82 0.86 0.95 1.04 30.00 0.99 1.08 1.18 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION A->Z B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.63 0.73 0.54 0.65 0.76 0.62 0.73 0.84 0.81 0.93 1.04 30.00 1.07 1.10 1.17 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.82 0.92 0.76 0.85 0.95 0.84 0.93 1.03 1.02 1.11 1.21 30.00 1.28 1.31 1.39 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION A->Z B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.73 0.83 0.71 0.81 0.92 0.81 0.92 1.02 1.00 1.10 1.21 30.00 1.16 1.25 1.35 1.54 Rev.1.01.10 2 - 203 TC200G SERIES DATA SHEET EO3P EO3P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.83 0.93 0.77 0.86 0.96 0.85 0.94 1.04 1.03 1.12 1.22 30.00 1.29 1.32 1.40 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION A->Z ~B&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.74 0.84 0.72 0.82 0.93 0.82 0.93 1.03 1.01 1.11 1.22 30.00 1.17 1.26 1.36 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.53 0.63 0.53 0.62 0.71 0.63 0.72 0.82 0.85 0.94 1.04 30.00 0.99 1.07 1.18 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION A->Z ~B&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.62 0.72 0.53 0.65 0.75 0.61 0.72 0.83 0.80 0.92 1.03 30.00 1.06 1.09 1.16 1.37 Rev.1.01.10 2 - 204 TC200G SERIES DATA SHEET EO3P EO3P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.44 0.54 0.44 0.52 0.62 0.53 0.62 0.72 0.67 0.76 0.86 30.00 0.90 0.98 1.07 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION B->Z A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.54 0.64 0.45 0.56 0.67 0.52 0.63 0.73 0.70 0.80 0.91 30.00 0.97 1.00 1.06 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.54 0.64 0.48 0.57 0.67 0.55 0.63 0.73 0.68 0.76 0.86 30.00 1.00 1.03 1.09 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION B->Z A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.44 0.55 0.41 0.52 0.62 0.55 0.66 0.76 0.73 0.84 0.94 30.00 0.88 0.95 1.09 1.27 Rev.1.01.10 2 - 205 TC200G SERIES DATA SHEET EO3P EO3P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.58 0.68 0.52 0.61 0.70 0.58 0.67 0.77 0.71 0.79 0.89 30.00 1.04 1.06 1.12 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION B->Z ~A&C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.42 0.52 0.40 0.51 0.61 0.54 0.65 0.75 0.70 0.81 0.91 30.00 0.85 0.94 1.08 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.47 0.57 0.47 0.55 0.65 0.56 0.65 0.75 0.73 0.82 0.92 30.00 0.93 1.01 1.11 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION B->Z ~A&~C LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.50 0.60 0.42 0.53 0.63 0.49 0.59 0.70 0.65 0.76 0.87 30.00 0.93 0.95 1.02 1.20 Rev.1.01.10 2 - 206 TC200G SERIES DATA SHEET EO3P EO3P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.32 0.42 0.31 0.40 0.50 0.40 0.49 0.59 0.57 0.65 0.75 30.00 0.78 0.86 0.94 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION C->Z A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.32 0.42 0.26 0.36 0.45 0.33 0.42 0.52 0.48 0.58 0.68 30.00 0.73 0.77 0.83 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.41 0.51 0.36 0.45 0.54 0.41 0.50 0.60 0.53 0.62 0.72 30.00 0.87 0.90 0.96 1.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION C->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.32 0.43 0.31 0.41 0.51 0.45 0.56 0.65 0.62 0.72 0.82 30.00 0.75 0.83 0.97 1.13 Rev.1.01.10 2 - 207 TC200G SERIES DATA SHEET EO3P EO3P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.43 0.53 0.37 0.46 0.56 0.43 0.52 0.62 0.54 0.63 0.73 30.00 0.89 0.92 0.98 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION C->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.31 0.41 0.30 0.40 0.50 0.45 0.55 0.64 0.60 0.70 0.79 30.00 0.73 0.82 0.96 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0481 0.14 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.43 0.32 0.41 0.51 0.42 0.50 0.60 0.60 0.68 0.78 30.00 0.79 0.87 0.96 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0247 0.13 PATH CONDITION PATH CONDITION C->Z ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.32 0.41 0.26 0.36 0.45 0.33 0.42 0.51 0.47 0.57 0.67 30.00 0.72 0.76 0.82 0.98 Rev.1.01.10 2 - 208 TC200G SERIES DATA SHEET FA1 CELL NAME FA1 FUNCTION FULL ADDER 9 LOGIC SYMBOL TRUTH TABLE INPUT CI A L L L L L H L H H L H L H H H H 0 FA1 CELL COUNT GATE I/O 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. FA1 CI CI AA BB COCO SS B L H L H L H L H S L H H L H L L H OUTPUT CO L L L H L H H H Verilog-HDL DESCRIPTION FA1 inst(S,CO,CI,A,B); VHDL DESCRIPTION inst:FA1 port map(S,CO,CI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE S,CO 6880.0 (LU*MHz) INPUT LOAD PIN NAME CI A B (LU) LOAD 4.46 3.05 4.50 OUTPUT DRIVE PIN NAME DRIVE (LU) S 43.0 CO 46.3 Rev.1.01.10 2 - 209 TC200G SERIES DATA SHEET FA1 FA1 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0882 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.41 0.57 0.33 0.46 0.62 0.40 0.54 0.70 0.51 0.65 0.82 30.00 1.19 1.24 1.31 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0398 0.18 PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.61 0.76 0.45 0.60 0.75 0.48 0.64 0.79 0.64 0.80 0.95 30.00 1.27 1.26 1.30 1.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0882 0.10 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.59 0.34 0.49 0.65 0.42 0.56 0.73 0.57 0.71 0.88 30.00 1.21 1.27 1.35 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0398 0.18 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.64 0.78 0.48 0.63 0.77 0.50 0.66 0.80 0.64 0.79 0.94 30.00 1.28 1.27 1.30 1.45 Rev.1.01.10 2 - 210 TC200G SERIES DATA SHEET FA1 FA1 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.76 0.94 0.68 0.83 1.01 0.74 0.90 1.08 0.85 1.00 1.18 30.00 1.63 1.70 1.77 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.79 0.93 0.68 0.83 0.97 0.74 0.89 1.03 0.87 1.02 1.16 30.00 1.43 1.46 1.53 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.70 0.85 1.03 0.74 0.89 1.06 0.80 0.95 1.13 0.93 1.08 1.26 30.00 1.72 1.75 1.81 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.81 0.94 0.74 0.88 1.01 0.81 0.94 1.08 0.91 1.05 1.18 30.00 1.43 1.50 1.56 1.67 Rev.1.01.10 2 - 211 TC200G SERIES DATA SHEET FA1 FA1 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.74 0.92 0.62 0.77 0.95 0.70 0.85 1.03 0.87 1.03 1.20 30.00 1.61 1.64 1.72 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.68 0.82 0.61 0.76 0.90 0.70 0.85 0.99 0.87 1.01 1.16 30.00 1.32 1.40 1.49 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.74 0.92 0.67 0.82 0.99 0.76 0.91 1.08 0.92 1.07 1.25 30.00 1.60 1.68 1.77 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.78 0.92 0.68 0.81 0.95 0.76 0.89 1.03 0.93 1.06 1.20 30.00 1.40 1.43 1.51 1.68 Rev.1.01.10 2 - 212 TC200G SERIES DATA SHEET FA1 FA1 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0882 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.40 0.55 0.36 0.49 0.64 0.46 0.59 0.75 0.65 0.79 0.94 30.00 1.16 1.25 1.35 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0398 0.18 PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.53 0.68 0.37 0.52 0.67 0.40 0.56 0.71 0.51 0.67 0.82 30.00 1.19 1.19 1.22 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0882 0.10 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.41 0.57 0.33 0.47 0.63 0.39 0.53 0.69 0.49 0.63 0.80 30.00 1.19 1.24 1.31 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0398 0.18 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.65 0.79 0.50 0.65 0.80 0.57 0.72 0.86 0.79 0.94 1.09 30.00 1.29 1.29 1.36 1.60 Rev.1.01.10 2 - 213 TC200G SERIES DATA SHEET FA1 FA1 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.63 0.81 0.56 0.71 0.89 0.67 0.82 1.00 0.80 0.95 1.13 30.00 1.50 1.58 1.69 1.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.71 0.85 0.60 0.74 0.88 0.66 0.80 0.94 0.77 0.92 1.06 30.00 1.35 1.38 1.44 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.77 0.94 0.65 0.80 0.98 0.71 0.86 1.04 0.82 0.97 1.15 30.00 1.63 1.66 1.72 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.68 0.81 0.63 0.76 0.89 0.73 0.87 1.00 0.86 1.00 1.13 30.00 1.30 1.38 1.49 1.62 Rev.1.01.10 2 - 214 TC200G SERIES DATA SHEET FA1 FA1 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.64 0.82 0.51 0.67 0.85 0.58 0.73 0.91 0.74 0.89 1.07 30.00 1.51 1.54 1.60 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.59 0.74 0.52 0.67 0.81 0.58 0.73 0.87 0.68 0.82 0.97 30.00 1.23 1.31 1.37 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.66 0.83 0.58 0.73 0.91 0.64 0.79 0.97 0.73 0.88 1.06 30.00 1.52 1.59 1.65 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.68 0.82 0.58 0.71 0.85 0.65 0.78 0.92 0.80 0.94 1.07 30.00 1.30 1.34 1.40 1.56 Rev.1.01.10 2 - 215 TC200G SERIES DATA SHEET FA1 FA1 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0882 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.42 0.58 0.37 0.51 0.67 0.46 0.61 0.77 0.62 0.77 0.93 30.00 1.20 1.29 1.39 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0398 0.18 PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.54 0.69 0.40 0.56 0.71 0.48 0.63 0.78 0.66 0.82 0.97 30.00 1.21 1.22 1.29 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0882 0.10 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.42 0.58 0.36 0.51 0.67 0.45 0.60 0.76 0.61 0.75 0.92 30.00 1.20 1.29 1.39 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0398 0.18 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.61 0.76 0.47 0.63 0.78 0.54 0.69 0.84 0.74 0.90 1.05 30.00 1.27 1.29 1.35 1.57 Rev.1.01.10 2 - 216 TC200G SERIES DATA SHEET FA1 FA1 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.51 0.27 0.41 0.59 0.33 0.48 0.65 0.43 0.58 0.76 30.00 1.19 1.27 1.33 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.36 0.49 0.26 0.39 0.52 0.33 0.45 0.58 0.47 0.60 0.73 30.00 0.97 1.00 1.06 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.63 0.34 0.49 0.66 0.40 0.55 0.72 0.52 0.67 0.85 30.00 1.32 1.35 1.41 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.49 0.31 0.44 0.58 0.42 0.54 0.68 0.53 0.66 0.80 30.00 0.98 1.07 1.16 1.28 Rev.1.01.10 2 - 217 TC200G SERIES DATA SHEET FA1 FA1 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.63 0.34 0.49 0.66 0.40 0.55 0.72 0.52 0.67 0.85 30.00 1.32 1.35 1.41 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.49 0.31 0.44 0.58 0.42 0.54 0.68 0.53 0.66 0.80 30.00 0.98 1.07 1.16 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.1000 0.11 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.51 0.27 0.41 0.59 0.33 0.48 0.65 0.43 0.58 0.76 30.00 1.19 1.27 1.33 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0400 0.13 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.36 0.49 0.26 0.39 0.52 0.33 0.45 0.58 0.47 0.60 0.73 30.00 0.97 1.00 1.06 1.22 Rev.1.01.10 2 - 218 TC200G SERIES DATA SHEET FA1P CELL NAME FA1P FUNCTION FULL ADDER 10 LOGIC SYMBOL TRUTH TABLE INPUT CI A L L L L L H L H H L H L H H H H 0 FA1P CELL COUNT GATE I/O 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. FA1P CI CI AA BB COCO SS B L H L H L H L H S L H H L H L L H OUTPUT CO L L L H L H H H Verilog-HDL DESCRIPTION FA1P inst(S,CO,CI,A,B); VHDL DESCRIPTION inst:FA1P port map(S,CO,CI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE S 6880.0 (LU*MHz) CO 12880.0 INPUT LOAD PIN NAME CI A B (LU) LOAD 4.46 3.04 4.54 OUTPUT DRIVE PIN NAME DRIVE (LU) S 85.8 CO 93.2 Rev.1.01.10 2 - 219 TC200G SERIES DATA SHEET FA1P FA1P 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0438 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.35 0.43 0.33 0.40 0.49 0.40 0.48 0.56 0.54 0.62 0.70 30.00 0.75 0.81 0.88 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0196 0.18 PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.56 0.65 0.46 0.56 0.65 0.49 0.59 0.68 0.65 0.75 0.84 30.00 0.94 0.93 0.96 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0438 0.09 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.45 0.34 0.42 0.51 0.43 0.51 0.59 0.59 0.67 0.76 30.00 0.78 0.83 0.92 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0196 0.18 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.58 0.67 0.48 0.58 0.67 0.51 0.60 0.69 0.64 0.74 0.83 30.00 0.95 0.94 0.96 1.11 Rev.1.01.10 2 - 220 TC200G SERIES DATA SHEET FA1P FA1P 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.70 0.80 0.69 0.77 0.87 0.75 0.84 0.93 0.86 0.94 1.04 30.00 1.15 1.23 1.29 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.75 0.85 0.69 0.79 0.88 0.75 0.85 0.94 0.88 0.98 1.07 30.00 1.14 1.18 1.24 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.79 0.88 0.74 0.82 0.92 0.80 0.89 0.98 0.93 1.02 1.11 30.00 1.24 1.27 1.33 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.77 0.86 0.75 0.84 0.93 0.82 0.90 0.99 0.92 1.01 1.10 30.00 1.14 1.21 1.28 1.38 Rev.1.01.10 2 - 221 TC200G SERIES DATA SHEET FA1P FA1P 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.68 0.78 0.63 0.72 0.81 0.71 0.79 0.89 0.88 0.97 1.06 30.00 1.13 1.17 1.24 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.64 0.74 0.63 0.72 0.81 0.71 0.81 0.90 0.88 0.98 1.07 30.00 1.03 1.11 1.20 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.68 0.77 0.67 0.76 0.85 0.76 0.85 0.94 0.93 1.01 1.10 30.00 1.12 1.20 1.29 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.75 0.83 0.69 0.78 0.87 0.77 0.86 0.94 0.94 1.02 1.11 30.00 1.12 1.15 1.23 1.40 Rev.1.01.10 2 - 222 TC200G SERIES DATA SHEET FA1P FA1P 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0438 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.35 0.43 0.36 0.43 0.52 0.47 0.55 0.63 0.69 0.77 0.85 30.00 0.75 0.84 0.95 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0196 0.18 PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.49 0.58 0.39 0.48 0.57 0.42 0.51 0.60 0.53 0.63 0.72 30.00 0.86 0.85 0.88 1.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0438 0.09 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.45 0.34 0.42 0.51 0.40 0.49 0.58 0.53 0.61 0.70 30.00 0.77 0.83 0.91 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0196 0.18 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.61 0.69 0.52 0.61 0.70 0.58 0.67 0.76 0.81 0.91 1.00 30.00 0.97 0.97 1.03 1.28 Rev.1.01.10 2 - 223 TC200G SERIES DATA SHEET FA1P FA1P 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.57 0.66 0.56 0.65 0.75 0.67 0.76 0.85 0.80 0.88 0.98 30.00 1.02 1.10 1.21 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.66 0.76 0.60 0.70 0.79 0.66 0.76 0.85 0.78 0.87 0.96 30.00 1.05 1.09 1.15 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.70 0.80 0.65 0.74 0.83 0.71 0.80 0.89 0.83 0.91 1.00 30.00 1.15 1.18 1.24 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.64 0.72 0.63 0.72 0.81 0.74 0.83 0.92 0.87 0.96 1.04 30.00 1.01 1.09 1.20 1.33 Rev.1.01.10 2 - 224 TC200G SERIES DATA SHEET FA1P FA1P 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.58 0.67 0.52 0.61 0.71 0.59 0.68 0.77 0.75 0.83 0.93 30.00 1.03 1.06 1.13 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.56 0.65 0.54 0.64 0.73 0.60 0.70 0.79 0.70 0.79 0.89 30.00 0.95 1.03 1.09 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.60 0.69 0.59 0.67 0.77 0.65 0.73 0.83 0.74 0.83 0.92 30.00 1.04 1.12 1.18 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.65 0.74 0.59 0.68 0.77 0.66 0.75 0.83 0.81 0.90 0.99 30.00 1.02 1.05 1.12 1.27 Rev.1.01.10 2 - 225 TC200G SERIES DATA SHEET FA1P FA1P 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0438 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.44 0.37 0.45 0.53 0.47 0.55 0.64 0.66 0.74 0.83 30.00 0.77 0.86 0.97 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0196 0.18 PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.50 0.58 0.41 0.51 0.60 0.48 0.58 0.67 0.68 0.78 0.87 30.00 0.87 0.88 0.95 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0438 0.09 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.35 0.44 0.36 0.44 0.53 0.46 0.55 0.64 0.64 0.73 0.82 30.00 0.77 0.86 0.96 1.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0196 0.18 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.57 0.66 0.48 0.58 0.67 0.55 0.64 0.73 0.76 0.86 0.95 30.00 0.94 0.95 1.01 1.24 Rev.1.01.10 2 - 226 TC200G SERIES DATA SHEET FA1P FA1P 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.29 0.39 0.29 0.37 0.47 0.37 0.45 0.55 0.52 0.60 0.70 30.00 0.74 0.82 0.90 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.41 0.27 0.36 0.44 0.33 0.42 0.51 0.48 0.57 0.66 30.00 0.69 0.72 0.79 0.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.47 0.32 0.41 0.50 0.38 0.46 0.56 0.49 0.58 0.67 30.00 0.82 0.85 0.91 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.30 0.39 0.30 0.39 0.48 0.43 0.52 0.60 0.57 0.66 0.74 30.00 0.68 0.77 0.89 1.03 Rev.1.01.10 2 - 227 TC200G SERIES DATA SHEET FA1P FA1P 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.47 0.32 0.41 0.50 0.38 0.46 0.56 0.49 0.58 0.67 30.00 0.82 0.85 0.91 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.30 0.39 0.30 0.39 0.48 0.43 0.52 0.60 0.57 0.66 0.74 30.00 0.68 0.77 0.89 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0487 0.10 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.29 0.39 0.29 0.37 0.47 0.37 0.45 0.55 0.52 0.60 0.70 30.00 0.74 0.82 0.90 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0223 0.13 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.41 0.27 0.36 0.44 0.33 0.42 0.51 0.48 0.57 0.66 30.00 0.69 0.72 0.79 0.95 Rev.1.01.10 2 - 228 TC200G SERIES DATA SHEET FA1A CELL NAME FA1A FUNCTION FULL ADDER 8 LOGIC SYMBOL TRUTH TABLE INPUT CI A L L L L L H L H H L H L H H H H 0 FA1A CELL COUNT GATE I/O 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. FA1A CI CI AA BB COCO SS B L H L H L H L H S L H H L H L L H OUTPUT CO L L L H L H H H Verilog-HDL DESCRIPTION FA1A inst(S,CO,CI,A,B); VHDL DESCRIPTION inst:FA1A port map(S,CO,CI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE S,CO 6880.0 (LU*MHz) INPUT LOAD PIN NAME CI A B (LU) LOAD 2.21 0.99 2.08 OUTPUT DRIVE PIN NAME DRIVE (LU) S 50.5 CO 41.8 Rev.1.01.10 2 - 229 TC200G SERIES DATA SHEET FA1A FA1A 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.1010 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.83 1.00 0.76 0.91 1.09 0.86 1.01 1.18 1.03 1.18 1.35 30.00 1.69 1.77 1.87 2.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0426 0.13 PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.92 1.06 0.82 0.95 1.09 0.90 1.03 1.17 1.07 1.21 1.35 30.00 1.58 1.61 1.68 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.1010 0.12 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.87 1.02 1.20 0.94 1.10 1.28 1.01 1.16 1.34 1.12 1.27 1.45 30.00 1.89 1.97 2.03 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0426 0.13 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.97 1.11 0.86 1.00 1.14 0.93 1.06 1.21 1.05 1.19 1.34 30.00 1.62 1.65 1.72 1.85 Rev.1.01.10 2 - 230 TC200G SERIES DATA SHEET FA1A FA1A 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.79 0.94 0.74 0.87 1.03 0.84 0.97 1.12 1.01 1.14 1.30 30.00 1.54 1.62 1.71 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.88 1.00 0.78 0.91 1.03 0.85 0.98 1.11 1.03 1.15 1.28 30.00 1.44 1.47 1.54 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.78 0.94 0.68 0.81 0.97 0.75 0.89 1.05 0.93 1.07 1.22 30.00 1.55 1.58 1.65 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.73 0.87 0.66 0.81 0.95 0.76 0.91 1.05 0.93 1.08 1.22 30.00 1.32 1.41 1.50 1.68 Rev.1.01.10 2 - 231 TC200G SERIES DATA SHEET FA1A FA1A 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.94 1.09 0.84 0.97 1.13 0.90 1.04 1.19 1.03 1.16 1.32 30.00 1.69 1.72 1.78 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.78 0.91 1.04 0.86 0.99 1.12 0.92 1.05 1.18 1.03 1.16 1.29 30.00 1.48 1.56 1.62 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.80 0.96 0.74 0.87 1.03 0.80 0.94 1.10 0.91 1.05 1.21 30.00 1.56 1.63 1.70 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.72 0.86 1.00 0.75 0.89 1.03 0.81 0.96 1.09 0.94 1.09 1.22 30.00 1.45 1.48 1.54 1.67 Rev.1.01.10 2 - 232 TC200G SERIES DATA SHEET FA1A FA1A 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.1010 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.75 0.92 0.68 0.83 1.00 0.75 0.89 1.07 0.87 1.02 1.19 30.00 1.60 1.68 1.74 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0426 0.13 PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.45 0.59 0.35 0.49 0.62 0.42 0.56 0.70 0.57 0.72 0.86 30.00 1.09 1.12 1.20 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.1010 0.12 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.40 0.57 0.34 0.48 0.65 0.43 0.57 0.74 0.59 0.74 0.91 30.00 1.26 1.33 1.42 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0426 0.13 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.89 1.03 0.78 0.92 1.06 0.86 0.99 1.13 1.01 1.14 1.28 30.00 1.53 1.57 1.64 1.79 Rev.1.01.10 2 - 233 TC200G SERIES DATA SHEET FA1A FA1A 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.72 0.87 0.66 0.79 0.95 0.72 0.85 1.01 0.81 0.94 1.10 30.00 1.46 1.54 1.60 1.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.81 0.94 0.70 0.84 0.96 0.78 0.91 1.04 0.97 1.10 1.23 30.00 1.38 1.40 1.48 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.72 0.88 0.60 0.74 0.90 0.68 0.81 0.97 0.87 1.01 1.16 30.00 1.48 1.50 1.57 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.66 0.79 0.58 0.73 0.87 0.64 0.79 0.93 0.73 0.88 1.02 30.00 1.25 1.33 1.39 1.48 Rev.1.01.10 2 - 234 TC200G SERIES DATA SHEET FA1A FA1A 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.86 1.02 0.76 0.89 1.05 0.83 0.97 1.12 0.98 1.11 1.26 30.00 1.61 1.64 1.71 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.75 0.87 0.73 0.85 0.98 0.89 1.02 1.15 1.12 1.25 1.37 30.00 1.31 1.41 1.58 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.65 0.81 0.62 0.76 0.92 0.78 0.92 1.08 1.01 1.15 1.31 30.00 1.42 1.52 1.68 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.78 0.92 0.67 0.82 0.95 0.74 0.89 1.02 0.89 1.03 1.17 30.00 1.37 1.40 1.47 1.62 Rev.1.01.10 2 - 235 TC200G SERIES DATA SHEET FA1A FA1A 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.1010 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.50 0.68 0.41 0.57 0.75 0.48 0.64 0.82 0.64 0.80 0.98 30.00 1.37 1.44 1.51 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0426 0.13 PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.51 0.66 0.38 0.53 0.69 0.45 0.60 0.75 0.59 0.75 0.91 30.00 1.18 1.21 1.28 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.1010 0.12 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.49 0.67 0.41 0.56 0.74 0.48 0.64 0.82 0.64 0.80 0.98 30.00 1.36 1.44 1.51 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0426 0.13 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.51 0.66 0.38 0.53 0.68 0.45 0.60 0.75 0.59 0.75 0.91 30.00 1.18 1.21 1.28 1.44 Rev.1.01.10 2 - 236 TC200G SERIES DATA SHEET FA1A FA1A 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.30 0.45 0.24 0.37 0.52 0.30 0.43 0.58 0.37 0.50 0.65 30.00 1.04 1.12 1.18 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.35 0.47 0.26 0.38 0.50 0.34 0.46 0.58 0.53 0.65 0.78 30.00 0.91 0.94 1.02 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.55 0.70 0.44 0.58 0.73 0.52 0.65 0.81 0.69 0.83 0.98 30.00 1.30 1.33 1.41 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.48 0.32 0.45 0.58 0.49 0.61 0.74 0.72 0.84 0.96 30.00 0.92 1.02 1.17 1.39 Rev.1.01.10 2 - 237 TC200G SERIES DATA SHEET FA1A FA1A 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.55 0.70 0.44 0.58 0.73 0.52 0.65 0.81 0.69 0.83 0.98 30.00 1.30 1.33 1.41 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.48 0.32 0.45 0.58 0.49 0.61 0.74 0.72 0.84 0.96 30.00 0.92 1.02 1.17 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0844 0.09 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.30 0.45 0.24 0.37 0.52 0.30 0.43 0.58 0.36 0.49 0.65 30.00 1.04 1.12 1.18 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0351 0.11 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.35 0.48 0.27 0.38 0.51 0.34 0.46 0.58 0.53 0.65 0.78 30.00 0.91 0.94 1.02 1.22 Rev.1.01.10 2 - 238 TC200G SERIES DATA SHEET FA1AP CELL NAME FA1AP FUNCTION FULL ADDER 9 LOGIC SYMBOL TRUTH TABLE INPUT CI A L L L L L H L H H L H L H H H H 0 FA1AP CELL COUNT GATE I/O 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. FA1AP CI CI AA BB COCO SS B L H L H L H L H S L H H L H L L H OUTPUT CO L L L H L H H H Verilog-HDL DESCRIPTION FA1AP inst(S,CO,CI,A,B); VHDL DESCRIPTION inst:FA1AP port map(S,CO,CI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE S 12880.0 (LU*MHz) CO 6880.0 INPUT LOAD PIN NAME CI A B (LU) LOAD 2.21 0.99 2.07 OUTPUT DRIVE PIN NAME DRIVE (LU) S 92.3 CO 75.8 Rev.1.01.10 2 - 239 TC200G SERIES DATA SHEET FA1AP FA1AP 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0559 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.84 0.94 0.83 0.92 1.02 0.93 1.02 1.12 1.11 1.20 1.29 30.00 1.31 1.40 1.49 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0249 0.16 PATH CONDITION PATH CONDITION A->CO B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.80 0.89 0.99 0.83 0.92 1.02 0.91 1.00 1.09 1.09 1.18 1.27 30.00 1.30 1.33 1.41 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0559 0.10 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.89 0.97 1.07 0.96 1.05 1.15 1.03 1.11 1.21 1.14 1.23 1.33 30.00 1.45 1.53 1.59 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0249 0.16 PATH CONDITION PATH CONDITION A->CO ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.92 1.01 0.86 0.95 1.04 0.92 1.02 1.11 1.05 1.14 1.24 30.00 1.33 1.36 1.42 1.55 Rev.1.01.10 2 - 240 TC200G SERIES DATA SHEET FA1AP FA1AP 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.73 0.82 0.74 0.82 0.90 0.83 0.91 1.00 1.01 1.09 1.17 30.00 1.14 1.22 1.32 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION A->S B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.83 0.92 0.78 0.86 0.95 0.85 0.94 1.03 1.03 1.11 1.20 30.00 1.19 1.22 1.30 1.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.72 0.81 0.67 0.75 0.84 0.75 0.83 0.91 0.92 1.00 1.09 30.00 1.13 1.17 1.24 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION A->S B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.69 0.78 0.67 0.77 0.86 0.77 0.87 0.96 0.95 1.04 1.14 30.00 1.07 1.15 1.24 1.42 Rev.1.01.10 2 - 241 TC200G SERIES DATA SHEET FA1AP FA1AP 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.88 0.97 0.84 0.92 1.00 0.90 0.98 1.07 1.03 1.11 1.19 30.00 1.29 1.33 1.39 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION A->S ~B&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.78 0.87 0.96 0.86 0.94 1.03 0.92 1.01 1.10 1.03 1.12 1.21 30.00 1.23 1.31 1.37 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.73 0.82 0.73 0.81 0.90 0.80 0.87 0.96 0.91 0.99 1.08 30.00 1.15 1.22 1.29 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION A->S ~B&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.83 0.92 0.77 0.86 0.95 0.83 0.92 1.01 0.96 1.05 1.14 30.00 1.20 1.23 1.29 1.42 Rev.1.01.10 2 - 242 TC200G SERIES DATA SHEET FA1AP FA1AP 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0559 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.76 0.86 0.75 0.84 0.94 0.82 0.91 1.01 0.95 1.04 1.14 30.00 1.24 1.31 1.38 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0249 0.16 PATH CONDITION PATH CONDITION B->CO A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.41 0.50 0.35 0.45 0.54 0.43 0.52 0.61 0.59 0.69 0.78 30.00 0.80 0.84 0.91 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0559 0.10 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.35 0.46 0.33 0.42 0.52 0.42 0.51 0.61 0.59 0.68 0.78 30.00 0.86 0.91 0.98 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0249 0.16 PATH CONDITION PATH CONDITION B->CO ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.83 0.92 0.77 0.86 0.95 0.84 0.93 1.02 0.99 1.08 1.18 30.00 1.23 1.27 1.34 1.49 Rev.1.01.10 2 - 243 TC200G SERIES DATA SHEET FA1AP FA1AP 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.66 0.74 0.66 0.74 0.82 0.72 0.80 0.88 0.82 0.89 0.98 30.00 1.07 1.14 1.21 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION B->S A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.77 0.86 0.71 0.79 0.88 0.78 0.87 0.96 0.97 1.06 1.15 30.00 1.13 1.16 1.23 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.65 0.74 0.60 0.68 0.77 0.67 0.75 0.84 0.87 0.95 1.04 30.00 1.07 1.09 1.17 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION B->S A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.61 0.70 0.60 0.69 0.78 0.66 0.75 0.85 0.75 0.85 0.94 30.00 0.99 1.07 1.13 1.23 Rev.1.01.10 2 - 244 TC200G SERIES DATA SHEET FA1AP FA1AP 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.79 0.88 0.75 0.83 0.91 0.82 0.90 0.98 0.96 1.04 1.12 30.00 1.20 1.24 1.31 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION B->S ~A&CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.70 0.79 0.72 0.81 0.89 0.89 0.98 1.07 1.13 1.22 1.31 30.00 1.06 1.17 1.34 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.58 0.67 0.61 0.69 0.78 0.78 0.86 0.95 1.02 1.10 1.18 30.00 1.00 1.10 1.27 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION B->S ~A&~CI LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.73 0.82 0.67 0.77 0.86 0.74 0.84 0.93 0.89 0.98 1.07 30.00 1.10 1.14 1.21 1.35 Rev.1.01.10 2 - 245 TC200G SERIES DATA SHEET FA1AP FA1AP 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0559 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.45 0.55 0.43 0.52 0.62 0.48 0.57 0.67 0.62 0.71 0.82 30.00 0.93 1.00 1.05 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0249 0.16 PATH CONDITION PATH CONDITION CI->CO A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.43 0.53 0.37 0.46 0.56 0.44 0.53 0.63 0.59 0.70 0.80 30.00 0.85 0.89 0.96 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0559 0.10 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.44 0.54 0.42 0.51 0.61 0.48 0.56 0.67 0.62 0.71 0.82 30.00 0.92 0.99 1.05 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0249 0.16 PATH CONDITION PATH CONDITION CI->CO ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.43 0.53 0.37 0.46 0.56 0.44 0.53 0.63 0.59 0.70 0.80 30.00 0.85 0.89 0.96 1.13 Rev.1.01.10 2 - 246 TC200G SERIES DATA SHEET FA1AP FA1AP 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.25 0.34 0.26 0.33 0.42 0.33 0.41 0.50 0.45 0.53 0.62 30.00 0.66 0.74 0.82 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION CI->S A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.41 0.28 0.36 0.44 0.35 0.43 0.51 0.52 0.61 0.69 30.00 0.67 0.70 0.77 0.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.48 0.57 0.44 0.52 0.61 0.53 0.60 0.69 0.73 0.80 0.89 30.00 0.90 0.93 1.01 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION CI->S A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.32 0.41 0.33 0.41 0.50 0.50 0.58 0.67 0.77 0.85 0.93 30.00 0.68 0.77 0.94 1.19 Rev.1.01.10 2 - 247 TC200G SERIES DATA SHEET FA1AP FA1AP 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.48 0.57 0.44 0.52 0.61 0.53 0.60 0.69 0.73 0.80 0.89 30.00 0.90 0.93 1.01 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION CI->S ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.32 0.41 0.33 0.41 0.50 0.50 0.58 0.67 0.77 0.85 0.93 30.00 0.68 0.77 0.94 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0447 0.11 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.25 0.34 0.26 0.33 0.42 0.33 0.41 0.50 0.45 0.53 0.62 30.00 0.66 0.74 0.82 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0204 0.14 PATH CONDITION PATH CONDITION CI->S ~A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.41 0.28 0.36 0.44 0.35 0.43 0.51 0.52 0.61 0.69 30.00 0.67 0.70 0.78 0.96 Rev.1.01.10 2 - 248 TC200G SERIES DATA SHEET FD1 CELL NAME FD1 FUNCTION D-TYPE FLIP FLOP 7 LOGIC SYMBOL TRUTH TABLE INPUT D CP L Up H Up X Dn FD1 DD CP CK QQ QNQN FD1 CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. Qn+1 L H Qn OUTPUT QNn+1 H L QNn Verilog-HDL DESCRIPTION FD1 inst(Q,QN,D,CP); VHDL DESCRIPTION inst:FD1 port map(Q,QN,D,CP); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP (LU) LOAD 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 42.5 QN 44.6 Rev.1.01.10 2 - 249 TC200G SERIES DATA SHEET FD1 FD1 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1002 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.60 0.77 0.54 0.68 0.85 0.61 0.75 0.92 0.74 0.88 1.05 30.00 1.45 1.53 1.61 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0419 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.67 0.80 0.62 0.75 0.88 0.70 0.82 0.95 0.82 0.94 1.07 30.00 1.30 1.37 1.45 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0963 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.81 0.97 0.75 0.88 1.05 0.82 0.96 1.12 0.94 1.08 1.24 30.00 1.63 1.71 1.78 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0395 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.70 0.82 0.66 0.78 0.90 0.74 0.85 0.98 0.87 0.98 1.11 30.00 1.29 1.37 1.44 1.57 Rev.1.01.10 2 - 250 TC200G SERIES DATA SHEET FD1 FD1 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.352 0.334 0.38 0.388 0.370 1.00 0.448 0.429 3.00 0.641 0.620 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.305 0.339 0.397 0.584 3.00 0.209 0.241 0.295 0.468 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.291 0.323 0.38 0.257 0.289 1.00 0.200 0.232 3.00 0.016 0.048 1.00 0.377 0.343 0.286 0.102 3.00 0.551 0.517 0.460 0.276 CONDITION --WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.305 0.322 0.38 0.269 0.287 1.00 0.209 0.228 3.00 0.016 0.038 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.368 0.336 0.38 0.402 0.369 1.00 0.458 0.426 3.00 0.641 0.609 1.00 0.282 0.315 0.372 0.555 3.00 0.107 0.141 0.198 0.382 1.00 0.352 0.318 0.260 0.074 3.00 0.447 0.416 0.362 0.190 Rev.1.01.10 2 - 251 TC200G SERIES DATA SHEET FD1 FD1 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION --WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.740 Rev.1.01.10 2 - 252 TC200G SERIES DATA SHEET FD1P CELL NAME FD1P FUNCTION D-TYPE FLIP FLOP 8 LOGIC SYMBOL TRUTH TABLE INPUT D CP L Up H Up X Dn FD1P DD CP CK QQ QNQN FD1P CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. Qn+1 L H Qn OUTPUT QNn+1 H L QNn Verilog-HDL DESCRIPTION FD1P inst(Q,QN,D,CP); VHDL DESCRIPTION inst:FD1P port map(Q,QN,D,CP); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,CP (LU) LOAD 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 86.5 QN 97.7 Rev.1.01.10 2 - 253 TC200G SERIES DATA SHEET FD1P FD1P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0494 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.54 0.63 0.54 0.62 0.71 0.62 0.70 0.79 0.75 0.83 0.92 30.00 0.97 1.05 1.13 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0207 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.64 0.71 0.64 0.71 0.79 0.71 0.79 0.86 0.84 0.91 0.99 30.00 0.98 1.05 1.13 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0442 0.07 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.80 0.88 0.81 0.88 0.96 0.88 0.95 1.03 1.00 1.07 1.15 30.00 1.19 1.27 1.34 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.10 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.69 0.76 0.71 0.77 0.84 0.78 0.85 0.92 0.91 0.98 1.05 30.00 0.99 1.07 1.15 1.28 Rev.1.01.10 2 - 254 TC200G SERIES DATA SHEET FD1P FD1P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.352 0.334 0.38 0.388 0.370 1.00 0.448 0.429 3.00 0.641 0.620 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.305 0.339 0.397 0.584 3.00 0.209 0.241 0.295 0.468 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.291 0.323 0.38 0.257 0.289 1.00 0.200 0.232 3.00 0.016 0.048 1.00 0.377 0.343 0.286 0.102 3.00 0.551 0.517 0.460 0.276 CONDITION --WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.305 0.322 0.38 0.269 0.287 1.00 0.209 0.228 3.00 0.016 0.038 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.368 0.336 0.38 0.402 0.369 1.00 0.458 0.426 3.00 0.641 0.609 1.00 0.282 0.315 0.372 0.555 3.00 0.107 0.141 0.198 0.382 1.00 0.352 0.318 0.260 0.074 3.00 0.447 0.416 0.362 0.190 Rev.1.01.10 2 - 255 TC200G SERIES DATA SHEET FD1P FD1P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION --WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.740 Rev.1.01.10 2 - 256 TC200G SERIES DATA SHEET FD1SF CELL NAME FD1SF FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock TRUTH TABLE INPUT D SI A B X XXL X L HH X HHH L XLH H XLH X XLH FD1SF CELL COUNT GATE 11 I/O 0 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD1SF DD CPCP SI SI AA BB SO SO QN QN QQ CP X L L Up Up Dn Qn+1 X L H L H Qn OUTPUT QNn+1 SOn+1 X SOn H L L H H L L H QNn Qn Verilog-HDL DESCRIPTION FD1SF inst(Q,QN,SO,D,CP,SI,A,B); VHDL DESCRIPTION inst:FD1SF port map(Q,QN,SO,D,CP,SI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP SI A B (LU) LOAD 0.99 0.82 2.31 2.15 OUTPUT DRIVE PIN NAME DRIVE Q 42.4 QN 43.5 (LU) SO 43.8 Rev.1.01.10 2 - 257 TC200G SERIES DATA SHEET FD1SF FD1SF 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.65 0.82 0.54 0.68 0.84 0.61 0.75 0.91 0.79 0.92 1.09 30.00 1.48 1.51 1.58 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.70 0.82 0.63 0.73 0.85 0.69 0.80 0.92 0.83 0.94 1.06 30.00 1.28 1.32 1.38 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.56 0.72 0.51 0.65 0.81 0.64 0.78 0.94 0.77 0.91 1.07 30.00 1.39 1.48 1.60 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.55 0.67 0.53 0.63 0.75 0.63 0.74 0.85 0.81 0.91 1.03 30.00 1.13 1.22 1.32 1.49 Rev.1.01.10 2 - 258 TC200G SERIES DATA SHEET FD1SF FD1SF 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1003 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.58 0.76 0.53 0.67 0.85 0.66 0.81 0.98 0.79 0.94 1.11 30.00 1.44 1.53 1.67 1.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.60 0.73 0.55 0.68 0.81 0.66 0.78 0.92 0.83 0.96 1.09 30.00 1.23 1.31 1.41 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0964 0.11 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.74 0.90 0.68 0.82 0.99 0.79 0.93 1.09 0.96 1.10 1.27 30.00 1.57 1.65 1.75 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0402 0.20 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.67 0.80 0.65 0.76 0.89 0.78 0.90 1.02 0.92 1.03 1.15 30.00 1.27 1.36 1.49 1.62 Rev.1.01.10 2 - 259 TC200G SERIES DATA SHEET FD1SF FD1SF 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.44 0.61 0.41 0.54 0.70 0.51 0.65 0.81 0.63 0.77 0.93 30.00 1.26 1.35 1.46 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.41 0.53 0.37 0.47 0.59 0.43 0.54 0.66 0.53 0.65 0.77 30.00 0.99 1.06 1.13 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1003 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.62 0.80 0.56 0.70 0.88 0.63 0.78 0.95 0.77 0.92 1.09 30.00 1.49 1.56 1.64 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.67 0.81 0.63 0.75 0.88 0.70 0.82 0.96 0.83 0.95 1.09 30.00 1.30 1.38 1.45 1.58 Rev.1.01.10 2 - 260 TC200G SERIES DATA SHEET FD1SF FD1SF 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0964 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.93 1.11 0.84 1.00 1.19 0.91 1.08 1.26 1.04 1.20 1.39 30.00 1.79 1.87 1.94 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0402 0.20 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.90 1.05 0.82 0.97 1.12 0.90 1.05 1.20 1.04 1.19 1.34 30.00 1.57 1.64 1.72 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.03 1.16 1.32 1.10 1.24 1.40 1.18 1.31 1.48 1.32 1.45 1.62 30.00 1.99 2.06 2.14 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.09 1.19 1.31 1.17 1.27 1.39 1.24 1.34 1.46 1.37 1.47 1.59 30.00 1.78 1.85 1.93 2.06 Rev.1.01.10 2 - 261 TC200G SERIES DATA SHEET FD1SF FD1SF 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1003 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.55 0.72 0.44 0.58 0.76 0.51 0.65 0.83 0.63 0.77 0.95 30.00 1.41 1.44 1.51 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.58 0.71 0.46 0.58 0.71 0.51 0.63 0.77 0.63 0.76 0.90 30.00 1.21 1.21 1.26 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0964 0.11 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.72 0.89 0.58 0.72 0.89 0.64 0.77 0.94 0.77 0.91 1.08 30.00 1.55 1.55 1.60 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0402 0.20 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.64 0.76 0.56 0.68 0.80 0.63 0.75 0.87 0.76 0.88 1.00 30.00 1.23 1.27 1.34 1.47 Rev.1.01.10 2 - 262 TC200G SERIES DATA SHEET FD1SF FD1SF 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.48 0.64 0.38 0.52 0.68 0.43 0.57 0.73 0.52 0.66 0.83 30.00 1.31 1.35 1.39 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.47 0.59 0.38 0.48 0.60 0.43 0.53 0.65 0.53 0.64 0.76 30.00 1.06 1.07 1.12 1.23 Rev.1.01.10 2 - 263 TC200G SERIES DATA SHEET FD1SF FD1SF 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION ~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.331 0.313 0.38 0.368 0.350 1.00 0.432 0.413 3.00 0.636 0.614 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.284 0.320 0.381 0.578 3.00 0.190 0.223 0.279 0.460 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.291 0.326 0.38 0.257 0.291 1.00 0.199 0.234 3.00 0.014 0.048 1.00 0.384 0.349 0.291 0.103 3.00 0.572 0.537 0.477 0.284 CONDITION ~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.324 0.341 0.38 0.286 0.304 1.00 0.223 0.242 3.00 0.021 0.042 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.332 0.38 0.401 0.366 1.00 0.457 0.423 3.00 0.641 0.608 1.00 0.273 0.308 0.366 0.552 3.00 0.085 0.121 0.180 0.372 1.00 0.370 0.334 0.274 0.079 3.00 0.464 0.431 0.375 0.196 Rev.1.01.10 2 - 264 TC200G SERIES DATA SHEET FD1SF FD1SF 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION ~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.370 0.375 0.38 0.403 0.414 1.00 0.458 0.480 3.00 0.638 0.692 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.385 0.434 0.516 0.782 3.00 0.416 0.497 0.634 1.073 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.189 0.150 0.38 0.166 0.122 1.00 0.127 0.075 3.00 0.000 -0.075 1.00 0.083 0.048 -0.010 -0.200 3.00 -0.130 -0.189 -0.287 -0.605 CONDITION ~CP WAVE_FORM SI A SI A HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.288 0.282 0.38 0.254 0.242 1.00 0.199 0.177 3.00 0.018 -0.035 SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.468 0.507 0.38 0.493 0.536 1.00 0.534 0.585 3.00 0.667 0.740 1.00 0.573 0.609 0.669 0.863 3.00 0.784 0.843 0.942 1.260 1.00 0.271 0.222 0.140 -0.126 3.00 0.238 0.157 0.021 -0.417 Rev.1.01.10 2 - 265 TC200G SERIES DATA SHEET FD1SF FD1SF 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION --WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SI tw(H) B SO POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION --WAVE_FORM SI tw(H) A Q MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 266 TC200G SERIES DATA SHEET FD1SFP CELL NAME FD1SFP FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock TRUTH TABLE INPUT D SI A B X XXL X L HH X HHH L XLH H XLH X XLH FD1SFP CELL COUNT GATE 12 I/O 0 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD1SFP DD CPCP SI SI AA BB SO SO QN QN QQ CP X L L Up Up Dn Qn+1 X L H L H Qn OUTPUT QNn+1 SOn+1 X SOn H L L H H L L H QNn Qn Verilog-HDL DESCRIPTION FD1SFP inst(Q,QN,SO,D,CP,SI,A,B); VHDL DESCRIPTION inst:FD1SFP port map(Q,QN,SO,D,CP,SI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D CP SI A B (LU) LOAD 0.99 1.00 0.82 2.16 2.23 OUTPUT DRIVE PIN NAME DRIVE Q 82.3 QN 75.6 (LU) SO 43.7 Rev.1.01.10 2 - 267 TC200G SERIES DATA SHEET FD1SFP FD1SFP 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.65 0.82 0.55 0.68 0.85 0.62 0.75 0.92 0.80 0.93 1.10 30.00 1.48 1.51 1.58 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.72 0.84 0.64 0.75 0.87 0.71 0.81 0.93 0.85 0.96 1.08 30.00 1.30 1.33 1.40 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.56 0.73 0.52 0.65 0.82 0.65 0.78 0.95 0.79 0.92 1.09 30.00 1.39 1.48 1.61 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.55 0.67 0.53 0.64 0.76 0.64 0.74 0.86 0.82 0.92 1.04 30.00 1.14 1.22 1.33 1.50 Rev.1.01.10 2 - 268 TC200G SERIES DATA SHEET FD1SFP FD1SFP 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0512 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.54 0.63 0.55 0.63 0.72 0.68 0.76 0.86 0.82 0.90 1.00 30.00 0.98 1.07 1.20 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0216 0.13 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.57 0.65 0.58 0.66 0.73 0.69 0.76 0.84 0.86 0.94 1.02 30.00 0.92 1.00 1.11 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0547 0.08 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.75 0.85 0.75 0.83 0.93 0.86 0.94 1.04 1.04 1.12 1.22 30.00 1.22 1.30 1.41 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0244 0.19 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.71 0.79 0.72 0.80 0.88 0.86 0.94 1.02 1.00 1.08 1.16 30.00 1.08 1.17 1.31 1.45 Rev.1.01.10 2 - 269 TC200G SERIES DATA SHEET FD1SFP FD1SFP 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.45 0.61 0.41 0.54 0.70 0.52 0.65 0.81 0.64 0.77 0.93 30.00 1.25 1.35 1.46 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.40 0.52 0.37 0.47 0.59 0.43 0.54 0.66 0.53 0.64 0.77 30.00 0.99 1.06 1.12 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0512 0.13 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.57 0.67 0.57 0.65 0.74 0.65 0.73 0.82 0.79 0.87 0.96 30.00 1.02 1.10 1.18 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0216 0.13 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.64 0.72 0.64 0.72 0.80 0.72 0.79 0.87 0.85 0.92 1.00 30.00 0.99 1.07 1.14 1.27 Rev.1.01.10 2 - 270 TC200G SERIES DATA SHEET FD1SFP FD1SFP 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0547 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.92 1.03 0.90 1.00 1.11 0.97 1.07 1.18 1.10 1.20 1.31 30.00 1.43 1.51 1.58 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0244 0.19 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.80 0.91 1.01 0.88 0.98 1.09 0.96 1.06 1.16 1.09 1.20 1.30 30.00 1.34 1.42 1.50 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.15 1.28 1.45 1.22 1.36 1.52 1.30 1.43 1.60 1.44 1.57 1.74 30.00 2.11 2.18 2.26 2.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.20 1.30 1.42 1.27 1.38 1.50 1.35 1.45 1.57 1.47 1.58 1.70 30.00 1.89 1.96 2.04 2.16 Rev.1.01.10 2 - 271 TC200G SERIES DATA SHEET FD1SFP FD1SFP 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0512 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.50 0.59 0.46 0.54 0.63 0.53 0.61 0.70 0.67 0.75 0.84 30.00 0.94 0.98 1.05 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0216 0.13 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.55 0.63 0.48 0.55 0.63 0.53 0.60 0.68 0.67 0.75 0.83 30.00 0.90 0.90 0.95 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0547 0.08 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.73 0.83 0.65 0.73 0.83 0.70 0.78 0.88 0.86 0.94 1.04 30.00 1.20 1.20 1.25 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0244 0.19 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.67 0.76 0.63 0.71 0.79 0.71 0.79 0.87 0.86 0.94 1.02 30.00 1.04 1.08 1.16 1.31 Rev.1.01.10 2 - 272 TC200G SERIES DATA SHEET FD1SFP FD1SFP 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0966 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.48 0.65 0.39 0.52 0.68 0.44 0.57 0.73 0.53 0.66 0.83 30.00 1.31 1.35 1.40 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.48 0.60 0.38 0.48 0.60 0.43 0.53 0.65 0.54 0.64 0.76 30.00 1.06 1.07 1.12 1.23 Rev.1.01.10 2 - 273 TC200G SERIES DATA SHEET FD1SFP FD1SFP 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION ~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.331 0.313 0.38 0.368 0.350 1.00 0.432 0.413 3.00 0.636 0.614 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.284 0.320 0.381 0.578 3.00 0.190 0.223 0.279 0.460 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.291 0.326 0.38 0.257 0.291 1.00 0.199 0.234 3.00 0.014 0.048 1.00 0.384 0.349 0.291 0.103 3.00 0.572 0.537 0.477 0.284 CONDITION ~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.324 0.341 0.38 0.286 0.304 1.00 0.223 0.242 3.00 0.021 0.042 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.332 0.38 0.401 0.366 1.00 0.457 0.423 3.00 0.641 0.608 1.00 0.273 0.308 0.366 0.552 3.00 0.085 0.121 0.180 0.372 1.00 0.370 0.334 0.274 0.079 3.00 0.464 0.431 0.375 0.196 Rev.1.01.10 2 - 274 TC200G SERIES DATA SHEET FD1SFP FD1SFP 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION ~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.370 0.375 0.38 0.403 0.414 1.00 0.458 0.480 3.00 0.638 0.692 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.385 0.434 0.516 0.782 3.00 0.416 0.497 0.634 1.073 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.189 0.150 0.38 0.166 0.122 1.00 0.127 0.075 3.00 0.000 -0.075 1.00 0.083 0.048 -0.010 -0.200 3.00 -0.130 -0.189 -0.287 -0.605 CONDITION ~CP WAVE_FORM SI A SI A HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.288 0.282 0.38 0.254 0.242 1.00 0.199 0.177 3.00 0.018 -0.035 SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.468 0.507 0.38 0.493 0.536 1.00 0.534 0.585 3.00 0.667 0.740 1.00 0.573 0.609 0.669 0.863 3.00 0.784 0.843 0.942 1.260 1.00 0.271 0.222 0.140 -0.126 3.00 0.238 0.157 0.021 -0.417 Rev.1.01.10 2 - 275 TC200G SERIES DATA SHEET FD1SFP FD1SFP 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION --WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SI tw(H) B SO POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION --WAVE_FORM SI tw(H) A Q MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 276 TC200G SERIES DATA SHEET FD1S CELL NAME FD1S FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock FD1S CELL COUNT GATE 9 I/O 0 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD1S DD CPCK TI TI TETE QQ QNQN TRUTH TABLE INPUT D TI TE L X L H X L X L H X H H X X X CP Up Up Up Up Dn OUTPUT Qn+1 QNn+1 L H H L L H H L Qn QNn Verilog-HDL DESCRIPTION FD1S inst(Q,QN,D,CP,TI,TE); VHDL DESCRIPTION inst:FD1S port map(Q,QN,D,CP,TI,TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP,TI TE (LU) LOAD 0.99 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 42.5 QN 44.6 Rev.1.01.10 2 - 277 TC200G SERIES DATA SHEET FD1S FD1S 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1003 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.63 0.80 0.56 0.70 0.88 0.64 0.78 0.96 0.78 0.93 1.10 30.00 1.49 1.56 1.64 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0421 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.68 0.81 0.63 0.76 0.89 0.71 0.83 0.97 0.85 0.97 1.10 30.00 1.31 1.38 1.46 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0964 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.81 0.98 0.75 0.89 1.06 0.83 0.97 1.13 0.97 1.10 1.27 30.00 1.64 1.72 1.79 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0395 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.71 0.83 0.67 0.78 0.91 0.75 0.86 0.99 0.90 1.01 1.13 30.00 1.30 1.38 1.46 1.60 Rev.1.01.10 2 - 278 TC200G SERIES DATA SHEET FD1S FD1S 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION ~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.408 0.390 0.38 0.453 0.434 1.00 0.528 0.508 3.00 0.770 0.747 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.359 0.403 0.475 0.708 3.00 0.260 0.300 0.367 0.583 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.121 0.154 0.38 0.082 0.116 1.00 0.018 0.051 3.00 -0.190 -0.159 1.00 0.210 0.171 0.105 -0.107 3.00 0.390 0.350 0.281 0.061 CONDITION ~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.242 0.260 0.38 0.197 0.216 1.00 0.122 0.142 3.00 -0.120 -0.097 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.536 0.503 0.38 0.575 0.542 1.00 0.639 0.606 3.00 0.847 0.815 1.00 0.447 0.486 0.552 0.763 3.00 0.266 0.307 0.375 0.595 1.00 0.291 0.247 0.175 -0.058 3.00 0.390 0.350 0.283 0.067 Rev.1.01.10 2 - 279 TC200G SERIES DATA SHEET FD1S FD1S 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION (~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.449 0.431 0.38 0.500 0.482 1.00 0.586 0.567 3.00 0.864 0.842 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.400 0.450 0.534 0.804 3.00 0.302 0.349 0.428 0.683 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.208 0.226 0.38 0.157 0.175 1.00 0.070 0.090 3.00 -0.208 -0.186 1.00 0.256 0.206 0.122 -0.148 3.00 0.353 0.306 0.227 -0.026 CONDITION TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.008 0.023 0.38 -0.031 -0.000 1.00 -0.069 -0.038 3.00 -0.190 -0.162 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.483 0.465 0.38 0.522 0.504 1.00 0.588 0.568 3.00 0.799 0.778 1.00 0.435 0.473 0.536 0.741 3.00 0.337 0.373 0.432 0.624 1.00 0.075 0.052 0.012 -0.115 3.00 0.244 0.218 0.175 0.037 Rev.1.01.10 2 - 280 TC200G SERIES DATA SHEET FD1S FD1S 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.665 0.634 0.38 0.688 0.657 1.00 0.725 0.695 3.00 0.847 0.818 1.00 0.582 0.605 0.645 0.771 3.00 0.414 0.439 0.481 0.618 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.171 0.190 0.38 0.132 0.151 1.00 0.067 0.086 3.00 -0.144 -0.122 1.00 0.220 0.182 0.119 -0.086 3.00 0.319 0.284 0.224 0.032 Rev.1.01.10 2 - 281 TC200G SERIES DATA SHEET FD1S FD1S 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION --WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 Rev.1.01.10 2 - 282 TC200G SERIES DATA SHEET FD1SP CELL NAME FD1SP FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock FD1SP CELL COUNT GATE 10 I/O 0 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD1SP DD CPCK TI TI TETE QQ QNQN TRUTH TABLE INPUT D TI TE L X L H X L X L H X H H X X X CP Up Up Up Up Dn OUTPUT Qn+1 QNn+1 L H H L L H H L Qn QNn Verilog-HDL DESCRIPTION FD1SP inst(Q,QN,D,CP,TI,TE); VHDL DESCRIPTION inst:FD1SP port map(Q,QN,D,CP,TI,TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,CP,TI TE (LU) LOAD 0.99 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 77.0 QN 97.7 Rev.1.01.10 2 - 283 TC200G SERIES DATA SHEET FD1SP FD1SP 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0548 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.57 0.66 0.56 0.64 0.74 0.64 0.73 0.82 0.79 0.87 0.97 30.00 1.04 1.11 1.19 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0238 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.65 0.73 0.65 0.73 0.81 0.72 0.80 0.89 0.86 0.94 1.02 30.00 1.03 1.10 1.18 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0443 0.07 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.80 0.88 0.81 0.88 0.96 0.89 0.96 1.04 1.02 1.09 1.17 30.00 1.19 1.27 1.35 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.10 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.71 0.78 0.72 0.79 0.86 0.80 0.87 0.94 0.95 1.01 1.08 30.00 1.01 1.09 1.17 1.31 Rev.1.01.10 2 - 284 TC200G SERIES DATA SHEET FD1SP FD1SP 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION ~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.408 0.390 0.38 0.453 0.434 1.00 0.528 0.508 3.00 0.770 0.747 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.359 0.403 0.475 0.708 3.00 0.260 0.300 0.367 0.583 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.121 0.154 0.38 0.082 0.116 1.00 0.018 0.051 3.00 -0.190 -0.159 1.00 0.210 0.171 0.105 -0.107 3.00 0.390 0.350 0.281 0.061 CONDITION ~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.242 0.260 0.38 0.197 0.216 1.00 0.122 0.142 3.00 -0.120 -0.097 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.536 0.503 0.38 0.575 0.542 1.00 0.639 0.606 3.00 0.847 0.815 1.00 0.447 0.486 0.552 0.763 3.00 0.266 0.307 0.375 0.595 1.00 0.291 0.247 0.175 -0.058 3.00 0.390 0.350 0.283 0.067 Rev.1.01.10 2 - 285 TC200G SERIES DATA SHEET FD1SP FD1SP 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION (~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.449 0.431 0.38 0.500 0.482 1.00 0.586 0.567 3.00 0.864 0.842 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.400 0.450 0.534 0.804 3.00 0.302 0.349 0.428 0.683 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.208 0.226 0.38 0.157 0.175 1.00 0.070 0.090 3.00 -0.208 -0.186 1.00 0.256 0.206 0.122 -0.148 3.00 0.353 0.306 0.227 -0.026 CONDITION TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.008 0.023 0.38 -0.031 -0.000 1.00 -0.069 -0.038 3.00 -0.190 -0.162 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.483 0.465 0.38 0.522 0.504 1.00 0.588 0.568 3.00 0.799 0.778 1.00 0.435 0.473 0.536 0.741 3.00 0.337 0.373 0.432 0.624 1.00 0.075 0.052 0.012 -0.115 3.00 0.244 0.218 0.175 0.037 Rev.1.01.10 2 - 286 TC200G SERIES DATA SHEET FD1SP FD1SP 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.665 0.634 0.38 0.688 0.657 1.00 0.725 0.695 3.00 0.847 0.818 1.00 0.582 0.605 0.645 0.771 3.00 0.414 0.439 0.481 0.618 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.171 0.190 0.38 0.132 0.151 1.00 0.067 0.086 3.00 -0.144 -0.122 1.00 0.220 0.182 0.119 -0.086 3.00 0.319 0.284 0.224 0.032 Rev.1.01.10 2 - 287 TC200G SERIES DATA SHEET FD1SP FD1SP 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION --WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 Rev.1.01.10 2 - 288 TC200G SERIES DATA SHEET FD2 CELL NAME FD2 FUNCTION D-TYPE FLIP FLOP with CLEAR 8 LOGIC SYMBOL 0 FD2 CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. FD2 DD CP CK CL CD QQ QNQN TRUTH TABLE INPUT OUTPUT CD D CP Qn+1 QNn+1 L X X* L H H L Up L H H H Up H L H X Dn Qn QNn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FD2 inst(Q,QN,D,CP,CD); VHDL DESCRIPTION inst:FD2 port map(Q,QN,D,CP,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D CP CD (LU) LOAD 0.99 1.00 2.12 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 42.6 QN 51.2 Rev.1.01.10 2 - 289 TC200G SERIES DATA SHEET FD2 FD2 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0416 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.40 0.53 0.29 0.42 0.56 0.35 0.49 0.62 0.49 0.64 0.78 30.00 1.02 1.05 1.12 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0846 0.09 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.58 0.73 0.47 0.60 0.76 0.54 0.67 0.83 0.70 0.83 0.98 30.00 1.32 1.35 1.42 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0988 0.15 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.72 0.91 0.64 0.80 0.99 0.72 0.88 1.07 0.87 1.03 1.22 30.00 1.61 1.68 1.76 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0416 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.74 0.88 0.69 0.82 0.95 0.77 0.90 1.03 0.91 1.04 1.17 30.00 1.37 1.45 1.53 1.67 Rev.1.01.10 2 - 290 TC200G SERIES DATA SHEET FD2 FD2 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0846 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.85 1.00 0.81 0.93 1.08 0.88 1.01 1.16 1.03 1.15 1.30 30.00 1.60 1.67 1.75 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0341 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.79 0.90 0.76 0.87 0.98 0.84 0.95 1.06 0.99 1.10 1.21 30.00 1.31 1.39 1.47 1.62 Rev.1.01.10 2 - 291 TC200G SERIES DATA SHEET FD2 FD2 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.020 -0.060 0.38 -0.025 -0.065 1.00 -0.034 -0.074 3.00 -0.062 -0.101 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.127 -0.132 -0.140 -0.166 3.00 -0.342 -0.347 -0.354 -0.378 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.677 0.717 0.38 0.682 0.722 1.00 0.690 0.730 3.00 0.718 0.757 CONDITION D WAVE_FORM 1.00 0.783 0.788 0.796 0.822 3.00 0.999 1.003 1.010 1.034 Rev.1.01.10 2 - 292 TC200G SERIES DATA SHEET FD2 FD2 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.336 0.38 0.406 0.375 1.00 0.472 0.441 3.00 0.682 0.652 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.284 0.323 0.389 0.601 3.00 0.116 0.155 0.222 0.436 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.295 0.326 0.38 0.262 0.293 1.00 0.206 0.237 3.00 0.026 0.058 1.00 0.377 0.344 0.289 0.111 3.00 0.543 0.511 0.457 0.284 CONDITION CD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.290 0.321 0.38 0.251 0.282 1.00 0.185 0.216 3.00 -0.027 0.004 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.359 0.329 0.38 0.393 0.362 1.00 0.449 0.418 3.00 0.629 0.598 1.00 0.278 0.311 0.366 0.544 3.00 0.115 0.146 0.200 0.372 1.00 0.373 0.334 0.268 0.055 3.00 0.542 0.502 0.435 0.219 Rev.1.01.10 2 - 293 TC200G SERIES DATA SHEET FD2 FD2 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM 0.01 to 3.00 0.710 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 Rev.1.01.10 2 - 294 TC200G SERIES DATA SHEET FD2P CELL NAME FD2P FUNCTION D-TYPE FLIP FLOP with CLEAR 9 LOGIC SYMBOL 0 FD2P CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. FD2P DD CP CK CL CD QQ QNQN TRUTH TABLE INPUT OUTPUT CD D CP Qn+1 QNn+1 L X X* L H H L Up L H H H Up H L H X Dn Qn QNn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FD2P inst(Q,QN,D,CP,CD); VHDL DESCRIPTION inst:FD2P port map(Q,QN,D,CP,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D CP CD (LU) LOAD 0.99 1.00 2.12 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 83.0 QN 97.9 Rev.1.01.10 2 - 295 TC200G SERIES DATA SHEET FD2P FD2P 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0182 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.32 0.39 0.27 0.34 0.42 0.34 0.41 0.49 0.48 0.57 0.65 30.00 0.63 0.66 0.73 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0444 0.07 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.55 0.63 0.50 0.58 0.66 0.58 0.65 0.73 0.76 0.83 0.91 30.00 0.95 0.97 1.05 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0546 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.65 0.75 0.64 0.73 0.83 0.72 0.81 0.91 0.87 0.96 1.06 30.00 1.13 1.21 1.29 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0182 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.68 0.75 0.69 0.76 0.83 0.76 0.84 0.91 0.91 0.98 1.05 30.00 0.99 1.07 1.15 1.29 Rev.1.01.10 2 - 296 TC200G SERIES DATA SHEET FD2P FD2P 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0444 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.78 0.85 0.93 0.85 0.92 1.00 0.93 1.00 1.08 1.07 1.14 1.22 30.00 1.24 1.31 1.39 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0178 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.80 0.86 0.81 0.87 0.94 0.89 0.96 1.02 1.04 1.11 1.17 30.00 1.09 1.17 1.25 1.41 Rev.1.01.10 2 - 297 TC200G SERIES DATA SHEET FD2P FD2P 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.020 -0.060 0.38 -0.025 -0.065 1.00 -0.034 -0.074 3.00 -0.062 -0.101 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.127 -0.132 -0.140 -0.166 3.00 -0.342 -0.347 -0.354 -0.378 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.677 0.717 0.38 0.682 0.722 1.00 0.690 0.730 3.00 0.718 0.757 CONDITION D WAVE_FORM 1.00 0.783 0.788 0.796 0.822 3.00 0.999 1.003 1.010 1.034 Rev.1.01.10 2 - 298 TC200G SERIES DATA SHEET FD2P FD2P 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.336 0.38 0.406 0.375 1.00 0.472 0.441 3.00 0.682 0.652 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.284 0.323 0.389 0.601 3.00 0.116 0.155 0.222 0.436 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.295 0.326 0.38 0.262 0.293 1.00 0.206 0.237 3.00 0.026 0.058 1.00 0.377 0.344 0.289 0.111 3.00 0.543 0.511 0.457 0.284 CONDITION CD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.290 0.321 0.38 0.251 0.282 1.00 0.185 0.216 3.00 -0.027 0.004 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.359 0.329 0.38 0.393 0.362 1.00 0.449 0.418 3.00 0.629 0.598 1.00 0.278 0.311 0.366 0.544 3.00 0.115 0.146 0.200 0.372 1.00 0.373 0.334 0.268 0.055 3.00 0.542 0.502 0.435 0.219 Rev.1.01.10 2 - 299 TC200G SERIES DATA SHEET FD2P FD2P 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM 0.01 to 3.00 0.710 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 Rev.1.01.10 2 - 300 TC200G SERIES DATA SHEET FD2SF CELL NAME FD2SF FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock with CLEAR FD2SF CELL COUNT GATE 12 I/O 0 1/13 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD2SF DD CPCP SI SI AA BB SO SO CD CD QN QN QQ TRUTH TABLE INPUT OUTPUT CD D SI A B CP Qn+1 QNn+1 SOn+1 XXXXL X X X SOn L X X L H X* L H L H X L HH L L H L H XH HH L H L H H L X L H Up L H L H H X L H Up H L H H X X L H Dn Qn QNn Qn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FD2SF inst(Q,QN,SO,D,CP,CD,SI,A,B); VHDL DESCRIPTION inst:FD2SF port map(Q,QN,SO,D,CP,CD,SI, A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D CP CD SI A B (LU) LOAD 1.02 0.99 2.18 0.85 2.20 2.24 OUTPUT DRIVE PIN NAME DRIVE Q 42.5 QN 44.5 (LU) SO 43.7 Rev.1.01.10 2 - 301 TC200G SERIES DATA SHEET FD2SF FD2SF 2/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.82 0.55 0.68 0.85 0.62 0.75 0.92 0.79 0.93 1.09 30.00 1.48 1.51 1.58 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.69 0.80 0.61 0.72 0.84 0.68 0.78 0.90 0.82 0.92 1.04 30.00 1.27 1.30 1.37 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.56 0.73 0.52 0.65 0.82 0.65 0.78 0.95 0.78 0.92 1.08 30.00 1.39 1.48 1.61 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.55 0.67 0.53 0.64 0.76 0.64 0.74 0.86 0.82 0.92 1.04 30.00 1.14 1.22 1.33 1.51 Rev.1.01.10 2 - 302 TC200G SERIES DATA SHEET FD2SF FD2SF 3/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1000 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.66 0.84 0.59 0.75 0.93 0.72 0.88 1.07 0.86 1.02 1.20 30.00 1.54 1.63 1.76 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0406 0.12 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.65 0.78 0.61 0.74 0.86 0.71 0.84 0.97 0.88 1.01 1.14 30.00 1.26 1.34 1.44 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0940 0.09 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.78 0.94 0.73 0.86 1.03 0.83 0.97 1.13 1.01 1.14 1.30 30.00 1.58 1.67 1.77 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0401 0.19 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.74 0.86 0.72 0.83 0.95 0.85 0.96 1.09 0.99 1.10 1.22 30.00 1.32 1.41 1.55 1.68 Rev.1.01.10 2 - 303 TC200G SERIES DATA SHEET FD2SF FD2SF 4/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.45 0.61 0.41 0.54 0.70 0.52 0.65 0.81 0.63 0.77 0.93 30.00 1.26 1.35 1.46 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.40 0.52 0.37 0.47 0.59 0.43 0.53 0.66 0.53 0.64 0.77 30.00 0.98 1.05 1.12 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0406 0.12 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.36 0.50 0.26 0.39 0.53 0.31 0.44 0.58 0.40 0.55 0.69 30.00 0.98 1.00 1.06 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0940 0.09 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.62 0.81 0.48 0.65 0.84 0.54 0.71 0.90 0.67 0.84 1.03 30.00 1.49 1.52 1.58 1.70 Rev.1.01.10 2 - 304 TC200G SERIES DATA SHEET FD2SF FD2SF 5/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.96 1.08 0.89 0.99 1.11 0.95 1.05 1.17 1.07 1.17 1.29 30.00 1.55 1.58 1.64 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1000 0.19 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.72 0.91 0.63 0.80 0.99 0.71 0.88 1.07 0.85 1.02 1.21 30.00 1.62 1.70 1.78 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0406 0.12 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.74 0.88 0.69 0.82 0.95 0.76 0.90 1.03 0.90 1.03 1.17 30.00 1.35 1.43 1.51 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0940 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.98 1.15 0.90 1.06 1.23 0.97 1.13 1.31 1.11 1.27 1.44 30.00 1.82 1.90 1.97 2.11 Rev.1.01.10 2 - 305 TC200G SERIES DATA SHEET FD2SF FD2SF 6/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0401 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.98 1.13 0.91 1.06 1.21 0.99 1.14 1.29 1.13 1.28 1.43 30.00 1.64 1.72 1.80 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.11 1.24 1.41 1.19 1.32 1.49 1.27 1.40 1.57 1.41 1.55 1.71 30.00 2.07 2.15 2.23 2.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.13 1.24 1.36 1.21 1.31 1.43 1.29 1.39 1.51 1.42 1.52 1.64 30.00 1.82 1.90 1.98 2.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1000 0.19 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.62 0.81 0.50 0.66 0.84 0.57 0.73 0.92 0.71 0.87 1.06 30.00 1.50 1.54 1.61 1.77 Rev.1.01.10 2 - 306 TC200G SERIES DATA SHEET FD2SF FD2SF 7/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0406 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.63 0.76 0.50 0.63 0.76 0.55 0.68 0.81 0.69 0.83 0.96 30.00 1.23 1.23 1.28 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0940 0.09 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.76 0.92 0.63 0.76 0.92 0.67 0.81 0.97 0.82 0.96 1.12 30.00 1.56 1.56 1.61 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0401 0.19 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.70 0.82 0.63 0.74 0.86 0.70 0.81 0.94 0.84 0.96 1.08 30.00 1.28 1.32 1.40 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.48 0.64 0.38 0.52 0.68 0.43 0.57 0.73 0.52 0.66 0.82 30.00 1.31 1.34 1.39 1.48 Rev.1.01.10 2 - 307 TC200G SERIES DATA SHEET FD2SF FD2SF 8/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.47 0.59 0.38 0.48 0.60 0.42 0.53 0.65 0.53 0.64 0.76 30.00 1.05 1.06 1.11 1.22 Rev.1.01.10 2 - 308 TC200G SERIES DATA SHEET FD2SF FD2SF 9/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.039 -0.076 0.38 -0.044 -0.082 1.00 -0.054 -0.091 3.00 -0.085 -0.122 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.139 -0.145 -0.154 -0.184 3.00 -0.342 -0.348 -0.356 -0.384 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.693 0.731 0.38 0.699 0.736 1.00 0.709 0.746 3.00 0.741 0.778 CONDITION D&~A WAVE_FORM 1.00 0.794 0.800 0.809 0.840 3.00 0.999 1.004 1.013 1.040 Rev.1.01.10 2 - 309 TC200G SERIES DATA SHEET FD2SF FD2SF 10/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.342 0.323 0.38 0.380 0.360 1.00 0.443 0.422 3.00 0.648 0.624 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.290 0.327 0.387 0.583 3.00 0.186 0.219 0.275 0.454 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.283 0.318 0.38 0.250 0.285 1.00 0.194 0.229 3.00 0.014 0.048 1.00 0.377 0.343 0.286 0.103 3.00 0.565 0.530 0.472 0.284 CONDITION CD&~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.312 0.332 0.38 0.274 0.295 1.00 0.212 0.233 3.00 0.009 0.033 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.371 0.336 0.38 0.404 0.369 1.00 0.460 0.426 3.00 0.641 0.608 1.00 0.278 0.312 0.368 0.552 3.00 0.090 0.125 0.183 0.372 1.00 0.365 0.329 0.268 0.073 3.00 0.472 0.438 0.382 0.202 Rev.1.01.10 2 - 310 TC200G SERIES DATA SHEET FD2SF FD2SF CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION CD&~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.386 0.392 0.38 0.422 0.433 1.00 0.483 0.504 3.00 0.679 0.730 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.402 0.453 0.539 0.815 3.00 0.434 0.515 0.651 1.090 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.178 0.139 0.38 0.152 0.109 1.00 0.109 0.060 3.00 -0.029 -0.101 1.00 0.074 0.038 -0.023 -0.221 3.00 -0.134 -0.193 -0.292 -0.610 CONDITION CD&~CP WAVE_FORM SI A SI A CLOCK SLEW (ns) 2 - 311 TC200G SERIES DATA SHEET FD2SF FD2SF 12/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM SI POSLIMIT tw(H) B SO CONDITION CD WAVE_FORM 0.01 to 3.00 0.740 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.720 MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 312 TC200G SERIES DATA SHEET FD2SF FD2SF 13/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM SI POSLIMIT CONDITION CD WAVE_FORM tw(H) A Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 313 TC200G SERIES DATA SHEET FD2SFP CELL NAME FD2SFP FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock with CLEAR FD2SFP CELL COUNT GATE 13 I/O 0 1/13 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD2SFP DD CPCP SI SI AA BB SO SO CD CD QN QN QQ TRUTH TABLE INPUT OUTPUT CD D SI A B CP Qn+1 QNn+1 SOn+1 XXXXL X X X SOn L X X L H X* L H L H X L HH L L H L H XH HH L H L H H L X L H Up L H L H H X L H Up H L H H X X L H Dn Qn QNn Qn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FD2SFP inst(Q,QN,SO,D,CP,CD,SI,A, B); VHDL DESCRIPTION inst:FD2SFP port map(Q,QN,SO,D,CP,CD,SI, A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D CP CD SI A B (LU) LOAD 1.02 0.99 2.18 0.85 2.20 2.15 OUTPUT DRIVE PIN NAME DRIVE Q 77.2 QN 86.0 (LU) SO 43.7 Rev.1.01.10 2 - 314 TC200G SERIES DATA SHEET FD2SFP FD2SFP 2/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.65 0.82 0.54 0.68 0.84 0.61 0.75 0.91 0.79 0.93 1.09 30.00 1.48 1.51 1.58 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.69 0.81 0.62 0.72 0.84 0.68 0.78 0.90 0.82 0.92 1.04 30.00 1.27 1.30 1.37 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.55 0.72 0.51 0.64 0.81 0.64 0.78 0.94 0.78 0.91 1.07 30.00 1.38 1.47 1.60 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.55 0.67 0.53 0.64 0.76 0.64 0.74 0.86 0.82 0.92 1.04 30.00 1.14 1.22 1.32 1.50 Rev.1.01.10 2 - 315 TC200G SERIES DATA SHEET FD2SFP FD2SFP 3/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0545 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.61 0.71 0.61 0.70 0.80 0.75 0.84 0.94 0.89 0.97 1.07 30.00 1.09 1.18 1.32 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0237 0.11 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.58 0.66 0.58 0.66 0.75 0.68 0.76 0.85 0.86 0.94 1.03 30.00 0.96 1.04 1.14 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0479 0.11 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.75 0.84 0.77 0.84 0.92 0.87 0.94 1.03 1.04 1.11 1.20 30.00 1.17 1.25 1.36 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0210 0.21 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.80 0.87 0.82 0.89 0.96 0.96 1.02 1.10 1.09 1.16 1.23 30.00 1.12 1.21 1.35 1.49 Rev.1.01.10 2 - 316 TC200G SERIES DATA SHEET FD2SFP FD2SFP 4/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.44 0.60 0.40 0.54 0.70 0.51 0.64 0.81 0.63 0.76 0.93 30.00 1.25 1.35 1.45 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.40 0.52 0.37 0.47 0.59 0.43 0.54 0.66 0.53 0.64 0.77 30.00 0.99 1.06 1.12 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0237 0.11 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.42 0.28 0.36 0.45 0.35 0.43 0.52 0.49 0.59 0.68 30.00 0.71 0.74 0.81 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0479 0.11 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.64 0.74 0.58 0.67 0.77 0.65 0.74 0.85 0.84 0.93 1.04 30.00 1.11 1.14 1.21 1.40 Rev.1.01.10 2 - 317 TC200G SERIES DATA SHEET FD2SFP FD2SFP 5/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.99 1.09 1.21 1.01 1.12 1.24 1.09 1.19 1.31 1.27 1.37 1.49 30.00 1.68 1.70 1.78 1.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0545 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.63 0.73 0.62 0.71 0.81 0.71 0.79 0.89 0.85 0.94 1.03 30.00 1.11 1.19 1.27 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0237 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.66 0.74 0.66 0.74 0.82 0.73 0.82 0.90 0.87 0.95 1.03 30.00 1.04 1.12 1.19 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0479 0.11 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.84 0.93 1.03 0.92 1.01 1.10 1.00 1.08 1.18 1.13 1.22 1.31 30.00 1.38 1.46 1.54 1.67 Rev.1.01.10 2 - 318 TC200G SERIES DATA SHEET FD2SFP FD2SFP 6/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0210 0.21 PATH DELAY (ns) 1.00 5.00 10.00 0.89 0.99 1.08 0.97 1.06 1.16 1.05 1.15 1.24 1.20 1.29 1.38 30.00 1.37 1.45 1.53 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.22 1.35 1.52 1.30 1.43 1.60 1.38 1.51 1.68 1.52 1.65 1.82 30.00 2.18 2.26 2.34 2.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.20 1.30 1.42 1.27 1.38 1.50 1.35 1.46 1.58 1.48 1.59 1.71 30.00 1.89 1.96 2.04 2.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0545 0.10 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.57 0.67 0.53 0.61 0.71 0.62 0.71 0.81 0.82 0.91 1.01 30.00 1.05 1.09 1.18 1.39 Rev.1.01.10 2 - 319 TC200G SERIES DATA SHEET FD2SFP FD2SFP 7/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0237 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.56 0.64 0.48 0.56 0.64 0.52 0.60 0.69 0.63 0.72 0.81 30.00 0.94 0.94 0.98 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0479 0.11 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.73 0.82 0.66 0.73 0.82 0.71 0.78 0.86 0.84 0.91 1.00 30.00 1.15 1.15 1.19 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0210 0.21 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.76 0.83 0.73 0.80 0.87 0.83 0.90 0.97 1.05 1.12 1.19 30.00 1.09 1.13 1.22 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0967 0.17 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.48 0.64 0.38 0.51 0.68 0.43 0.57 0.73 0.52 0.66 0.82 30.00 1.31 1.34 1.39 1.48 Rev.1.01.10 2 - 320 TC200G SERIES DATA SHEET FD2SFP FD2SFP 8/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0399 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.47 0.59 0.38 0.48 0.60 0.43 0.53 0.65 0.53 0.64 0.76 30.00 1.06 1.06 1.11 1.22 Rev.1.01.10 2 - 321 TC200G SERIES DATA SHEET FD2SFP FD2SFP 9/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.039 -0.076 0.38 -0.044 -0.082 1.00 -0.054 -0.091 3.00 -0.085 -0.122 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.139 -0.145 -0.154 -0.184 3.00 -0.342 -0.348 -0.356 -0.384 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.693 0.731 0.38 0.699 0.736 1.00 0.709 0.746 3.00 0.741 0.778 CONDITION D&~A WAVE_FORM 1.00 0.794 0.800 0.809 0.840 3.00 0.999 1.004 1.013 1.040 Rev.1.01.10 2 - 322 TC200G SERIES DATA SHEET FD2SFP FD2SFP 10/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.342 0.323 0.38 0.380 0.360 1.00 0.443 0.422 3.00 0.648 0.624 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.290 0.327 0.387 0.583 3.00 0.186 0.219 0.275 0.454 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.283 0.318 0.38 0.250 0.285 1.00 0.194 0.229 3.00 0.014 0.048 1.00 0.377 0.343 0.286 0.103 3.00 0.565 0.530 0.472 0.284 CONDITION CD&~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.312 0.332 0.38 0.274 0.295 1.00 0.212 0.233 3.00 0.009 0.033 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.371 0.336 0.38 0.404 0.369 1.00 0.460 0.426 3.00 0.641 0.608 1.00 0.278 0.312 0.368 0.552 3.00 0.090 0.125 0.183 0.372 1.00 0.365 0.329 0.268 0.073 3.00 0.472 0.438 0.382 0.202 Rev.1.01.10 2 - 323 TC200G SERIES DATA SHEET FD2SFP FD2SFP 11/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION CD&~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.386 0.392 0.38 0.422 0.433 1.00 0.483 0.504 3.00 0.679 0.730 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.402 0.453 0.539 0.815 3.00 0.434 0.515 0.651 1.090 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.178 0.139 0.38 0.152 0.109 1.00 0.109 0.060 3.00 -0.029 -0.101 1.00 0.074 0.038 -0.023 -0.221 3.00 -0.134 -0.193 -0.292 -0.610 CONDITION CD&~CP WAVE_FORM SI A SI A HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.269 0.263 0.38 0.233 0.221 1.00 0.173 0.152 3.00 -0.022 -0.073 SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.485 0.523 0.38 0.511 0.553 1.00 0.555 0.604 3.00 0.696 0.767 1.00 0.588 0.625 0.686 0.885 3.00 0.797 0.855 0.952 1.266 1.00 0.253 0.202 0.117 -0.159 3.00 0.221 0.140 0.004 -0.435 Rev.1.01.10 2 - 324 TC200G SERIES DATA SHEET FD2SFP FD2SFP 12/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM SI POSLIMIT tw(H) B SO CONDITION CD WAVE_FORM 0.01 to 3.00 0.740 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.720 MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 325 TC200G SERIES DATA SHEET FD2SFP FD2SFP 13/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM SI POSLIMIT CONDITION CD WAVE_FORM tw(H) A Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 326 TC200G SERIES DATA SHEET FD2S CELL NAME FD2S FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock with CLEAR FD2S CELL COUNT GATE 10 I/O 0 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD2S DD CPCK TI TI TETE CL CD QQ QNQN TRUTH TABLE INPUT OUTPUT CD D TI TE CP Qn+1 QNn+1 L X X X X* L H H L X L Up L H H H X L Up H L H X L H Up L H H X H H Up H L H X X X Dn Qn QNn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FD2S inst(Q,QN,D,CP,CD,TI,TE); VHDL DESCRIPTION inst:FD2S port map(Q,QN,D,CP,CD,TI,TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,TI CP CD TE (LU) LOAD 0.99 0.98 2.26 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 47.3 QN 48.1 Rev.1.01.10 2 - 327 TC200G SERIES DATA SHEET FD2S FD2S 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0393 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.38 0.51 0.28 0.41 0.54 0.35 0.48 0.61 0.49 0.63 0.76 30.00 0.98 1.01 1.08 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0865 0.09 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.60 0.75 0.49 0.62 0.78 0.56 0.69 0.85 0.73 0.86 1.01 30.00 1.36 1.38 1.45 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0881 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.69 0.85 0.63 0.77 0.93 0.71 0.85 1.01 0.87 1.01 1.17 30.00 1.47 1.55 1.63 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0393 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.70 0.83 0.65 0.78 0.91 0.73 0.86 0.99 0.88 1.01 1.14 30.00 1.30 1.38 1.46 1.61 Rev.1.01.10 2 - 328 TC200G SERIES DATA SHEET FD2S FD2S 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0865 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.84 0.99 0.79 0.91 1.06 0.87 0.99 1.14 1.02 1.14 1.30 30.00 1.59 1.66 1.74 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0395 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.82 0.95 0.78 0.90 1.02 0.87 0.98 1.11 1.03 1.14 1.27 30.00 1.42 1.49 1.58 1.74 Rev.1.01.10 2 - 329 TC200G SERIES DATA SHEET FD2S FD2S 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION (~TE&D TE&TI) WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.050 -0.090 0.38 -0.055 -0.095 1.00 -0.063 -0.103 3.00 -0.091 -0.130 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.157 -0.161 -0.169 -0.195 3.00 -0.372 -0.376 -0.384 -0.407 CLOCK CP DATA LOW CD CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.706 0.745 0.38 0.711 0.750 1.00 0.719 0.759 3.00 0.747 0.786 CONDITION (~TE&D TE&TI) WAVE_FORM 1.00 0.812 0.817 0.825 0.852 3.00 1.028 1.032 1.039 1.063 Rev.1.01.10 2 - 330 TC200G SERIES DATA SHEET FD2S FD2S 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.438 0.416 0.38 0.482 0.460 1.00 0.557 0.534 3.00 0.799 0.773 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.379 0.422 0.495 0.730 3.00 0.260 0.301 0.369 0.589 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.110 0.145 0.38 0.072 0.107 1.00 0.008 0.043 3.00 -0.197 -0.164 1.00 0.204 0.165 0.100 -0.109 3.00 0.395 0.354 0.286 0.067 CONDITION CD&~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.220 0.241 0.38 0.175 0.197 1.00 0.099 0.122 3.00 -0.144 -0.118 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.548 0.512 0.38 0.585 0.550 1.00 0.649 0.614 3.00 0.852 0.820 1.00 0.452 0.491 0.556 0.765 3.00 0.260 0.300 0.369 0.589 1.00 0.277 0.234 0.161 -0.074 3.00 0.394 0.353 0.286 0.067 Rev.1.01.10 2 - 331 TC200G SERIES DATA SHEET FD2S FD2S 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION CD&(~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.479 0.457 0.38 0.530 0.507 1.00 0.616 0.593 3.00 0.893 0.867 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.420 0.470 0.554 0.823 3.00 0.302 0.349 0.428 0.683 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.179 0.200 0.38 0.127 0.149 1.00 0.041 0.064 3.00 -0.238 -0.211 1.00 0.237 0.187 0.103 -0.168 3.00 0.353 0.306 0.227 -0.026 CONDITION CD&TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.008 0.025 0.38 -0.032 0.002 1.00 -0.071 -0.038 3.00 -0.197 -0.165 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.512 0.490 0.38 0.551 0.529 1.00 0.617 0.594 3.00 0.828 0.803 1.00 0.454 0.492 0.556 0.761 3.00 0.337 0.373 0.432 0.624 1.00 0.081 0.057 0.017 -0.111 3.00 0.262 0.237 0.195 0.061 Rev.1.01.10 2 - 332 TC200G SERIES DATA SHEET FD2S FD2S 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION CD&TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.665 0.632 0.38 0.688 0.655 1.00 0.727 0.694 3.00 0.852 0.820 1.00 0.576 0.600 0.639 0.767 3.00 0.396 0.420 0.461 0.595 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.142 0.164 0.38 0.103 0.125 1.00 0.038 0.061 3.00 -0.173 -0.148 1.00 0.201 0.163 0.099 -0.105 3.00 0.319 0.284 0.224 0.032 Rev.1.01.10 2 - 333 TC200G SERIES DATA SHEET FD2S FD2S 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM 0.01 to 3.00 0.710 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 Rev.1.01.10 2 - 334 TC200G SERIES DATA SHEET FD2SP CELL NAME FD2SP FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock with CLEAR FD2SP CELL COUNT GATE 11 I/O 0 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL FD2SP DD CPCK TI TI TETE CL CD QQ QNQN TRUTH TABLE INPUT OUTPUT CD D TI TE CP Qn+1 QNn+1 L X X X X* L H H L X L Up L H H H X L Up H L H X L H Up L H H X H H Up H L H X X X Dn Qn QNn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FD2SP inst(Q,QN,D,CP,CD,TI,TE); VHDL DESCRIPTION inst:FD2SP port map(Q,QN,D,CP,CD,TI,TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,TI CP CD TE (LU) LOAD 0.99 0.98 2.26 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 94.5 QN 89.5 Rev.1.01.10 2 - 335 TC200G SERIES DATA SHEET FD2SP FD2SP 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0197 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.34 0.41 0.28 0.36 0.44 0.35 0.43 0.51 0.51 0.60 0.68 30.00 0.67 0.69 0.77 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0442 0.08 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.60 0.68 0.55 0.62 0.71 0.62 0.70 0.78 0.81 0.88 0.97 30.00 1.01 1.03 1.11 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0442 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.64 0.73 0.64 0.72 0.80 0.72 0.80 0.89 0.88 0.96 1.05 30.00 1.05 1.13 1.21 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0197 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.66 0.74 0.66 0.74 0.81 0.74 0.82 0.89 0.89 0.97 1.04 30.00 0.99 1.07 1.15 1.30 Rev.1.01.10 2 - 336 TC200G SERIES DATA SHEET FD2SP FD2SP 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0442 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.77 0.85 0.93 0.85 0.92 1.01 0.93 1.01 1.09 1.08 1.15 1.24 30.00 1.24 1.32 1.40 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0236 0.10 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.78 0.86 0.94 0.86 0.94 1.02 0.94 1.02 1.10 1.10 1.18 1.26 30.00 1.23 1.31 1.39 1.55 Rev.1.01.10 2 - 337 TC200G SERIES DATA SHEET FD2SP FD2SP 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION (~TE&D TE&TI) WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.050 -0.090 0.38 -0.055 -0.095 1.00 -0.063 -0.103 3.00 -0.091 -0.130 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.157 -0.161 -0.169 -0.195 3.00 -0.372 -0.376 -0.384 -0.407 CLOCK CP DATA LOW CD CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.706 0.745 0.38 0.711 0.750 1.00 0.719 0.759 3.00 0.747 0.786 CONDITION (~TE&D TE&TI) WAVE_FORM 1.00 0.812 0.817 0.825 0.852 3.00 1.028 1.032 1.039 1.063 Rev.1.01.10 2 - 338 TC200G SERIES DATA SHEET FD2SP FD2SP 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.438 0.416 0.38 0.482 0.460 1.00 0.557 0.534 3.00 0.799 0.773 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.379 0.422 0.495 0.730 3.00 0.260 0.301 0.369 0.589 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.110 0.145 0.38 0.072 0.107 1.00 0.008 0.043 3.00 -0.197 -0.164 1.00 0.204 0.165 0.100 -0.109 3.00 0.395 0.354 0.286 0.067 CONDITION CD&~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.220 0.241 0.38 0.175 0.197 1.00 0.099 0.122 3.00 -0.144 -0.118 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.548 0.512 0.38 0.585 0.550 1.00 0.649 0.614 3.00 0.852 0.820 1.00 0.452 0.491 0.556 0.765 3.00 0.260 0.300 0.369 0.589 1.00 0.277 0.234 0.161 -0.074 3.00 0.394 0.353 0.286 0.067 Rev.1.01.10 2 - 339 TC200G SERIES DATA SHEET FD2SP FD2SP 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION CD&(~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.479 0.457 0.38 0.530 0.507 1.00 0.616 0.593 3.00 0.893 0.867 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.420 0.470 0.554 0.823 3.00 0.302 0.349 0.428 0.683 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.179 0.200 0.38 0.127 0.149 1.00 0.041 0.064 3.00 -0.238 -0.211 1.00 0.237 0.187 0.103 -0.168 3.00 0.353 0.306 0.227 -0.026 CONDITION CD&TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.008 0.025 0.38 -0.032 0.002 1.00 -0.071 -0.038 3.00 -0.197 -0.165 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.512 0.490 0.38 0.551 0.529 1.00 0.617 0.594 3.00 0.828 0.803 1.00 0.454 0.492 0.556 0.761 3.00 0.337 0.373 0.432 0.624 1.00 0.081 0.057 0.017 -0.111 3.00 0.262 0.237 0.195 0.061 Rev.1.01.10 2 - 340 TC200G SERIES DATA SHEET FD2SP FD2SP 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION CD&TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.665 0.632 0.38 0.688 0.655 1.00 0.727 0.694 3.00 0.852 0.820 1.00 0.576 0.600 0.639 0.767 3.00 0.396 0.420 0.461 0.595 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.142 0.164 0.38 0.103 0.125 1.00 0.038 0.061 3.00 -0.173 -0.148 1.00 0.201 0.163 0.099 -0.105 3.00 0.319 0.284 0.224 0.032 Rev.1.01.10 2 - 341 TC200G SERIES DATA SHEET FD2SP FD2SP 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM 0.01 to 3.00 0.710 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 Rev.1.01.10 2 - 342 TC200G SERIES DATA SHEET FD3 CELL NAME FD3 FUNCTION D-TYPE FLIP FLOP with CLEAR and PRESET FD3 CELL COUNT GATE 9 I/O 0 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD SD FD3 PR QQ TRUTH TABLE INPUT CD SD D CP L H X X* H L X X* L L X X H H L Up H H H Up H H X Dn *:Consider the HOLD Time of CLEAR or PRESET OUTPUT Qn+1 QNn+1 L H H L L L L H H L Qn QNn CP CK CL QNQN CD Verilog-HDL DESCRIPTION FD3 inst(Q,QN,D,CP,CD,SD); VHDL DESCRIPTION inst:FD3 port map(Q,QN,D,CP,CD,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP CD SD (LU) LOAD 0.99 2.28 2.18 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 47.0 QN 48.3 Rev.1.01.10 2 - 343 TC200G SERIES DATA SHEET FD3 FD3 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.50 0.27 0.40 0.55 0.33 0.46 0.62 0.45 0.59 0.75 30.00 1.10 1.15 1.22 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0395 0.09 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.45 0.59 0.34 0.48 0.62 0.42 0.55 0.69 0.58 0.73 0.87 30.00 1.08 1.10 1.18 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.37 0.51 0.28 0.40 0.53 0.34 0.47 0.60 0.48 0.62 0.76 30.00 1.00 1.03 1.10 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0860 0.11 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.36 0.52 0.28 0.41 0.57 0.34 0.47 0.63 0.46 0.60 0.76 30.00 1.12 1.17 1.23 1.37 Rev.1.01.10 2 - 344 TC200G SERIES DATA SHEET FD3 FD3 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.82 0.55 0.69 0.84 0.62 0.76 0.91 0.78 0.92 1.07 30.00 1.42 1.44 1.51 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0860 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.67 0.82 0.61 0.75 0.90 0.69 0.82 0.98 0.82 0.95 1.11 30.00 1.43 1.51 1.58 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.71 0.84 0.66 0.79 0.92 0.74 0.86 0.99 0.86 0.98 1.12 30.00 1.34 1.42 1.49 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.10 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.88 1.03 0.83 0.96 1.11 0.90 1.03 1.18 1.03 1.16 1.31 30.00 1.63 1.70 1.78 1.90 Rev.1.01.10 2 - 345 TC200G SERIES DATA SHEET FD3 FD3 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0395 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.80 0.92 0.76 0.87 1.00 0.84 0.95 1.08 0.96 1.08 1.20 30.00 1.39 1.47 1.54 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0860 0.11 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.71 0.86 0.60 0.73 0.89 0.68 0.81 0.97 0.86 0.99 1.14 30.00 1.46 1.48 1.56 1.73 Rev.1.01.10 2 - 346 TC200G SERIES DATA SHEET FD3 FD3 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD&D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.050 -0.085 0.38 -0.057 -0.093 1.00 -0.069 -0.105 3.00 -0.109 -0.144 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.145 -0.152 -0.164 -0.204 3.00 -0.336 -0.343 -0.356 -0.395 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.706 0.741 0.38 0.713 0.748 1.00 0.725 0.760 3.00 0.764 0.800 CONDITION SD&D WAVE_FORM 1.00 0.800 0.808 0.820 0.859 3.00 0.992 1.000 1.012 1.052 Rev.1.01.10 2 - 347 TC200G SERIES DATA SHEET FD3 FD3 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&SD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.349 0.38 0.404 0.385 1.00 0.464 0.445 3.00 0.659 0.638 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.318 0.353 0.412 0.601 3.00 0.219 0.252 0.307 0.484 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.250 0.283 0.38 0.217 0.249 1.00 0.161 0.192 3.00 -0.020 0.010 1.00 0.337 0.303 0.246 0.061 3.00 0.513 0.478 0.418 0.225 CONDITION CD&SD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.290 0.308 0.38 0.254 0.272 1.00 0.193 0.212 3.00 -0.003 0.019 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.407 0.375 0.38 0.441 0.408 1.00 0.497 0.465 3.00 0.677 0.646 1.00 0.320 0.354 0.411 0.595 3.00 0.144 0.180 0.239 0.431 1.00 0.338 0.303 0.244 0.055 3.00 0.435 0.402 0.348 0.173 Rev.1.01.10 2 - 348 TC200G SERIES DATA SHEET FD3 FD3 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION CD&~D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.098 0.38 0.160 0.127 1.00 0.207 0.175 3.00 0.360 0.331 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.042 0.072 0.121 0.281 3.00 -0.137 -0.105 -0.052 0.120 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.523 0.556 0.38 0.495 0.528 1.00 0.448 0.480 3.00 0.296 0.326 CONDITION CD&~D WAVE_FORM 1.00 0.612 0.583 0.534 0.375 3.00 0.793 0.761 0.708 0.535 Rev.1.01.10 2 - 349 TC200G SERIES DATA SHEET FD3 FD3 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD WAVE_FORM 0.01 to 3.00 0.730 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.780 Rev.1.01.10 2 - 350 TC200G SERIES DATA SHEET FD3P CELL NAME FD3P FUNCTION D-TYPE FLIP FLOP with CLEAR and PRESET FD3P CELL COUNT GATE 10 I/O 0 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD SD FD3P PR QQ TRUTH TABLE INPUT CD SD D CP L H X X* H L X X* L L X X H H L Up H H H Up H H X Dn *:Consider the HOLD Time of CLEAR or PRESET OUTPUT Qn+1 QNn+1 L H H L L L L H H L Qn QNn CP CK CL QNQN CD Verilog-HDL DESCRIPTION FD3P inst(Q,QN,D,CP,CD,SD); VHDL DESCRIPTION inst:FD3P port map(Q,QN,D,CP,CD,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,CP CD SD (LU) LOAD 0.99 2.28 2.18 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 89.1 QN 98.0 Rev.1.01.10 2 - 351 TC200G SERIES DATA SHEET FD3P FD3P 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.30 0.38 0.28 0.35 0.43 0.35 0.42 0.51 0.49 0.57 0.66 30.00 0.70 0.75 0.82 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0179 0.10 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.40 0.48 0.34 0.43 0.51 0.42 0.50 0.58 0.59 0.68 0.77 30.00 0.74 0.76 0.84 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0238 0.10 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.42 0.28 0.36 0.44 0.35 0.43 0.51 0.50 0.59 0.68 30.00 0.71 0.74 0.81 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0441 0.10 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.28 0.36 0.44 0.35 0.43 0.51 0.49 0.57 0.66 30.00 0.71 0.76 0.83 0.98 Rev.1.01.10 2 - 352 TC200G SERIES DATA SHEET FD3P FD3P 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.68 0.76 0.62 0.70 0.79 0.70 0.78 0.86 0.88 0.96 1.05 30.00 1.09 1.12 1.19 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0441 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.61 0.70 0.61 0.69 0.78 0.69 0.77 0.85 0.82 0.89 0.98 30.00 1.02 1.10 1.17 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0238 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.67 0.76 0.67 0.75 0.83 0.74 0.82 0.91 0.87 0.95 1.03 30.00 1.05 1.13 1.20 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.90 0.99 0.90 0.98 1.06 0.98 1.05 1.14 1.10 1.18 1.26 30.00 1.30 1.38 1.45 1.58 Rev.1.01.10 2 - 353 TC200G SERIES DATA SHEET FD3P FD3P 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0179 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.81 0.88 0.82 0.89 0.96 0.90 0.97 1.03 1.02 1.09 1.16 30.00 1.11 1.19 1.27 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0441 0.10 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.73 0.81 0.68 0.75 0.84 0.76 0.84 0.92 0.95 1.03 1.11 30.00 1.13 1.16 1.24 1.43 Rev.1.01.10 2 - 354 TC200G SERIES DATA SHEET FD3P FD3P 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD&D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.050 -0.085 0.38 -0.057 -0.093 1.00 -0.069 -0.105 3.00 -0.109 -0.144 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.145 -0.152 -0.164 -0.204 3.00 -0.336 -0.343 -0.356 -0.395 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.706 0.741 0.38 0.713 0.748 1.00 0.725 0.760 3.00 0.764 0.800 CONDITION SD&D WAVE_FORM 1.00 0.800 0.808 0.820 0.859 3.00 0.992 1.000 1.012 1.052 Rev.1.01.10 2 - 355 TC200G SERIES DATA SHEET FD3P FD3P 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&SD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.349 0.38 0.404 0.385 1.00 0.464 0.445 3.00 0.659 0.638 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.318 0.353 0.412 0.601 3.00 0.219 0.252 0.307 0.484 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.250 0.283 0.38 0.217 0.249 1.00 0.161 0.192 3.00 -0.020 0.010 1.00 0.337 0.303 0.246 0.061 3.00 0.513 0.478 0.418 0.225 CONDITION CD&SD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.290 0.308 0.38 0.254 0.272 1.00 0.193 0.212 3.00 -0.003 0.019 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.407 0.375 0.38 0.441 0.408 1.00 0.497 0.465 3.00 0.677 0.646 1.00 0.320 0.354 0.411 0.595 3.00 0.144 0.180 0.239 0.431 1.00 0.338 0.303 0.244 0.055 3.00 0.435 0.402 0.348 0.173 Rev.1.01.10 2 - 356 TC200G SERIES DATA SHEET FD3P FD3P 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION CD&~D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.098 0.38 0.160 0.127 1.00 0.207 0.175 3.00 0.360 0.331 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.042 0.072 0.121 0.281 3.00 -0.137 -0.105 -0.052 0.120 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.523 0.556 0.38 0.495 0.528 1.00 0.448 0.480 3.00 0.296 0.326 CONDITION CD&~D WAVE_FORM 1.00 0.612 0.583 0.534 0.375 3.00 0.793 0.761 0.708 0.535 Rev.1.01.10 2 - 357 TC200G SERIES DATA SHEET FD3P FD3P 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD WAVE_FORM 0.01 to 3.00 0.730 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.780 Rev.1.01.10 2 - 358 TC200G SERIES DATA SHEET FD3SF CELL NAME FD3SF FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock with CLEAR and PRESET FD3SF CELL COUNT GATE 13 I/O 0 1/15 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CPCP SI SI AA BB SD FD3SF SD QQ QN QN SO SO CD CD TRUTH TABLE INPUT OUTPUT CD SD D SI A B CP Qn+1 QNn+1 SOn+1 X X X XXLX X X SOn L L X XLHX L L L L H X X L H X* L H L H L X X L H X* H L H H H X L HH L L H L H H X HHH L H L H H H L X L H Up L H L H H H X L H Up H L H H H X X L H Dn Qn QNn Qn *:Consider the HOLD Time of CLEAR or PRESET Verilog-HDL DESCRIPTION FD3SF inst(Q,QN,SO,D,CP,CD,SD,SI, A,B); VHDL DESCRIPTION inst:FD3SF port map(Q,QN,SO,D,CP,CD,SD, SI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP CD,SD SI A B (LU) LOAD 0.99 2.28 0.89 2.07 2.03 OUTPUT DRIVE PIN NAME DRIVE Q 47.0 QN 47.1 (LU) SO 43.8 Rev.1.01.10 2 - 359 TC200G SERIES DATA SHEET FD3SF FD3SF 2/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.64 0.82 0.53 0.67 0.85 0.60 0.74 0.91 0.77 0.91 1.08 30.00 1.50 1.53 1.59 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.72 0.83 0.66 0.76 0.87 0.72 0.82 0.93 0.85 0.94 1.05 30.00 1.26 1.29 1.35 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.57 0.74 0.52 0.65 0.83 0.64 0.78 0.95 0.76 0.90 1.07 30.00 1.42 1.51 1.63 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.55 0.66 0.53 0.63 0.74 0.64 0.74 0.85 0.82 0.92 1.03 30.00 1.08 1.16 1.27 1.45 Rev.1.01.10 2 - 360 TC200G SERIES DATA SHEET FD3SF FD3SF 3/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0862 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.65 0.81 0.61 0.74 0.90 0.74 0.88 1.03 0.86 1.00 1.15 30.00 1.41 1.50 1.64 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.62 0.76 0.58 0.71 0.84 0.69 0.81 0.94 0.86 0.99 1.12 30.00 1.25 1.34 1.44 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.09 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.80 0.95 0.75 0.88 1.03 0.85 0.98 1.13 1.03 1.16 1.31 30.00 1.54 1.62 1.73 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0403 0.20 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.79 0.91 0.76 0.88 1.00 0.90 1.01 1.14 1.01 1.13 1.26 30.00 1.38 1.47 1.61 1.73 Rev.1.01.10 2 - 361 TC200G SERIES DATA SHEET FD3SF FD3SF 4/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.45 0.61 0.40 0.54 0.71 0.50 0.64 0.81 0.61 0.75 0.92 30.00 1.28 1.38 1.48 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.38 0.49 0.36 0.45 0.56 0.42 0.52 0.63 0.52 0.62 0.74 30.00 0.91 0.98 1.05 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.09 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.51 0.69 0.40 0.56 0.74 0.49 0.65 0.83 0.71 0.86 1.04 30.00 1.32 1.38 1.46 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0403 0.20 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.62 0.79 0.47 0.65 0.81 0.55 0.73 0.89 0.77 0.95 1.11 30.00 1.32 1.35 1.42 1.65 Rev.1.01.10 2 - 362 TC200G SERIES DATA SHEET FD3SF FD3SF 5/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.38 0.52 0.28 0.41 0.54 0.35 0.48 0.61 0.49 0.63 0.77 30.00 1.01 1.04 1.11 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0862 0.11 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.37 0.52 0.28 0.42 0.57 0.34 0.48 0.63 0.47 0.61 0.77 30.00 1.12 1.17 1.24 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.09 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.79 0.97 0.64 0.82 1.00 0.71 0.89 1.07 0.88 1.06 1.24 30.00 1.62 1.65 1.72 1.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION CD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.05 1.15 1.26 1.08 1.18 1.29 1.15 1.25 1.36 1.32 1.41 1.52 30.00 1.69 1.71 1.78 1.95 Rev.1.01.10 2 - 363 TC200G SERIES DATA SHEET FD3SF FD3SF 6/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0862 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.67 0.82 0.61 0.75 0.90 0.69 0.83 0.98 0.82 0.96 1.11 30.00 1.43 1.51 1.59 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.71 0.84 0.67 0.79 0.92 0.74 0.86 1.00 0.86 0.99 1.12 30.00 1.34 1.42 1.49 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.89 1.05 1.22 0.96 1.12 1.30 1.04 1.20 1.37 1.16 1.32 1.49 30.00 1.85 1.93 2.00 2.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0403 0.20 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.85 1.00 1.16 0.93 1.08 1.24 1.00 1.16 1.32 1.13 1.29 1.44 30.00 1.69 1.77 1.84 1.97 Rev.1.01.10 2 - 364 TC200G SERIES DATA SHEET FD3SF FD3SF 7/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.14 1.28 1.45 1.22 1.36 1.53 1.29 1.43 1.61 1.42 1.56 1.73 30.00 2.13 2.21 2.29 2.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.23 1.33 1.44 1.31 1.41 1.52 1.38 1.48 1.59 1.50 1.60 1.71 30.00 1.86 1.94 2.01 2.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0862 0.11 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.92 1.06 1.21 0.95 1.09 1.24 1.02 1.16 1.31 1.24 1.38 1.53 30.00 1.81 1.84 1.91 2.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH CONDITION PATH CONDITION SD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.93 1.11 0.82 0.96 1.13 0.89 1.03 1.20 1.11 1.25 1.42 30.00 1.79 1.81 1.89 2.10 Rev.1.01.10 2 - 365 TC200G SERIES DATA SHEET FD3SF FD3SF 8/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0862 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.62 0.78 0.53 0.66 0.82 0.61 0.75 0.91 0.80 0.94 1.10 30.00 1.38 1.42 1.51 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.10 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.60 0.74 0.48 0.61 0.74 0.53 0.65 0.78 0.62 0.76 0.90 30.00 1.24 1.24 1.28 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0861 0.09 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.78 0.93 0.65 0.78 0.93 0.69 0.82 0.97 0.81 0.94 1.09 30.00 1.52 1.53 1.57 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0403 0.20 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.76 0.88 0.68 0.80 0.92 0.77 0.89 1.01 0.96 1.08 1.21 30.00 1.35 1.39 1.48 1.68 Rev.1.01.10 2 - 366 TC200G SERIES DATA SHEET FD3SF FD3SF 9/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.50 0.67 0.39 0.53 0.70 0.44 0.58 0.75 0.52 0.66 0.83 30.00 1.35 1.39 1.43 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.47 0.58 0.38 0.48 0.58 0.43 0.53 0.64 0.55 0.65 0.76 30.00 1.00 1.01 1.06 1.19 Rev.1.01.10 2 - 367 TC200G SERIES DATA SHEET FD3SF FD3SF 10/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD&D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.050 -0.085 0.38 -0.057 -0.092 1.00 -0.069 -0.104 3.00 -0.109 -0.144 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.143 -0.150 -0.163 -0.202 3.00 -0.331 -0.339 -0.351 -0.390 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.706 0.740 0.38 0.713 0.747 1.00 0.725 0.760 3.00 0.764 0.799 CONDITION SD&D&~A WAVE_FORM 1.00 0.798 0.806 0.818 0.857 3.00 0.986 0.993 1.006 1.045 Rev.1.01.10 2 - 368 TC200G SERIES DATA SHEET FD3SF FD3SF 11/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&SD&~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.349 0.38 0.404 0.385 1.00 0.464 0.445 3.00 0.659 0.638 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.318 0.353 0.412 0.601 3.00 0.219 0.252 0.307 0.484 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.250 0.283 0.38 0.217 0.249 1.00 0.161 0.192 3.00 -0.020 0.010 1.00 0.337 0.303 0.246 0.061 3.00 0.513 0.478 0.418 0.225 CONDITION CD&SD&~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.290 0.308 0.38 0.254 0.272 1.00 0.193 0.212 3.00 -0.003 0.019 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.407 0.375 0.38 0.441 0.408 1.00 0.497 0.465 3.00 0.677 0.646 1.00 0.320 0.354 0.411 0.595 3.00 0.144 0.180 0.239 0.431 1.00 0.338 0.303 0.244 0.055 3.00 0.435 0.402 0.348 0.173 Rev.1.01.10 2 - 369 TC200G SERIES DATA SHEET FD3SF FD3SF 12/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION CD&SD&~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.432 0.441 0.38 0.477 0.490 1.00 0.551 0.572 3.00 0.790 0.838 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.455 0.512 0.608 0.918 3.00 0.499 0.583 0.724 1.178 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.170 0.131 0.38 0.151 0.107 1.00 0.118 0.066 3.00 0.012 -0.065 1.00 0.065 0.033 -0.020 -0.194 3.00 -0.147 -0.204 -0.300 -0.610 CONDITION CD&SD&~CP WAVE_FORM SI A SI A HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.222 0.214 0.38 0.178 0.165 1.00 0.104 0.083 3.00 -0.134 -0.182 SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.485 0.525 0.38 0.506 0.551 1.00 0.543 0.595 3.00 0.662 0.736 1.00 0.592 0.626 0.681 0.862 3.00 0.810 0.866 0.961 1.266 1.00 0.201 0.143 0.047 -0.263 3.00 0.156 0.072 -0.068 -0.523 Rev.1.01.10 2 - 370 TC200G SERIES DATA SHEET FD3SF FD3SF 13/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION CD&~D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.098 0.38 0.160 0.127 1.00 0.207 0.175 3.00 0.360 0.330 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.042 0.072 0.121 0.279 3.00 -0.137 -0.106 -0.054 0.115 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.523 0.556 0.38 0.495 0.528 1.00 0.448 0.480 3.00 0.296 0.326 CONDITION CD&~D&~A WAVE_FORM 1.00 0.612 0.583 0.534 0.377 3.00 0.793 0.762 0.710 0.542 Rev.1.01.10 2 - 371 TC200G SERIES DATA SHEET FD3SF FD3SF 14/15 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD WAVE_FORM 0.01 to 3.00 0.810 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.930 Rev.1.01.10 2 - 372 TC200G SERIES DATA SHEET FD3SF FD3SF 15/15 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM SI POSLIMIT CONDITION CD&SD WAVE_FORM tw(H) B SO POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION CD&SD WAVE_FORM SI tw(H) A Q MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 373 TC200G SERIES DATA SHEET FD3SFP CELL NAME FD3SFP FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock with CLEAR and PRESET FD3SFP CELL COUNT GATE 14 I/O 0 1/15 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CPCP SI SI AA BB SD FD3SFP SD QQ QN QN SO SO CD CD TRUTH TABLE INPUT OUTPUT CD SD D SI A B CP Qn+1 QNn+1 SOn+1 X X X XXLX X X SOn L L X XLHX L L L L H X X L H X* L H L H L X X L H X* H L H H H X L HH L L H L H H X HHH L H L H H H L X L H Up L H L H H H X L H Up H L H H H X X L H Dn Qn QNn Qn *:Consider the HOLD Time of CLEAR or PRESET Verilog-HDL DESCRIPTION FD3SFP inst(Q,QN,SO,D,CP,CD,SD, SI,A,B); VHDL DESCRIPTION inst:FD3SFP port map(Q,QN,SO,D,CP,CD,SD, SI,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP CD SD SI A B (LU) LOAD 0.99 2.28 2.27 0.92 2.10 2.02 OUTPUT DRIVE PIN NAME DRIVE Q 87.7 QN 90.5 (LU) SO 42.6 Rev.1.01.10 2 - 374 TC200G SERIES DATA SHEET FD3SFP FD3SFP 2/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.65 0.82 0.54 0.68 0.85 0.61 0.75 0.92 0.79 0.92 1.09 30.00 1.50 1.53 1.60 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0400 0.10 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.76 0.88 0.69 0.79 0.91 0.75 0.85 0.97 0.88 0.99 1.11 30.00 1.34 1.38 1.44 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.57 0.74 0.53 0.66 0.83 0.66 0.80 0.96 0.79 0.92 1.09 30.00 1.42 1.51 1.64 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0400 0.10 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.56 0.68 0.54 0.64 0.76 0.65 0.75 0.87 0.83 0.94 1.06 30.00 1.14 1.23 1.33 1.52 Rev.1.01.10 2 - 375 TC200G SERIES DATA SHEET FD3SFP FD3SFP 3/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0464 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.61 0.70 0.63 0.70 0.79 0.76 0.84 0.93 0.90 0.97 1.06 30.00 1.03 1.12 1.26 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0226 0.11 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.58 0.67 0.59 0.67 0.75 0.69 0.77 0.85 0.87 0.95 1.03 30.00 0.95 1.03 1.14 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0432 0.09 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.83 0.91 0.83 0.91 0.99 0.94 1.01 1.10 1.12 1.19 1.28 30.00 1.22 1.31 1.41 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0213 0.24 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.82 0.89 0.84 0.91 0.98 0.98 1.05 1.12 1.11 1.18 1.25 30.00 1.14 1.23 1.37 1.50 Rev.1.01.10 2 - 376 TC200G SERIES DATA SHEET FD3SFP FD3SFP 4/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.45 0.62 0.41 0.55 0.71 0.52 0.66 0.82 0.64 0.77 0.94 30.00 1.28 1.38 1.49 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0400 0.10 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.39 0.51 0.36 0.47 0.58 0.42 0.53 0.65 0.52 0.64 0.77 30.00 0.97 1.05 1.12 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0432 0.09 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.46 0.57 0.43 0.52 0.62 0.53 0.62 0.72 0.77 0.86 0.95 30.00 0.91 0.97 1.06 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0213 0.24 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.54 0.64 0.46 0.57 0.67 0.53 0.64 0.75 0.75 0.86 0.97 30.00 0.96 0.98 1.06 1.28 Rev.1.01.10 2 - 377 TC200G SERIES DATA SHEET FD3SFP FD3SFP 5/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0226 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.41 0.28 0.36 0.44 0.35 0.43 0.51 0.49 0.58 0.67 30.00 0.70 0.72 0.80 0.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0464 0.10 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.40 0.28 0.36 0.45 0.35 0.43 0.52 0.49 0.57 0.67 30.00 0.73 0.78 0.85 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0432 0.09 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.81 0.92 0.74 0.84 0.95 0.81 0.91 1.02 1.00 1.10 1.20 30.00 1.28 1.31 1.38 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0400 0.10 PATH CONDITION PATH CONDITION CD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.20 1.30 1.42 1.22 1.33 1.45 1.30 1.40 1.52 1.48 1.58 1.70 30.00 1.88 1.91 1.98 2.17 Rev.1.01.10 2 - 378 TC200G SERIES DATA SHEET FD3SFP FD3SFP 6/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0464 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.62 0.71 0.62 0.70 0.78 0.70 0.77 0.86 0.82 0.90 0.99 30.00 1.04 1.11 1.19 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0226 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.67 0.75 0.67 0.75 0.83 0.74 0.82 0.90 0.87 0.94 1.02 30.00 1.03 1.11 1.18 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0432 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.98 1.07 1.17 1.06 1.15 1.25 1.13 1.22 1.32 1.25 1.34 1.44 30.00 1.52 1.60 1.67 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0213 0.24 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.89 0.99 1.09 0.97 1.07 1.17 1.05 1.15 1.24 1.18 1.27 1.37 30.00 1.38 1.46 1.54 1.67 Rev.1.01.10 2 - 379 TC200G SERIES DATA SHEET FD3SFP FD3SFP 7/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.26 1.40 1.56 1.34 1.47 1.64 1.41 1.55 1.72 1.54 1.68 1.85 30.00 2.24 2.32 2.40 2.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0400 0.10 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.37 1.48 1.60 1.45 1.56 1.68 1.53 1.63 1.75 1.65 1.75 1.87 30.00 2.06 2.14 2.21 2.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0464 0.10 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.01 1.09 1.18 1.04 1.12 1.21 1.11 1.18 1.27 1.33 1.41 1.50 30.00 1.51 1.54 1.60 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH CONDITION PATH CONDITION SD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.86 1.00 1.17 0.88 1.02 1.19 0.95 1.09 1.26 1.17 1.31 1.48 30.00 1.84 1.87 1.94 2.16 Rev.1.01.10 2 - 380 TC200G SERIES DATA SHEET FD3SFP FD3SFP 8/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0464 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.58 0.67 0.54 0.62 0.71 0.63 0.71 0.80 0.84 0.92 1.01 30.00 1.00 1.04 1.13 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0226 0.11 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.56 0.64 0.49 0.57 0.65 0.53 0.61 0.69 0.64 0.72 0.81 30.00 0.93 0.93 0.97 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0432 0.09 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.80 0.89 0.73 0.81 0.89 0.78 0.85 0.93 0.91 0.99 1.07 30.00 1.20 1.20 1.25 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0213 0.24 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.79 0.86 0.75 0.82 0.90 0.85 0.92 0.99 1.06 1.13 1.21 30.00 1.11 1.15 1.24 1.46 Rev.1.01.10 2 - 381 TC200G SERIES DATA SHEET FD3SFP FD3SFP 9/15 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1005 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.50 0.67 0.40 0.54 0.71 0.45 0.59 0.76 0.54 0.68 0.85 30.00 1.35 1.39 1.44 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0400 0.10 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.48 0.60 0.39 0.49 0.61 0.44 0.54 0.66 0.54 0.65 0.77 30.00 1.06 1.07 1.12 1.23 Rev.1.01.10 2 - 382 TC200G SERIES DATA SHEET FD3SFP FD3SFP 10/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD&D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.050 -0.085 0.38 -0.057 -0.092 1.00 -0.069 -0.104 3.00 -0.109 -0.144 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.143 -0.150 -0.163 -0.202 3.00 -0.331 -0.339 -0.351 -0.390 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.706 0.740 0.38 0.713 0.747 1.00 0.725 0.760 3.00 0.764 0.799 CONDITION SD&D&~A WAVE_FORM 1.00 0.798 0.806 0.818 0.857 3.00 0.986 0.993 1.006 1.045 Rev.1.01.10 2 - 383 TC200G SERIES DATA SHEET FD3SFP FD3SFP 11/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&SD&~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.367 0.349 0.38 0.404 0.385 1.00 0.464 0.445 3.00 0.659 0.638 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.318 0.353 0.412 0.601 3.00 0.219 0.252 0.307 0.484 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.250 0.283 0.38 0.217 0.249 1.00 0.161 0.192 3.00 -0.020 0.010 1.00 0.337 0.303 0.246 0.061 3.00 0.513 0.478 0.418 0.225 CONDITION CD&SD&~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.290 0.308 0.38 0.254 0.272 1.00 0.193 0.212 3.00 -0.003 0.019 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.407 0.375 0.38 0.441 0.408 1.00 0.497 0.465 3.00 0.677 0.646 1.00 0.320 0.354 0.411 0.595 3.00 0.144 0.180 0.239 0.431 1.00 0.338 0.303 0.244 0.055 3.00 0.435 0.402 0.348 0.173 Rev.1.01.10 2 - 384 TC200G SERIES DATA SHEET FD3SFP FD3SFP 12/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION CD&SD&~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.432 0.441 0.38 0.477 0.490 1.00 0.551 0.572 3.00 0.790 0.838 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.455 0.512 0.608 0.918 3.00 0.499 0.583 0.724 1.178 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.170 0.131 0.38 0.151 0.107 1.00 0.118 0.066 3.00 0.012 -0.065 1.00 0.065 0.033 -0.020 -0.194 3.00 -0.147 -0.204 -0.300 -0.610 CONDITION CD&SD&~CP WAVE_FORM SI A SI A HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.222 0.214 0.38 0.178 0.165 1.00 0.104 0.083 3.00 -0.134 -0.182 SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.485 0.525 0.38 0.506 0.551 1.00 0.543 0.595 3.00 0.662 0.736 1.00 0.592 0.626 0.681 0.862 3.00 0.810 0.866 0.961 1.266 1.00 0.201 0.143 0.047 -0.263 3.00 0.156 0.072 -0.068 -0.523 Rev.1.01.10 2 - 385 TC200G SERIES DATA SHEET FD3SFP FD3SFP 13/15 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION CD&~D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.098 0.38 0.160 0.127 1.00 0.207 0.175 3.00 0.360 0.330 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.042 0.072 0.121 0.279 3.00 -0.137 -0.106 -0.054 0.115 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.523 0.556 0.38 0.495 0.528 1.00 0.448 0.480 3.00 0.296 0.326 CONDITION CD&~D&~A WAVE_FORM 1.00 0.612 0.583 0.534 0.377 3.00 0.793 0.762 0.710 0.542 Rev.1.01.10 2 - 386 TC200G SERIES DATA SHEET FD3SFP FD3SFP 14/15 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD WAVE_FORM 0.01 to 3.00 0.810 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.760 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.930 Rev.1.01.10 2 - 387 TC200G SERIES DATA SHEET FD3SFP FD3SFP 15/15 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM SI POSLIMIT CONDITION CD&SD WAVE_FORM tw(H) B SO POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION CD&SD WAVE_FORM SI tw(H) A Q MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 388 TC200G SERIES DATA SHEET FD3S CELL NAME FD3S FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock with CLEAR and PRESET FD3S CELL COUNT GATE 11 I/O 0 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CPCK TI TI TETE SD FD3S PR QQ QN QN TRUTH TABLE INPUT CD SD D TI TE L H X X X H L X X X L L X X X H H L X L H HH X L H H X L H H H X H H H H X X X *:Consider the HOLD Time of CLEAR or PRESET CP X* X* X Up Up Up Up Dn OUTPUT Qn+1 QNn+1 L H H L L L L H H L L H H L Qn QNn CL CD Verilog-HDL DESCRIPTION FD3S inst(Q,QN,D,CP,CD,SD,TI,TE); VHDL DESCRIPTION inst:FD3S port map(Q,QN,D,CP,CD,SD,TI, TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,TI CP CD SD TE (LU) LOAD 0.99 0.98 2.28 2.18 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 47.1 QN 48.3 Rev.1.01.10 2 - 389 TC200G SERIES DATA SHEET FD3S FD3S 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0862 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.51 0.27 0.41 0.56 0.34 0.47 0.62 0.46 0.60 0.75 30.00 1.11 1.16 1.23 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0395 0.09 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.46 0.60 0.35 0.49 0.63 0.42 0.56 0.70 0.59 0.74 0.88 30.00 1.08 1.11 1.19 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0428 0.82 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.00 0.00 0.01 0.00 0.00 0.06 0.11 0.72 0.90 0.80 0.78 0.80 30.00 0.50 0.70 1.12 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0861 0.11 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.36 0.52 0.28 0.41 0.57 0.34 0.48 0.63 0.46 0.60 0.76 30.00 1.12 1.17 1.23 1.38 Rev.1.01.10 2 - 390 TC200G SERIES DATA SHEET FD3S FD3S 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0862 0.09 PATH DELAY (ns) 1.00 5.00 10.00 -0.21 -0.16 0.10 -0.20 0.13 0.38 0.78 0.79 0.86 0.56 0.66 0.93 30.00 0.80 1.11 1.47 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0861 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.68 0.84 0.63 0.76 0.92 0.71 0.84 1.00 0.87 1.00 1.16 30.00 1.44 1.52 1.61 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0428 0.82 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.71 0.84 0.66 0.79 0.92 0.74 0.87 1.00 0.89 1.01 1.15 30.00 1.34 1.42 1.49 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0862 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.88 1.03 0.83 0.96 1.11 0.91 1.04 1.19 1.06 1.19 1.34 30.00 1.63 1.71 1.79 1.93 Rev.1.01.10 2 - 391 TC200G SERIES DATA SHEET FD3S FD3S 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0395 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.81 0.93 0.77 0.89 1.01 0.86 0.97 1.10 1.01 1.13 1.25 30.00 1.40 1.48 1.56 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0861 0.11 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.71 0.87 0.61 0.74 0.89 0.69 0.82 0.97 0.87 1.00 1.15 30.00 1.46 1.49 1.57 1.75 Rev.1.01.10 2 - 392 TC200G SERIES DATA SHEET FD3S FD3S 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD&(~TE&D TE&TI) WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.061 -0.101 0.38 -0.067 -0.107 1.00 -0.078 -0.118 3.00 -0.114 -0.153 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.167 -0.174 -0.185 -0.219 3.00 -0.383 -0.389 -0.399 -0.431 CLOCK CP DATA LOW CD CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.718 0.758 0.38 0.725 0.764 1.00 0.735 0.775 3.00 0.771 0.810 CONDITION SD&(~TE&D TE&TI) WAVE_FORM 1.00 0.825 0.831 0.841 0.875 3.00 1.040 1.046 1.055 1.086 Rev.1.01.10 2 - 393 TC200G SERIES DATA SHEET FD3S FD3S 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&SD&~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.438 0.416 0.38 0.482 0.460 1.00 0.557 0.534 3.00 0.799 0.773 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.379 0.422 0.495 0.730 3.00 0.260 0.301 0.369 0.589 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.068 0.104 0.38 0.030 0.065 1.00 -0.035 -0.000 3.00 -0.243 -0.210 1.00 0.163 0.124 0.058 -0.154 3.00 0.354 0.314 0.246 0.026 CONDITION CD&SD&~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.220 0.241 0.38 0.175 0.197 1.00 0.099 0.122 3.00 -0.144 -0.118 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.588 0.553 0.38 0.627 0.592 1.00 0.691 0.656 3.00 0.899 0.866 1.00 0.493 0.533 0.598 0.810 3.00 0.302 0.342 0.410 0.630 1.00 0.277 0.234 0.161 -0.074 3.00 0.394 0.353 0.286 0.067 Rev.1.01.10 2 - 394 TC200G SERIES DATA SHEET FD3S FD3S 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION CD&SD&(~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.479 0.457 0.38 0.530 0.507 1.00 0.616 0.593 3.00 0.893 0.867 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.420 0.470 0.554 0.823 3.00 0.302 0.349 0.428 0.683 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.179 0.200 0.38 0.127 0.149 1.00 0.041 0.064 3.00 -0.238 -0.211 1.00 0.237 0.187 0.103 -0.168 3.00 0.353 0.306 0.227 -0.026 CONDITION CD&SD&TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.056 -0.023 0.38 -0.079 -0.046 1.00 -0.118 -0.085 3.00 -0.243 -0.211 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.512 0.490 0.38 0.551 0.529 1.00 0.615 0.592 3.00 0.823 0.798 1.00 0.454 0.492 0.554 0.757 3.00 0.337 0.373 0.432 0.624 1.00 0.033 0.010 -0.030 -0.158 3.00 0.214 0.189 0.148 0.015 Rev.1.01.10 2 - 395 TC200G SERIES DATA SHEET FD3S FD3S 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION CD&SD&TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.710 0.677 0.38 0.734 0.701 1.00 0.773 0.740 3.00 0.899 0.868 TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE 1.00 0.622 0.646 0.685 0.814 3.00 0.443 0.467 0.509 0.642 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.142 0.164 0.38 0.104 0.126 1.00 0.039 0.062 3.00 -0.168 -0.143 1.00 0.201 0.163 0.101 -0.102 3.00 0.319 0.284 0.224 0.032 CONDITION CD&(~TE&~D TE&~TI) WAVE_FORM SD CP Q HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.094 0.38 0.159 0.122 1.00 0.205 0.169 3.00 0.354 0.320 1.00 0.031 0.059 0.108 0.263 3.00 -0.172 -0.141 -0.089 0.079 Rev.1.01.10 2 - 396 TC200G SERIES DATA SHEET FD3S FD3S 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE CLOCK CP DATA LOW SD CP Q CONDITION CD&(~TE&~D TE&~TI) WAVE_FORM HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.523 0.561 0.38 0.495 0.533 1.00 0.450 0.486 3.00 0.302 0.336 1.00 0.624 0.596 0.547 0.393 3.00 0.829 0.798 0.745 0.576 Rev.1.01.10 2 - 397 TC200G SERIES DATA SHEET FD3S FD3S 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD WAVE_FORM 0.01 to 3.00 0.730 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.790 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.780 Rev.1.01.10 2 - 398 TC200G SERIES DATA SHEET FD3SP CELL NAME FD3SP FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock with CLEAR and PRESET FD3SP CELL COUNT GATE 12 I/O 0 1/10 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CPCK TI TI TETE SD FD3SP PR QQ QN QN TRUTH TABLE INPUT CD SD D TI TE L H X X X H L X X X L L X X X H H L X L H HH X L H H X L H H H X H H H H X X X *:Consider the HOLD Time of CLEAR or PRESET CP X* X* X Up Up Up Up Dn OUTPUT Qn+1 QNn+1 L H H L L L L H H L L H H L Qn QNn CL CD Verilog-HDL DESCRIPTION FD3SP inst(Q,QN,D,CP,CD,SD,TI,TE); VHDL DESCRIPTION inst:FD3SP port map(Q,QN,D,CP,CD,SD,TI, TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,TI CP CD SD TE (LU) LOAD 0.99 0.98 2.28 2.18 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 88.8 QN 97.7 Rev.1.01.10 2 - 399 TC200G SERIES DATA SHEET FD3SP FD3SP 2/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.30 0.38 0.28 0.35 0.43 0.35 0.42 0.51 0.49 0.57 0.66 30.00 0.70 0.75 0.82 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.10 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.40 0.48 0.34 0.42 0.50 0.41 0.50 0.58 0.58 0.68 0.76 30.00 0.73 0.76 0.83 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0298 0.86 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 -0.00 -0.00 0.00 -0.00 0.00 0.01 0.20 0.57 0.72 0.72 0.71 0.73 30.00 0.10 0.42 0.97 0.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0441 0.10 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.28 0.36 0.44 0.35 0.42 0.51 0.49 0.57 0.66 30.00 0.71 0.76 0.83 0.98 Rev.1.01.10 2 - 400 TC200G SERIES DATA SHEET FD3SP FD3SP 3/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 -0.21 -0.19 -0.07 -0.09 0.15 0.31 0.80 0.79 0.82 0.63 0.82 0.95 30.00 0.36 0.77 1.16 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0441 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.63 0.71 0.63 0.71 0.79 0.71 0.79 0.88 0.87 0.95 1.04 30.00 1.04 1.11 1.20 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0298 0.86 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.67 0.75 0.67 0.75 0.83 0.75 0.83 0.91 0.90 0.98 1.06 30.00 1.05 1.13 1.21 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.90 0.98 0.90 0.98 1.06 0.98 1.06 1.14 1.13 1.21 1.29 30.00 1.30 1.38 1.46 1.61 Rev.1.01.10 2 - 401 TC200G SERIES DATA SHEET FD3SP FD3SP 4/10 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.83 0.90 0.84 0.91 0.97 0.92 0.99 1.06 1.08 1.15 1.22 30.00 1.13 1.21 1.29 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0441 0.10 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.72 0.81 0.67 0.75 0.83 0.75 0.83 0.91 0.94 1.02 1.11 30.00 1.13 1.15 1.23 1.43 Rev.1.01.10 2 - 402 TC200G SERIES DATA SHEET FD3SP FD3SP 5/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD&(~TE&D TE&TI) WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.061 -0.101 0.38 -0.067 -0.107 1.00 -0.078 -0.118 3.00 -0.114 -0.153 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.167 -0.174 -0.185 -0.219 3.00 -0.383 -0.389 -0.399 -0.431 CLOCK CP DATA LOW CD CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.718 0.758 0.38 0.725 0.764 1.00 0.735 0.775 3.00 0.771 0.810 CONDITION SD&(~TE&D TE&TI) WAVE_FORM 1.00 0.825 0.831 0.841 0.875 3.00 1.040 1.046 1.055 1.086 Rev.1.01.10 2 - 403 TC200G SERIES DATA SHEET FD3SP FD3SP 6/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&SD&~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.438 0.416 0.38 0.482 0.460 1.00 0.557 0.534 3.00 0.799 0.773 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.379 0.422 0.495 0.730 3.00 0.260 0.301 0.369 0.589 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.068 0.104 0.38 0.030 0.065 1.00 -0.035 -0.000 3.00 -0.243 -0.210 1.00 0.163 0.124 0.058 -0.154 3.00 0.354 0.314 0.246 0.026 CONDITION CD&SD&~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.220 0.241 0.38 0.175 0.197 1.00 0.099 0.122 3.00 -0.144 -0.118 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.588 0.553 0.38 0.627 0.592 1.00 0.691 0.656 3.00 0.899 0.866 1.00 0.493 0.533 0.598 0.810 3.00 0.302 0.342 0.410 0.630 1.00 0.277 0.234 0.161 -0.074 3.00 0.394 0.353 0.286 0.067 Rev.1.01.10 2 - 404 TC200G SERIES DATA SHEET FD3SP FD3SP 7/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION CD&SD&(~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.479 0.457 0.38 0.530 0.507 1.00 0.616 0.593 3.00 0.893 0.867 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.420 0.470 0.554 0.823 3.00 0.302 0.349 0.428 0.683 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.179 0.200 0.38 0.127 0.149 1.00 0.041 0.064 3.00 -0.238 -0.211 1.00 0.237 0.187 0.103 -0.168 3.00 0.353 0.306 0.227 -0.026 CONDITION CD&SD&TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.056 -0.023 0.38 -0.079 -0.046 1.00 -0.118 -0.085 3.00 -0.243 -0.211 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.512 0.490 0.38 0.551 0.529 1.00 0.615 0.592 3.00 0.823 0.798 1.00 0.454 0.492 0.554 0.757 3.00 0.337 0.373 0.432 0.624 1.00 0.033 0.010 -0.030 -0.158 3.00 0.214 0.189 0.148 0.015 Rev.1.01.10 2 - 405 TC200G SERIES DATA SHEET FD3SP FD3SP 8/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION CD&SD&TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.710 0.677 0.38 0.734 0.701 1.00 0.773 0.740 3.00 0.899 0.868 TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE 1.00 0.622 0.646 0.685 0.814 3.00 0.443 0.467 0.509 0.642 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.142 0.164 0.38 0.104 0.126 1.00 0.039 0.062 3.00 -0.168 -0.143 1.00 0.201 0.163 0.101 -0.102 3.00 0.319 0.284 0.224 0.032 CONDITION CD&(~TE&~D TE&~TI) WAVE_FORM SD CP Q HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.094 0.38 0.159 0.122 1.00 0.205 0.169 3.00 0.354 0.320 1.00 0.031 0.059 0.108 0.263 3.00 -0.172 -0.141 -0.089 0.079 Rev.1.01.10 2 - 406 TC200G SERIES DATA SHEET FD3SP FD3SP 9/10 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE CLOCK CP DATA LOW SD CP Q CONDITION CD&(~TE&~D TE&~TI) WAVE_FORM HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.523 0.561 0.38 0.495 0.533 1.00 0.450 0.486 3.00 0.302 0.336 1.00 0.624 0.596 0.547 0.393 3.00 0.829 0.798 0.745 0.576 Rev.1.01.10 2 - 407 TC200G SERIES DATA SHEET FD3SP FD3SP 10/10 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD WAVE_FORM 0.01 to 3.00 0.730 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.790 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.780 Rev.1.01.10 2 - 408 TC200G SERIES DATA SHEET FD4 CELL NAME FD4 FUNCTION D-TYPE FLIP FLOP with PRESET 8 LOGIC SYMBOL 0 FD4 CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. SD FD4 DD PR QQ TRUTH TABLE INPUT OUTPUT SD D CP Qn+1 QNn+1 L X X* H L H L Up L H H H Up H L H X Dn Qn QNn *:Consider the HOLD Time of PRESET CP CK QNQN Verilog-HDL DESCRIPTION FD4 inst(Q,QN,D,CP,SD); VHDL DESCRIPTION inst:FD4 port map(Q,QN,D,CP,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP SD (LU) LOAD 0.99 2.23 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 46.1 QN 45.9 Rev.1.01.10 2 - 409 TC200G SERIES DATA SHEET FD4 FD4 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0963 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.64 0.81 0.57 0.72 0.89 0.65 0.79 0.96 0.78 0.92 1.09 30.00 1.48 1.56 1.64 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0349 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.71 0.83 0.68 0.79 0.91 0.75 0.86 0.98 0.88 0.99 1.10 30.00 1.26 1.33 1.41 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0960 0.10 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.94 1.11 0.87 1.01 1.18 0.94 1.09 1.26 1.07 1.21 1.38 30.00 1.77 1.85 1.92 2.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0360 0.08 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.71 0.82 0.69 0.79 0.90 0.77 0.87 0.98 0.89 1.00 1.11 30.00 1.25 1.33 1.41 1.53 Rev.1.01.10 2 - 410 TC200G SERIES DATA SHEET FD4 FD4 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0963 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.68 0.85 0.57 0.71 0.88 0.65 0.79 0.95 0.82 0.96 1.12 30.00 1.51 1.54 1.62 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0360 0.08 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.44 0.56 0.33 0.47 0.59 0.41 0.54 0.67 0.58 0.72 0.85 30.00 1.01 1.03 1.11 1.29 Rev.1.01.10 2 - 411 TC200G SERIES DATA SHEET FD4 FD4 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION SD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.360 0.341 0.38 0.395 0.376 1.00 0.453 0.434 3.00 0.641 0.620 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.310 0.344 0.401 0.585 3.00 0.208 0.241 0.295 0.472 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.238 0.271 0.38 0.205 0.238 1.00 0.149 0.181 3.00 -0.032 -0.001 1.00 0.327 0.293 0.235 0.051 3.00 0.506 0.470 0.411 0.219 CONDITION SD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.295 0.314 0.38 0.260 0.280 1.00 0.202 0.222 3.00 0.014 0.035 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.418 0.385 0.38 0.452 0.419 1.00 0.508 0.475 3.00 0.688 0.657 1.00 0.329 0.363 0.420 0.605 3.00 0.148 0.184 0.243 0.436 1.00 0.346 0.312 0.255 0.071 3.00 0.447 0.415 0.360 0.185 Rev.1.01.10 2 - 412 TC200G SERIES DATA SHEET FD4 FD4 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION ~D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.161 0.127 0.38 0.194 0.161 1.00 0.250 0.218 3.00 0.430 0.400 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.072 0.106 0.163 0.349 3.00 -0.109 -0.072 -0.012 0.185 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.494 0.527 0.38 0.461 0.494 1.00 0.407 0.439 3.00 0.232 0.261 CONDITION ~D WAVE_FORM 1.00 0.583 0.549 0.493 0.311 3.00 0.763 0.727 0.666 0.471 Rev.1.01.10 2 - 413 TC200G SERIES DATA SHEET FD4 FD4 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION SD WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.760 Rev.1.01.10 2 - 414 TC200G SERIES DATA SHEET FD4P CELL NAME FD4P FUNCTION D-TYPE FLIP FLOP with PRESET 9 LOGIC SYMBOL 0 FD4P CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. SD FD4P DD PR QQ TRUTH TABLE INPUT OUTPUT SD D CP Qn+1 QNn+1 L X X* H L H L Up L H H H Up H L H X Dn Qn QNn *:Consider the HOLD Time of PRESET CP CK QNQN Verilog-HDL DESCRIPTION FD4P inst(Q,QN,D,CP,SD); VHDL DESCRIPTION inst:FD4P port map(Q,QN,D,CP,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,CP SD (LU) LOAD 0.99 2.23 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 89.8 QN 97.3 Rev.1.01.10 2 - 415 TC200G SERIES DATA SHEET FD4P FD4P 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0494 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.57 0.66 0.57 0.65 0.74 0.65 0.73 0.82 0.78 0.86 0.95 30.00 1.01 1.09 1.16 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0181 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.69 0.76 0.69 0.76 0.84 0.77 0.84 0.91 0.89 0.96 1.03 30.00 1.00 1.08 1.15 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0445 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.94 1.03 0.94 1.02 1.11 1.02 1.09 1.18 1.14 1.22 1.30 30.00 1.35 1.43 1.50 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0179 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.73 0.80 0.74 0.81 0.88 0.82 0.89 0.95 0.95 1.01 1.08 30.00 1.03 1.10 1.18 1.31 Rev.1.01.10 2 - 416 TC200G SERIES DATA SHEET FD4P FD4P 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0494 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.67 0.76 0.62 0.70 0.79 0.70 0.78 0.87 0.89 0.97 1.06 30.00 1.10 1.13 1.21 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0179 0.09 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.39 0.47 0.33 0.42 0.50 0.41 0.50 0.58 0.59 0.68 0.77 30.00 0.72 0.75 0.83 1.02 Rev.1.01.10 2 - 417 TC200G SERIES DATA SHEET FD4P FD4P 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION SD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.360 0.341 0.38 0.395 0.376 1.00 0.453 0.434 3.00 0.641 0.620 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.310 0.344 0.401 0.585 3.00 0.208 0.241 0.295 0.472 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.238 0.271 0.38 0.205 0.238 1.00 0.149 0.181 3.00 -0.032 -0.001 1.00 0.327 0.293 0.235 0.051 3.00 0.506 0.470 0.411 0.219 CONDITION SD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.295 0.314 0.38 0.260 0.280 1.00 0.202 0.222 3.00 0.014 0.035 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.418 0.385 0.38 0.452 0.419 1.00 0.508 0.475 3.00 0.688 0.657 1.00 0.329 0.363 0.420 0.605 3.00 0.148 0.184 0.243 0.436 1.00 0.346 0.312 0.255 0.071 3.00 0.447 0.415 0.360 0.185 Rev.1.01.10 2 - 418 TC200G SERIES DATA SHEET FD4P FD4P 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION ~D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.161 0.127 0.38 0.194 0.161 1.00 0.250 0.218 3.00 0.430 0.400 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.072 0.106 0.163 0.349 3.00 -0.109 -0.072 -0.012 0.185 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.494 0.527 0.38 0.461 0.494 1.00 0.407 0.439 3.00 0.232 0.261 CONDITION ~D WAVE_FORM 1.00 0.583 0.549 0.493 0.311 3.00 0.763 0.727 0.666 0.471 Rev.1.01.10 2 - 419 TC200G SERIES DATA SHEET FD4P FD4P 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION SD WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.760 Rev.1.01.10 2 - 420 TC200G SERIES DATA SHEET FD4SF CELL NAME FD4SF FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock with PRESET FD4SF CELL COUNT GATE 12 I/O 0 1/13 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CPCP SI SI AA BB SD FD4SF SD QQ QN QN TRUTH TABLE INPUT OUTPUT SD D SI A B CP Qn+1 QNn+1 SOn+1 XXXXL X X X SOn L X X L H X* H L H H X L HH L L H L H XH HH L H L H H L X L H Up L H L H H X L H Up H L H H X X L H Dn Qn QNn Qn *:Consider the HOLD Time of PRESET SO SO Verilog-HDL DESCRIPTION FD4SF inst(Q,QN,SO,D,CP,SD,SI,A,B); VHDL DESCRIPTION inst:FD4SF port map(Q,QN,SO,D,CP,SD,SI, A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP SD SI A B (LU) LOAD 0.99 2.23 0.92 2.10 2.02 OUTPUT DRIVE PIN NAME DRIVE Q 46.0 QN 44.0 (LU) SO 43.8 Rev.1.01.10 2 - 421 TC200G SERIES DATA SHEET FD4SF FD4SF 2/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.64 0.81 0.53 0.67 0.84 0.59 0.73 0.90 0.76 0.90 1.07 30.00 1.49 1.52 1.59 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.75 0.86 0.68 0.78 0.89 0.74 0.84 0.95 0.87 0.97 1.08 30.00 1.28 1.32 1.37 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.57 0.74 0.52 0.66 0.83 0.64 0.78 0.95 0.76 0.90 1.07 30.00 1.42 1.51 1.64 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.55 0.66 0.54 0.63 0.74 0.64 0.74 0.85 0.83 0.93 1.04 30.00 1.08 1.17 1.27 1.46 Rev.1.01.10 2 - 422 TC200G SERIES DATA SHEET FD4SF FD4SF 3/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0964 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.61 0.78 0.56 0.70 0.87 0.69 0.83 1.00 0.81 0.95 1.12 30.00 1.45 1.54 1.67 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0351 0.10 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.61 0.72 0.58 0.69 0.81 0.69 0.80 0.91 0.87 0.98 1.10 30.00 1.15 1.23 1.34 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0959 0.11 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.70 0.84 1.01 0.78 0.92 1.09 0.88 1.03 1.20 1.07 1.22 1.39 30.00 1.68 1.76 1.87 2.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0392 0.19 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.70 0.82 0.68 0.79 0.91 0.81 0.92 1.04 0.93 1.04 1.16 30.00 1.27 1.36 1.49 1.61 Rev.1.01.10 2 - 423 TC200G SERIES DATA SHEET FD4SF FD4SF 4/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.44 0.61 0.40 0.54 0.70 0.50 0.64 0.81 0.61 0.75 0.92 30.00 1.28 1.37 1.48 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.38 0.49 0.36 0.45 0.56 0.42 0.52 0.63 0.52 0.62 0.74 30.00 0.91 0.98 1.05 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0964 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.64 0.81 0.58 0.72 0.89 0.65 0.80 0.97 0.78 0.93 1.10 30.00 1.48 1.56 1.64 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0351 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.71 0.83 0.68 0.79 0.91 0.76 0.86 0.98 0.88 0.99 1.10 30.00 1.25 1.33 1.41 1.53 Rev.1.01.10 2 - 424 TC200G SERIES DATA SHEET FD4SF FD4SF 5/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0959 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.96 1.14 1.33 1.04 1.21 1.41 1.11 1.29 1.48 1.23 1.41 1.60 30.00 2.03 2.11 2.18 2.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0392 0.19 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.90 1.05 0.84 0.98 1.13 0.91 1.06 1.21 1.04 1.19 1.33 30.00 1.55 1.63 1.71 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.06 1.19 1.37 1.13 1.27 1.44 1.21 1.35 1.52 1.34 1.48 1.65 30.00 2.05 2.13 2.20 2.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.29 1.39 1.50 1.37 1.47 1.58 1.44 1.54 1.65 1.56 1.66 1.77 30.00 1.92 2.00 2.07 2.19 Rev.1.01.10 2 - 425 TC200G SERIES DATA SHEET FD4SF FD4SF 6/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0964 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.85 1.00 1.16 0.88 1.02 1.19 0.95 1.10 1.26 1.17 1.31 1.48 30.00 1.83 1.86 1.93 2.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0392 0.19 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.60 0.76 0.46 0.63 0.79 0.54 0.71 0.86 0.74 0.92 1.08 30.00 1.27 1.30 1.38 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION SD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.93 1.10 0.82 0.96 1.13 0.89 1.03 1.20 1.10 1.24 1.41 30.00 1.78 1.81 1.88 2.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0964 0.10 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.58 0.75 0.48 0.62 0.79 0.55 0.69 0.86 0.68 0.83 1.00 30.00 1.42 1.46 1.53 1.67 Rev.1.01.10 2 - 426 TC200G SERIES DATA SHEET FD4SF FD4SF 7/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0351 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.59 0.70 0.48 0.59 0.71 0.53 0.64 0.76 0.66 0.79 0.91 30.00 1.13 1.13 1.18 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0959 0.11 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.82 0.99 0.68 0.83 1.00 0.73 0.88 1.05 0.89 1.03 1.20 30.00 1.66 1.66 1.71 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0392 0.19 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.67 0.79 0.60 0.71 0.83 0.67 0.78 0.90 0.81 0.92 1.04 30.00 1.24 1.28 1.35 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.49 0.66 0.39 0.53 0.70 0.44 0.58 0.75 0.52 0.66 0.83 30.00 1.35 1.38 1.43 1.51 Rev.1.01.10 2 - 427 TC200G SERIES DATA SHEET FD4SF FD4SF 8/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.47 0.58 0.38 0.48 0.58 0.43 0.53 0.64 0.55 0.65 0.76 30.00 1.00 1.01 1.06 1.19 Rev.1.01.10 2 - 428 TC200G SERIES DATA SHEET FD4SF FD4SF 9/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION SD&~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.360 0.341 0.38 0.395 0.376 1.00 0.453 0.434 3.00 0.641 0.620 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.310 0.344 0.401 0.585 3.00 0.208 0.241 0.295 0.472 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.238 0.271 0.38 0.205 0.238 1.00 0.149 0.181 3.00 -0.032 -0.001 1.00 0.327 0.293 0.235 0.051 3.00 0.506 0.470 0.411 0.219 CONDITION SD&~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.295 0.314 0.38 0.260 0.280 1.00 0.202 0.222 3.00 0.014 0.035 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.418 0.385 0.38 0.452 0.419 1.00 0.508 0.475 3.00 0.688 0.657 1.00 0.329 0.363 0.420 0.605 3.00 0.148 0.184 0.243 0.436 1.00 0.346 0.312 0.255 0.071 3.00 0.447 0.415 0.360 0.185 Rev.1.01.10 2 - 429 TC200G SERIES DATA SHEET FD4SF FD4SF 10/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION SD&~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.399 0.407 0.38 0.432 0.446 1.00 0.488 0.511 3.00 0.667 0.722 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.420 0.469 0.551 0.815 3.00 0.464 0.544 0.679 1.114 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.165 0.124 0.38 0.140 0.094 1.00 0.097 0.045 3.00 -0.041 -0.114 1.00 0.054 0.018 -0.042 -0.237 3.00 -0.171 -0.229 -0.324 -0.634 CONDITION SD&~CP WAVE_FORM SI A SI A HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.258 0.250 0.38 0.225 0.211 1.00 0.169 0.145 3.00 -0.012 -0.067 SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.502 0.543 0.38 0.530 0.575 1.00 0.578 0.629 3.00 0.732 0.801 1.00 0.613 0.651 0.714 0.916 3.00 0.839 0.895 0.988 1.290 1.00 0.236 0.187 0.105 -0.159 3.00 0.193 0.112 -0.023 -0.458 Rev.1.01.10 2 - 430 TC200G SERIES DATA SHEET FD4SF FD4SF 11/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION ~D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.161 0.127 0.38 0.193 0.160 1.00 0.248 0.216 3.00 0.425 0.394 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.072 0.105 0.162 0.343 3.00 -0.109 -0.073 -0.013 0.179 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.494 0.527 0.38 0.461 0.494 1.00 0.407 0.439 3.00 0.232 0.262 CONDITION ~D&~A WAVE_FORM 1.00 0.583 0.550 0.494 0.313 3.00 0.763 0.728 0.669 0.477 Rev.1.01.10 2 - 431 TC200G SERIES DATA SHEET FD4SF FD4SF 12/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION SD WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.890 MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM SI POSLIMIT CONDITION SD WAVE_FORM tw(H) B SO POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 432 TC200G SERIES DATA SHEET FD4SF FD4SF 13/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM SI POSLIMIT CONDITION SD WAVE_FORM tw(H) A Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 433 TC200G SERIES DATA SHEET FD4SFP CELL NAME FD4SFP FUNCTION D-TYPE FLIP FLOP with Independent two-phase SCAN clock with PRESET FD4SFP CELL COUNT GATE 13 I/O 0 1/13 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CPCP SI SI AA BB SD FD4SFP SD QQ QN QN TRUTH TABLE INPUT OUTPUT SD D SI A B CP Qn+1 QNn+1 SOn+1 XXXXL X X X SOn L X X L H X* H L H H X L HH L L H L H XH HH L H L H H L X L H Up L H L H H X L H Up H L H H X X L H Dn Qn QNn Qn *:Consider the HOLD Time of PRESET SO SO Verilog-HDL DESCRIPTION FD4SFP inst(Q,QN,SO,D,CP,SD,SI,A, B); VHDL DESCRIPTION inst:FD4SFP port map(Q,QN,SO,D,CP,SD,SI, A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN,SO 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,CP SD SI A B (LU) LOAD 0.99 2.23 0.92 2.08 2.03 OUTPUT DRIVE PIN NAME DRIVE Q 82.5 QN 87.9 (LU) SO 43.8 Rev.1.01.10 2 - 434 TC200G SERIES DATA SHEET FD4SFP FD4SFP 2/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.63 0.80 0.52 0.66 0.84 0.59 0.73 0.90 0.76 0.90 1.07 30.00 1.49 1.52 1.59 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION A->SO B&~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.75 0.86 0.68 0.78 0.89 0.74 0.84 0.95 0.87 0.97 1.08 30.00 1.28 1.31 1.37 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.57 0.74 0.52 0.66 0.83 0.64 0.78 0.95 0.76 0.90 1.07 30.00 1.42 1.51 1.64 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION A->SO B&A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.55 0.66 0.54 0.63 0.74 0.64 0.74 0.85 0.83 0.93 1.04 30.00 1.08 1.17 1.27 1.46 Rev.1.01.10 2 - 435 TC200G SERIES DATA SHEET FD4SFP FD4SFP 3/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0548 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.56 0.66 0.56 0.65 0.74 0.70 0.78 0.88 0.82 0.90 1.00 30.00 1.03 1.12 1.25 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0188 0.11 PATH CONDITION PATH CONDITION A->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.58 0.65 0.59 0.66 0.73 0.69 0.77 0.84 0.88 0.95 1.03 30.00 0.90 0.98 1.09 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0482 0.09 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.77 0.85 0.94 0.85 0.93 1.02 0.96 1.04 1.13 1.14 1.22 1.31 30.00 1.28 1.36 1.47 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0198 0.24 PATH CONDITION PATH CONDITION A->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.73 0.80 0.75 0.82 0.89 0.89 0.96 1.03 1.01 1.08 1.15 30.00 1.04 1.13 1.26 1.38 Rev.1.01.10 2 - 436 TC200G SERIES DATA SHEET FD4SFP FD4SFP 4/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.44 0.61 0.40 0.54 0.70 0.50 0.64 0.81 0.61 0.75 0.92 30.00 1.28 1.37 1.48 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION B->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.38 0.49 0.36 0.45 0.56 0.42 0.52 0.63 0.52 0.62 0.74 30.00 0.91 0.98 1.05 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0548 0.08 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.58 0.67 0.57 0.66 0.75 0.65 0.74 0.83 0.78 0.87 0.96 30.00 1.05 1.13 1.20 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0188 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.68 0.76 0.69 0.76 0.83 0.76 0.84 0.91 0.88 0.96 1.03 30.00 1.00 1.08 1.15 1.28 Rev.1.01.10 2 - 437 TC200G SERIES DATA SHEET FD4SFP FD4SFP 5/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0482 0.09 PATH DELAY (ns) 1.00 5.00 10.00 1.03 1.12 1.23 1.10 1.20 1.31 1.18 1.27 1.38 1.30 1.40 1.50 30.00 1.60 1.68 1.76 1.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0198 0.24 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.92 1.01 0.90 1.00 1.09 0.98 1.07 1.17 1.10 1.20 1.29 30.00 1.29 1.37 1.45 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.18 1.32 1.49 1.26 1.40 1.57 1.33 1.47 1.64 1.46 1.60 1.77 30.00 2.17 2.25 2.33 2.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH CONDITION PATH CONDITION CP->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.41 1.51 1.62 1.49 1.59 1.70 1.56 1.66 1.77 1.68 1.78 1.89 30.00 2.04 2.12 2.19 2.31 Rev.1.01.10 2 - 438 TC200G SERIES DATA SHEET FD4SFP FD4SFP 6/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0548 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.92 1.01 1.10 0.95 1.04 1.13 1.02 1.10 1.20 1.24 1.33 1.42 30.00 1.47 1.51 1.57 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0198 0.24 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.52 0.63 0.44 0.55 0.65 0.52 0.63 0.73 0.73 0.85 0.95 30.00 0.93 0.95 1.03 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION SD->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.84 0.98 1.15 0.87 1.01 1.18 0.94 1.08 1.25 1.15 1.29 1.47 30.00 1.83 1.86 1.93 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0548 0.08 PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.53 0.62 0.48 0.57 0.66 0.56 0.65 0.74 0.71 0.80 0.89 30.00 1.00 1.04 1.11 1.27 Rev.1.01.10 2 - 439 TC200G SERIES DATA SHEET FD4SFP FD4SFP 7/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0188 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.56 0.63 0.49 0.56 0.64 0.54 0.61 0.68 0.68 0.76 0.84 30.00 0.88 0.88 0.93 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0482 0.09 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.83 0.92 0.75 0.83 0.92 0.80 0.88 0.97 0.98 1.06 1.15 30.00 1.26 1.26 1.31 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0198 0.24 PATH CONDITION PATH CONDITION SI->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.70 0.77 0.67 0.74 0.81 0.75 0.82 0.89 0.91 0.98 1.05 30.00 1.01 1.05 1.13 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.1006 0.17 PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.49 0.66 0.39 0.53 0.70 0.44 0.58 0.75 0.52 0.66 0.83 30.00 1.35 1.38 1.43 1.51 Rev.1.01.10 2 - 440 TC200G SERIES DATA SHEET FD4SFP FD4SFP 8/13 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SI->SO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) SO 0.0363 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.47 0.58 0.38 0.48 0.59 0.43 0.53 0.64 0.55 0.65 0.76 30.00 1.00 1.01 1.06 1.19 Rev.1.01.10 2 - 441 TC200G SERIES DATA SHEET FD4SFP FD4SFP 9/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION SD&~A WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.360 0.341 0.38 0.395 0.376 1.00 0.453 0.434 3.00 0.641 0.620 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.310 0.344 0.401 0.585 3.00 0.208 0.241 0.295 0.472 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.238 0.271 0.38 0.205 0.238 1.00 0.149 0.181 3.00 -0.032 -0.001 1.00 0.327 0.293 0.235 0.051 3.00 0.506 0.470 0.411 0.219 CONDITION SD&~A WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.295 0.314 0.38 0.260 0.280 1.00 0.202 0.222 3.00 0.014 0.035 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.418 0.385 0.38 0.452 0.419 1.00 0.508 0.475 3.00 0.688 0.657 1.00 0.329 0.363 0.420 0.605 3.00 0.148 0.184 0.243 0.436 1.00 0.346 0.312 0.255 0.071 3.00 0.447 0.415 0.360 0.185 Rev.1.01.10 2 - 442 TC200G SERIES DATA SHEET FD4SFP FD4SFP 10/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE CLOCK A DATA HIGH HIGH SI A SI A CONDITION SD&~CP WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.399 0.407 0.38 0.432 0.446 1.00 0.488 0.511 3.00 0.667 0.722 TIMING CONDITION DATA SI ITEM SETUP HOLD CLOCK NEGEDGE NEGEDGE 1.00 0.420 0.469 0.551 0.815 3.00 0.464 0.544 0.679 1.114 CLOCK A DATA LOW LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.165 0.124 0.38 0.140 0.094 1.00 0.097 0.045 3.00 -0.041 -0.114 1.00 0.054 0.018 -0.042 -0.237 3.00 -0.171 -0.229 -0.324 -0.634 CONDITION SD&~CP WAVE_FORM SI A SI A HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.258 0.250 0.38 0.225 0.211 1.00 0.169 0.145 3.00 -0.012 -0.067 SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.502 0.543 0.38 0.530 0.575 1.00 0.578 0.629 3.00 0.732 0.801 1.00 0.613 0.651 0.714 0.916 3.00 0.839 0.895 0.988 1.290 1.00 0.236 0.187 0.105 -0.159 3.00 0.193 0.112 -0.023 -0.458 Rev.1.01.10 2 - 443 TC200G SERIES DATA SHEET FD4SFP FD4SFP 11/13 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION ~D&~A WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.161 0.127 0.38 0.193 0.160 1.00 0.248 0.216 3.00 0.425 0.394 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.072 0.105 0.162 0.343 3.00 -0.109 -0.073 -0.013 0.179 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.494 0.527 0.38 0.461 0.494 1.00 0.407 0.439 3.00 0.232 0.262 CONDITION ~D&~A WAVE_FORM 1.00 0.583 0.550 0.494 0.313 3.00 0.763 0.728 0.669 0.477 Rev.1.01.10 2 - 444 TC200G SERIES DATA SHEET FD4SFP FD4SFP 12/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION SD WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.890 MINIMUM PULSE WIDTH CONDITION CLOCK B ITEM SI POSLIMIT CONDITION SD WAVE_FORM tw(H) B SO POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 445 TC200G SERIES DATA SHEET FD4SFP FD4SFP 13/13 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK A ITEM SI POSLIMIT CONDITION SD WAVE_FORM tw(H) A Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 446 TC200G SERIES DATA SHEET FD4S CELL NAME FD4S FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock with PRESET FD4S CELL COUNT GATE 10 I/O 0 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CP CK TI TI TE TE SD FD4S PR QQ QNQN TRUTH TABLE INPUT OUTPUT SD D TI TE CP Qn+1 QNn+1 L X X X X* H L H L X L Up L H H H X L Up H L H X L H Up L H H X H H Up H L H X X X Dn Qn QNn *:Consider the HOLD Time of PRESET Verilog-HDL DESCRIPTION FD4S inst(Q,QN,D,CP,SD,TI,TE); VHDL DESCRIPTION inst:FD4S port map(Q,QN,D,CP,SD,TI,TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,TI CP SD TE (LU) LOAD 0.99 0.98 2.23 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 46.1 QN 46.0 Rev.1.01.10 2 - 447 TC200G SERIES DATA SHEET FD4S FD4S 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0964 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.65 0.83 0.59 0.73 0.90 0.67 0.82 0.99 0.83 0.97 1.14 30.00 1.50 1.57 1.66 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0349 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.71 0.83 0.68 0.79 0.91 0.76 0.87 0.99 0.91 1.02 1.14 30.00 1.25 1.33 1.41 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0960 0.10 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.93 1.10 0.87 1.01 1.18 0.95 1.09 1.26 1.10 1.24 1.41 30.00 1.77 1.85 1.93 2.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0360 0.08 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.73 0.84 0.71 0.81 0.92 0.79 0.89 1.00 0.94 1.05 1.16 30.00 1.27 1.35 1.43 1.59 Rev.1.01.10 2 - 448 TC200G SERIES DATA SHEET FD4S FD4S 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0964 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.68 0.85 0.57 0.71 0.88 0.64 0.79 0.95 0.82 0.96 1.12 30.00 1.51 1.54 1.62 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0360 0.08 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.44 0.56 0.33 0.47 0.59 0.41 0.54 0.67 0.58 0.72 0.85 30.00 1.01 1.03 1.11 1.29 Rev.1.01.10 2 - 449 TC200G SERIES DATA SHEET FD4S FD4S 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION SD&~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.425 0.405 0.38 0.470 0.448 1.00 0.544 0.521 3.00 0.782 0.757 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.369 0.412 0.484 0.714 3.00 0.256 0.296 0.362 0.577 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.062 0.097 0.38 0.023 0.058 1.00 -0.041 -0.006 3.00 -0.249 -0.216 1.00 0.157 0.117 0.052 -0.160 3.00 0.348 0.308 0.240 0.020 CONDITION SD&~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.231 0.252 0.38 0.186 0.208 1.00 0.113 0.135 3.00 -0.126 -0.100 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.595 0.559 0.38 0.633 0.598 1.00 0.698 0.663 3.00 0.905 0.872 1.00 0.499 0.539 0.604 0.816 3.00 0.307 0.347 0.416 0.635 1.00 0.287 0.244 0.173 -0.058 3.00 0.401 0.361 0.295 0.079 Rev.1.01.10 2 - 450 TC200G SERIES DATA SHEET FD4S FD4S 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION SD&(~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.467 0.446 0.38 0.518 0.496 1.00 0.602 0.580 3.00 0.876 0.850 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.411 0.460 0.542 0.808 3.00 0.297 0.343 0.421 0.671 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.190 0.211 0.38 0.139 0.161 1.00 0.054 0.077 3.00 -0.220 -0.195 1.00 0.246 0.197 0.114 -0.152 3.00 0.360 0.314 0.236 -0.015 CONDITION SD&TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.073 -0.040 0.38 -0.096 -0.063 1.00 -0.135 -0.102 3.00 -0.261 -0.229 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.501 0.479 0.38 0.538 0.516 1.00 0.602 0.579 3.00 0.806 0.782 1.00 0.443 0.480 0.542 0.742 3.00 0.326 0.362 0.421 0.613 1.00 0.016 -0.008 -0.048 -0.176 3.00 0.195 0.171 0.130 -0.004 Rev.1.01.10 2 - 451 TC200G SERIES DATA SHEET FD4S FD4S 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION SD&TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.723 0.689 0.38 0.746 0.712 1.00 0.785 0.752 3.00 0.911 0.879 TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE 1.00 0.632 0.655 0.695 0.824 3.00 0.447 0.472 0.513 0.647 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.154 0.176 0.38 0.116 0.139 1.00 0.054 0.076 3.00 -0.149 -0.126 1.00 0.213 0.176 0.114 -0.085 3.00 0.331 0.296 0.236 0.044 CONDITION (~TE&~D TE&~TI) WAVE_FORM SD CP Q HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.156 0.119 0.38 0.189 0.152 1.00 0.243 0.207 3.00 0.418 0.384 1.00 0.057 0.091 0.147 0.327 3.00 -0.143 -0.107 -0.048 0.144 Rev.1.01.10 2 - 452 TC200G SERIES DATA SHEET FD4S FD4S 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE CLOCK CP DATA LOW SD CP Q CONDITION (~TE&~D TE&~TI) WAVE_FORM HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.500 0.537 0.38 0.468 0.504 1.00 0.413 0.449 3.00 0.237 0.271 1.00 0.600 0.566 0.510 0.328 3.00 0.800 0.764 0.705 0.513 Rev.1.01.10 2 - 453 TC200G SERIES DATA SHEET FD4S FD4S 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION SD WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.810 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.760 Rev.1.01.10 2 - 454 TC200G SERIES DATA SHEET FD4SP CELL NAME FD4SP FUNCTION D-TYPE FLIP FLOP with common single-phase SCAN clock with PRESET FD4SP CELL COUNT GATE 11 I/O 0 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL DD CP CK TI TI TE TE SD FD4SP PR QQ QNQN TRUTH TABLE INPUT OUTPUT SD D TI TE CP Qn+1 QNn+1 L X X X X* H L H L X L Up L H H H X L Up H L H X L H Up L H H X H H Up H L H X X X Dn Qn QNn *:Consider the HOLD Time of PRESET Verilog-HDL DESCRIPTION FD4SP inst(Q,QN,D,CP,SD,TI,TE); VHDL DESCRIPTION inst:FD4SP port map(Q,QN,D,CP,SD,TI,TE); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,TI CP SD TE (LU) LOAD 0.99 0.98 2.23 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 89.8 QN 97.3 Rev.1.01.10 2 - 455 TC200G SERIES DATA SHEET FD4SP FD4SP 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0494 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.59 0.68 0.59 0.67 0.76 0.67 0.75 0.84 0.83 0.91 1.00 30.00 1.02 1.10 1.18 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0181 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.68 0.75 0.69 0.76 0.83 0.77 0.84 0.91 0.92 0.99 1.06 30.00 1.00 1.08 1.15 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0445 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.94 1.02 0.94 1.02 1.10 1.02 1.10 1.18 1.17 1.25 1.33 30.00 1.35 1.43 1.51 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0179 0.09 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.75 0.81 0.76 0.83 0.89 0.84 0.91 0.97 1.00 1.07 1.13 30.00 1.04 1.12 1.20 1.36 Rev.1.01.10 2 - 456 TC200G SERIES DATA SHEET FD4SP FD4SP 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0494 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.67 0.76 0.62 0.70 0.79 0.70 0.78 0.87 0.89 0.97 1.06 30.00 1.10 1.13 1.21 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0179 0.09 PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.39 0.47 0.33 0.42 0.50 0.41 0.50 0.58 0.58 0.68 0.77 30.00 0.72 0.75 0.83 1.02 Rev.1.01.10 2 - 457 TC200G SERIES DATA SHEET FD4SP FD4SP 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION SD&~TE WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.425 0.405 0.38 0.470 0.448 1.00 0.544 0.521 3.00 0.782 0.757 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.369 0.412 0.484 0.714 3.00 0.256 0.296 0.362 0.577 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.062 0.097 0.38 0.023 0.058 1.00 -0.041 -0.006 3.00 -0.249 -0.216 1.00 0.157 0.117 0.052 -0.160 3.00 0.348 0.308 0.240 0.020 CONDITION SD&~TE WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.231 0.252 0.38 0.186 0.208 1.00 0.113 0.135 3.00 -0.126 -0.100 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.595 0.559 0.38 0.633 0.598 1.00 0.698 0.663 3.00 0.905 0.872 1.00 0.499 0.539 0.604 0.816 3.00 0.307 0.347 0.416 0.635 1.00 0.287 0.244 0.173 -0.058 3.00 0.401 0.361 0.295 0.079 Rev.1.01.10 2 - 458 TC200G SERIES DATA SHEET FD4SP FD4SP 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TE ITEM SETUP CLOCK POSEDGE CLOCK CP DATA DCARE TE CP Q TE CP Q CONDITION SD&(~D&TI D&~TI) WAVE_FORM HOLD POSEDGE DCARE SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.467 0.446 0.38 0.518 0.496 1.00 0.602 0.580 3.00 0.876 0.850 TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE 1.00 0.411 0.460 0.542 0.808 3.00 0.297 0.343 0.421 0.671 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.190 0.211 0.38 0.139 0.161 1.00 0.054 0.077 3.00 -0.220 -0.195 1.00 0.246 0.197 0.114 -0.152 3.00 0.360 0.314 0.236 -0.015 CONDITION SD&TE WAVE_FORM TI CP Q TI CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.073 -0.040 0.38 -0.096 -0.063 1.00 -0.135 -0.102 3.00 -0.261 -0.229 HIGH HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.501 0.479 0.38 0.538 0.516 1.00 0.602 0.579 3.00 0.806 0.782 1.00 0.443 0.480 0.542 0.742 3.00 0.326 0.362 0.421 0.613 1.00 0.016 -0.008 -0.048 -0.176 3.00 0.195 0.171 0.130 -0.004 Rev.1.01.10 2 - 459 TC200G SERIES DATA SHEET FD4SP FD4SP 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA TI ITEM SETUP CLOCK POSEDGE CLOCK CP DATA LOW TI CP Q TI CP Q CONDITION SD&TE WAVE_FORM HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.723 0.689 0.38 0.746 0.712 1.00 0.785 0.752 3.00 0.911 0.879 TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE 1.00 0.632 0.655 0.695 0.824 3.00 0.447 0.472 0.513 0.647 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.154 0.176 0.38 0.116 0.139 1.00 0.054 0.076 3.00 -0.149 -0.126 1.00 0.213 0.176 0.114 -0.085 3.00 0.331 0.296 0.236 0.044 CONDITION (~TE&~D TE&~TI) WAVE_FORM SD CP Q HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.156 0.119 0.38 0.189 0.152 1.00 0.243 0.207 3.00 0.418 0.384 1.00 0.057 0.091 0.147 0.327 3.00 -0.143 -0.107 -0.048 0.144 Rev.1.01.10 2 - 460 TC200G SERIES DATA SHEET FD4SP FD4SP 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE CLOCK CP DATA LOW SD CP Q CONDITION (~TE&~D TE&~TI) WAVE_FORM HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.500 0.537 0.38 0.468 0.504 1.00 0.413 0.449 3.00 0.237 0.271 1.00 0.600 0.566 0.510 0.328 3.00 0.800 0.764 0.705 0.513 Rev.1.01.10 2 - 461 TC200G SERIES DATA SHEET FD4SP FD4SP 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION SD WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.810 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.760 Rev.1.01.10 2 - 462 TC200G SERIES DATA SHEET FJK1 CELL NAME FJK1 FUNCTION J-K FLIP FLOP 9 LOGIC SYMBOL TRUTH TABLE INPUT J K L L L H H L H H X X 0 FJK1 CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. FJK1 JJ CP CK KK QNQN QQ CP Up Up Up Up Dn OUTPUT Qn+1 QNn+1 Qn QNn L H H L QNn Qn Qn QNn Verilog-HDL DESCRIPTION FJK1 inst(Q,QN,J,K,CP); VHDL DESCRIPTION inst:FJK1 port map(Q,QN,J,K,CP); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME J K CP (LU) LOAD 0.98 1.00 1.01 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 42.2 QN 50.0 Rev.1.01.10 2 - 463 TC200G SERIES DATA SHEET FJK1 FJK1 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0982 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.66 0.84 0.57 0.74 0.92 0.65 0.81 1.00 0.78 0.95 1.13 30.00 1.54 1.62 1.70 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0417 0.18 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.44 0.52 0.60 0.74 5.00 0.59 0.67 0.75 0.90 FUNCTION FALL 10.00 0.74 0.82 0.90 1.05 30.00 1.27 1.35 1.43 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0858 0.12 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.72 0.88 0.66 0.80 0.95 0.74 0.88 1.04 0.89 1.02 1.18 30.00 1.49 1.57 1.65 1.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0345 0.11 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.75 0.87 0.71 0.83 0.94 0.79 0.90 1.02 0.92 1.04 1.16 30.00 1.29 1.37 1.45 1.58 Rev.1.01.10 2 - 464 TC200G SERIES DATA SHEET FJK1 FJK1 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA J ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP CONDITION --WAVE_FORM Don't Care Stable Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.549 0.514 0.38 0.585 0.550 1.00 0.645 0.611 3.00 0.840 0.806 TIMING CONDITION DATA K ITEM SETUP HOLD CLOCK POSEDGE POSEDGE 1.00 0.456 0.492 0.553 0.749 3.00 0.267 0.304 0.366 0.565 CLOCK CP DATA DCARE DCARE HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.109 0.143 0.38 0.072 0.107 1.00 0.011 0.046 3.00 -0.185 -0.151 1.00 0.202 0.165 0.104 -0.094 3.00 0.390 0.353 0.290 0.090 CONDITION --WAVE_FORM J,K CP J,K CP Stable Don't Care Don't Care Stable SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.483 0.465 0.38 0.537 0.519 1.00 0.629 0.609 3.00 0.923 0.900 1.00 0.435 0.488 0.576 0.863 3.00 0.337 0.387 0.471 0.741 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.171 0.190 0.38 0.117 0.136 1.00 0.026 0.046 3.00 -0.267 -0.244 1.00 0.220 0.168 0.079 -0.207 3.00 0.319 0.269 0.185 -0.085 Rev.1.01.10 2 - 465 TC200G SERIES DATA SHEET FJK1 FJK1 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT CP NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM tw(H) tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 Rev.1.01.10 2 - 466 TC200G SERIES DATA SHEET FJK1P CELL NAME FJK1P FUNCTION J-K FLIP FLOP 10 LOGIC SYMBOL TRUTH TABLE INPUT J K L L L H H L H H X X 0 FJK1P CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. FJK1P JJ CP CK KK QNQN QQ CP Up Up Up Up Dn OUTPUT Qn+1 QNn+1 Qn QNn L H H L QNn Qn Qn QNn Verilog-HDL DESCRIPTION FJK1P inst(Q,QN,J,K,CP); VHDL DESCRIPTION inst:FJK1P port map(Q,QN,J,K,CP); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME J K CP (LU) LOAD 0.98 1.00 1.01 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 75.2 QN 96.9 Rev.1.01.10 2 - 467 TC200G SERIES DATA SHEET FJK1P FJK1P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.57 0.68 0.56 0.65 0.75 0.64 0.73 0.83 0.77 0.87 0.97 30.00 1.06 1.14 1.21 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0253 0.16 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.43 0.51 0.59 0.74 5.00 0.53 0.61 0.69 0.84 FUNCTION FALL 10.00 0.63 0.71 0.79 0.94 30.00 0.96 1.04 1.12 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0443 0.08 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.71 0.80 0.72 0.79 0.87 0.80 0.87 0.96 0.95 1.02 1.10 30.00 1.11 1.19 1.27 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0181 0.12 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.76 0.84 0.77 0.84 0.91 0.85 0.92 0.99 0.98 1.05 1.13 30.00 1.08 1.15 1.23 1.37 Rev.1.01.10 2 - 468 TC200G SERIES DATA SHEET FJK1P FJK1P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA J ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP CONDITION --WAVE_FORM Don't Care Stable Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.549 0.514 0.38 0.585 0.550 1.00 0.645 0.611 3.00 0.840 0.806 TIMING CONDITION DATA K ITEM SETUP HOLD CLOCK POSEDGE POSEDGE 1.00 0.456 0.492 0.553 0.749 3.00 0.267 0.304 0.366 0.565 CLOCK CP DATA DCARE DCARE HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.109 0.143 0.38 0.072 0.107 1.00 0.011 0.046 3.00 -0.185 -0.151 1.00 0.202 0.165 0.104 -0.094 3.00 0.390 0.353 0.290 0.090 CONDITION --WAVE_FORM J,K CP J,K CP Stable Don't Care Don't Care Stable SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.483 0.465 0.38 0.537 0.519 1.00 0.629 0.609 3.00 0.923 0.900 1.00 0.435 0.488 0.576 0.863 3.00 0.337 0.387 0.471 0.741 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.171 0.190 0.38 0.117 0.136 1.00 0.026 0.046 3.00 -0.267 -0.244 1.00 0.220 0.168 0.079 -0.207 3.00 0.319 0.269 0.185 -0.085 Rev.1.01.10 2 - 469 TC200G SERIES DATA SHEET FJK1P FJK1P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT CP NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM tw(H) tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.770 Rev.1.01.10 2 - 470 TC200G SERIES DATA SHEET FJK2 CELL NAME FJK2 FUNCTION J-K FLIP FLOP with CLEAR 10 LOGIC SYMBOL 0 FJK2 CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. FJK2 JJ CP CK KK CL CD QNQN QQ TRUTH TABLE INPUT OUTPUT CD J K CP Qn+1 QNn+1 L X X X* L H H L L Up Qn QNn H L H Up L H H H L Up H L H H H Up QNn Qn H X X Dn Qn QNn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FJK2 inst(Q,QN,J,K,CP,CD); VHDL DESCRIPTION inst:FJK2 port map(Q,QN,J,K,CP,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME J K CP CD (LU) LOAD 0.98 0.99 1.02 2.26 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 44.8 QN 42.5 Rev.1.01.10 2 - 471 TC200G SERIES DATA SHEET FJK2 FJK2 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0399 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.64 0.79 0.49 0.65 0.80 0.55 0.71 0.86 0.74 0.91 1.06 30.00 1.29 1.30 1.36 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1001 0.11 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.64 0.65 0.71 0.91 5.00 0.78 0.79 0.85 1.05 FUNCTION RISE 10.00 0.95 0.96 1.02 1.22 30.00 1.62 1.64 1.70 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0924 0.17 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.69 0.86 0.61 0.76 0.94 0.69 0.84 1.02 0.82 0.98 1.16 30.00 1.52 1.60 1.68 1.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0399 0.17 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.57 0.72 0.51 0.65 0.80 0.59 0.73 0.88 0.73 0.88 1.03 30.00 1.22 1.30 1.38 1.53 Rev.1.01.10 2 - 472 TC200G SERIES DATA SHEET FJK2 FJK2 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1001 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.71 0.88 0.65 0.79 0.96 0.73 0.87 1.04 0.88 1.02 1.19 30.00 1.57 1.64 1.72 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0420 0.11 PATH CONDITION PATH CONDITION CP->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.68 0.76 0.84 0.98 5.00 0.81 0.88 0.96 1.10 FUNCTION FALL 10.00 0.94 1.02 1.10 1.23 30.00 1.44 1.51 1.59 1.73 Rev.1.01.10 2 - 473 TC200G SERIES DATA SHEET FJK2 FJK2 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION --WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.156 0.121 0.38 0.192 0.157 1.00 0.251 0.217 3.00 0.442 0.410 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 0.063 0.099 0.160 0.355 3.00 -0.125 -0.087 -0.024 0.179 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.500 0.535 0.38 0.465 0.499 1.00 0.405 0.439 3.00 0.213 0.246 CONDITION --WAVE_FORM 1.00 0.594 0.557 0.497 0.301 3.00 0.782 0.744 0.681 0.477 Rev.1.01.10 2 - 474 TC200G SERIES DATA SHEET FJK2 FJK2 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA J ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP CONDITION CD WAVE_FORM Don't Care Stable Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.619 0.591 0.38 0.655 0.627 1.00 0.716 0.687 3.00 0.911 0.883 TIMING CONDITION DATA K ITEM SETUP HOLD CLOCK POSEDGE POSEDGE 1.00 0.543 0.579 0.640 0.836 3.00 0.389 0.425 0.486 0.683 CLOCK CP DATA DCARE DCARE HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.038 0.066 0.38 0.002 0.030 1.00 -0.059 -0.031 3.00 -0.255 -0.227 1.00 0.113 0.077 0.016 -0.179 3.00 0.265 0.229 0.168 -0.026 CONDITION CD WAVE_FORM J,K CP J,K CP Stable Don't Care Don't Care Stable SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.525 0.496 0.38 0.583 0.555 1.00 0.680 0.652 3.00 0.993 0.966 1.00 0.449 0.507 0.605 0.919 3.00 0.297 0.356 0.454 0.771 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.159 0.38 0.073 0.101 1.00 -0.024 0.004 3.00 -0.338 -0.310 1.00 0.207 0.149 0.051 -0.264 3.00 0.360 0.302 0.203 -0.115 Rev.1.01.10 2 - 475 TC200G SERIES DATA SHEET FJK2 FJK2 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT CP NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM tw(H) 0.01 to 3.00 0.840 0.01 to 3.00 0.870 0.01 to 3.00 0.790 Rev.1.01.10 2 - 476 TC200G SERIES DATA SHEET FJK2P CELL NAME FJK2P FUNCTION J-K FLIP FLOP with CLEAR 11 LOGIC SYMBOL 0 FJK2P CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. FJK2P JJ CP CK KK CL CD QNQN QQ TRUTH TABLE INPUT OUTPUT CD J K CP Qn+1 QNn+1 L X X X* L H H L L Up Qn QNn H L H Up L H H H L Up H L H H H Up QNn Qn H X X Dn Qn QNn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION FJK2P inst(Q,QN,J,K,CP,CD); VHDL DESCRIPTION inst:FJK2P port map(Q,QN,J,K,CP,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME J K CP CD (LU) LOAD 0.98 0.99 1.02 2.31 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 74.5 QN 77.4 Rev.1.01.10 2 - 477 TC200G SERIES DATA SHEET FJK2P FJK2P 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0256 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.59 0.70 0.50 0.61 0.71 0.56 0.67 0.77 0.75 0.87 0.98 30.00 1.04 1.05 1.11 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0546 0.09 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.72 0.73 0.79 1.00 5.00 0.80 0.81 0.87 1.08 FUNCTION RISE 10.00 0.90 0.91 0.97 1.18 30.00 1.27 1.28 1.34 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0539 0.16 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.65 0.76 0.63 0.72 0.83 0.71 0.80 0.91 0.85 0.94 1.05 30.00 1.15 1.23 1.30 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0256 0.16 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.54 0.64 0.52 0.62 0.72 0.60 0.70 0.80 0.75 0.85 0.95 30.00 0.97 1.05 1.13 1.28 Rev.1.01.10 2 - 478 TC200G SERIES DATA SHEET FJK2P FJK2P 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0546 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.73 0.83 0.73 0.81 0.91 0.81 0.89 0.99 0.96 1.04 1.14 30.00 1.20 1.28 1.36 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0235 0.12 PATH CONDITION PATH CONDITION CP->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.77 0.85 0.93 1.07 5.00 0.85 0.93 1.01 1.15 FUNCTION FALL 10.00 0.94 1.02 1.09 1.23 30.00 1.23 1.31 1.39 1.53 Rev.1.01.10 2 - 479 TC200G SERIES DATA SHEET FJK2P FJK2P 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION --WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.156 0.121 0.38 0.192 0.157 1.00 0.251 0.217 3.00 0.442 0.410 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 0.063 0.099 0.160 0.355 3.00 -0.125 -0.087 -0.024 0.179 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.500 0.535 0.38 0.465 0.499 1.00 0.405 0.439 3.00 0.213 0.246 CONDITION --WAVE_FORM 1.00 0.594 0.557 0.497 0.301 3.00 0.782 0.744 0.681 0.477 Rev.1.01.10 2 - 480 TC200G SERIES DATA SHEET FJK2P FJK2P 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA J ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP CONDITION CD WAVE_FORM Don't Care Stable Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.619 0.591 0.38 0.655 0.627 1.00 0.716 0.687 3.00 0.911 0.883 TIMING CONDITION DATA K ITEM SETUP HOLD CLOCK POSEDGE POSEDGE 1.00 0.543 0.579 0.640 0.836 3.00 0.389 0.425 0.486 0.683 CLOCK CP DATA DCARE DCARE HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.038 0.066 0.38 0.002 0.030 1.00 -0.059 -0.031 3.00 -0.255 -0.227 1.00 0.113 0.077 0.016 -0.179 3.00 0.265 0.229 0.168 -0.026 CONDITION CD WAVE_FORM J,K CP J,K CP Stable Don't Care Don't Care Stable SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.525 0.496 0.38 0.583 0.555 1.00 0.680 0.652 3.00 0.993 0.966 1.00 0.449 0.507 0.605 0.919 3.00 0.297 0.356 0.454 0.771 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.131 0.159 0.38 0.073 0.101 1.00 -0.024 0.004 3.00 -0.338 -0.310 1.00 0.207 0.149 0.051 -0.264 3.00 0.360 0.302 0.203 -0.115 Rev.1.01.10 2 - 481 TC200G SERIES DATA SHEET FJK2P FJK2P 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT CP NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM tw(H) 0.01 to 3.00 0.840 0.01 to 3.00 0.870 0.01 to 3.00 0.790 Rev.1.01.10 2 - 482 TC200G SERIES DATA SHEET FJK3 CELL NAME FJK3 FUNCTION J-K FLIP FLOP with CLEAR and PRESET 11 LOGIC SYMBOL TRUTH TABLE INPUT CD SD J K CP L H X X X* H L X X X* L L X X X H H L L Up H H L H Up H H H L Up H H H H Up H H X X Dn *:Consider the HOLD Time of CLEAR or PRESET 0 FJK3 CELL COUNT GATE I/O 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. JJ CP CK KK SD FJK3 PR QQ OUTPUT Qn+1 QNn+1 L H H L L L Qn QNn L H H L QNn Qn Qn QNn QNQN CL CD Verilog-HDL DESCRIPTION FJK3 inst(Q,QN,J,K,CP,CD,SD); VHDL DESCRIPTION inst:FJK3 port map(Q,QN,J,K,CP,CD,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME J K CP CD SD (LU) LOAD 0.99 0.98 1.02 2.20 2.32 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 43.3 QN 50.0 Rev.1.01.10 2 - 483 TC200G SERIES DATA SHEET FJK3 FJK3 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0837 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.58 0.34 0.48 0.64 0.42 0.56 0.71 0.57 0.71 0.87 30.00 1.18 1.24 1.31 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0364 0.13 PATH CONDITION PATH CONDITION SD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.44 0.50 0.69 5.00 0.57 0.58 0.64 0.84 FUNCTION FALL 10.00 0.71 0.72 0.78 0.98 30.00 1.17 1.18 1.24 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0399 0.09 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.33 0.46 0.25 0.36 0.48 0.30 0.42 0.54 0.39 0.52 0.65 30.00 0.93 0.96 1.01 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0961 0.12 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.54 0.29 0.44 0.61 0.38 0.53 0.70 0.56 0.71 0.89 30.00 1.21 1.28 1.37 1.56 Rev.1.01.10 2 - 484 TC200G SERIES DATA SHEET FJK3 FJK3 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0837 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.70 0.86 0.58 0.72 0.88 0.63 0.78 0.94 0.76 0.90 1.06 30.00 1.47 1.49 1.54 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0961 0.12 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.55 0.63 0.71 0.86 5.00 0.70 0.78 0.86 1.01 FUNCTION RISE 10.00 0.87 0.95 1.03 1.18 30.00 1.55 1.62 1.71 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0399 0.09 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.78 0.90 0.74 0.86 0.98 0.82 0.93 1.06 0.96 1.08 1.20 30.00 1.38 1.45 1.53 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0837 0.13 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.91 1.05 1.21 0.99 1.13 1.28 1.07 1.21 1.36 1.21 1.35 1.51 30.00 1.80 1.88 1.96 2.10 Rev.1.01.10 2 - 485 TC200G SERIES DATA SHEET FJK3 FJK3 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0364 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.87 1.00 0.83 0.95 1.08 0.91 1.03 1.16 1.06 1.18 1.31 30.00 1.45 1.53 1.61 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0961 0.12 PATH CONDITION PATH CONDITION SD->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.69 0.70 0.76 0.97 5.00 0.84 0.85 0.91 1.11 FUNCTION RISE 10.00 1.01 1.02 1.08 1.28 30.00 1.68 1.69 1.75 1.98 Rev.1.01.10 2 - 486 TC200G SERIES DATA SHEET FJK3 FJK3 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.039 -0.077 0.38 -0.043 -0.081 1.00 -0.050 -0.089 3.00 -0.073 -0.112 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.141 -0.146 -0.153 -0.176 3.00 -0.349 -0.353 -0.360 -0.384 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.693 0.731 0.38 0.697 0.736 1.00 0.705 0.743 3.00 0.730 0.768 CONDITION SD WAVE_FORM 1.00 0.796 0.800 0.808 0.832 3.00 1.003 1.008 1.015 1.040 Rev.1.01.10 2 - 487 TC200G SERIES DATA SHEET FJK3 FJK3 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA J ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP CONDITION CD&SD WAVE_FORM Don't Care Stable Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.560 0.529 0.38 0.618 0.587 1.00 0.717 0.686 3.00 1.034 1.004 TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE 1.00 0.476 0.535 0.634 0.953 3.00 0.308 0.367 0.467 0.788 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.097 0.128 0.38 0.038 0.069 1.00 -0.061 -0.030 3.00 -0.378 -0.348 1.00 0.180 0.121 0.022 -0.297 3.00 0.348 0.289 0.189 -0.132 CONDITION CD WAVE_FORM SD CP Q HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.057 0.021 0.38 0.108 0.072 1.00 0.194 0.159 3.00 0.471 0.439 1.00 -0.040 0.012 0.100 0.384 3.00 -0.236 -0.181 -0.089 0.208 Rev.1.01.10 2 - 488 TC200G SERIES DATA SHEET FJK3 FJK3 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE CLOCK CP DATA LOW SD CP Q CONDITION CD WAVE_FORM HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.600 0.636 0.38 0.549 0.584 1.00 0.462 0.497 3.00 0.184 0.217 TIMING CONDITION DATA K ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.090 0.119 0.38 0.054 0.082 1.00 -0.007 0.022 3.00 -0.202 -0.174 Stable 1.00 0.697 0.644 0.556 0.272 3.00 0.893 0.838 0.745 0.448 CONDITION CD&SD WAVE_FORM Don't Care Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.566 0.538 0.38 0.603 0.574 1.00 0.663 0.635 3.00 0.858 0.830 1.00 0.491 0.527 0.587 0.783 3.00 0.337 0.374 0.434 0.630 1.00 0.166 0.130 0.069 -0.126 3.00 0.319 0.283 0.222 0.026 Rev.1.01.10 2 - 489 TC200G SERIES DATA SHEET FJK3 FJK3 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT CP NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION SD&CD WAVE_FORM tw(H) 0.01 to 3.00 0.740 0.01 to 3.00 0.870 0.01 to 3.00 0.800 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.850 Rev.1.01.10 2 - 490 TC200G SERIES DATA SHEET FJK3P CELL NAME FJK3P FUNCTION J-K FLIP FLOP with CLEAR and PRESET 12 LOGIC SYMBOL TRUTH TABLE INPUT CD SD J K CP L H X X X* H L X X X* L L X X X H H L L Up H H L H Up H H H L Up H H H H Up H H X X Dn *:Consider the HOLD Time of CLEAR or PRESET 0 FJK3P CELL COUNT GATE I/O 1/8 CONDITION VDD=3.3V, Ta=25C, Typ. JJ CP CK KK SD FJK3P PR QQ OUTPUT Qn+1 QNn+1 L H H L L L Qn QNn L H H L QNn Qn Qn QNn QNQN CL CD Verilog-HDL DESCRIPTION FJK3P inst(Q,QN,J,K,CP,CD,SD); VHDL DESCRIPTION inst:FJK3P port map(Q,QN,J,K,CP,CD,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME J K CP CD SD (LU) LOAD 1.00 0.98 1.01 2.35 2.09 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 82.9 QN 80.3 Rev.1.01.10 2 - 491 TC200G SERIES DATA SHEET FJK3P FJK3P 2/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0543 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.39 0.49 0.36 0.45 0.55 0.44 0.52 0.63 0.60 0.70 0.80 30.00 0.88 0.93 1.01 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0205 0.15 PATH CONDITION PATH CONDITION SD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.41 0.42 0.49 0.69 5.00 0.51 0.53 0.59 0.80 FUNCTION FALL 10.00 0.61 0.62 0.68 0.89 30.00 0.90 0.91 0.98 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0182 0.11 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.32 0.39 0.27 0.35 0.42 0.35 0.42 0.49 0.50 0.58 0.66 30.00 0.63 0.66 0.74 0.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0547 0.10 PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.32 0.42 0.28 0.37 0.47 0.35 0.43 0.53 0.48 0.57 0.67 30.00 0.79 0.84 0.91 1.05 Rev.1.01.10 2 - 492 TC200G SERIES DATA SHEET FJK3P FJK3P 3/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0543 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.78 0.88 0.71 0.80 0.91 0.78 0.87 0.98 0.96 1.06 1.16 30.00 1.27 1.30 1.36 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0547 0.10 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.54 0.62 0.70 0.85 5.00 0.63 0.71 0.79 0.94 FUNCTION RISE 10.00 0.73 0.81 0.89 1.04 30.00 1.10 1.18 1.27 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0182 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.68 0.75 0.69 0.76 0.83 0.77 0.84 0.91 0.91 0.98 1.05 30.00 1.00 1.07 1.15 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0543 0.11 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.94 1.03 1.13 1.02 1.11 1.21 1.10 1.19 1.29 1.24 1.33 1.43 30.00 1.51 1.59 1.67 1.81 Rev.1.01.10 2 - 493 TC200G SERIES DATA SHEET FJK3P FJK3P 4/8 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0205 0.15 PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.91 0.99 0.90 0.99 1.07 0.98 1.07 1.15 1.13 1.22 1.30 30.00 1.27 1.35 1.43 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0547 0.10 PATH CONDITION PATH CONDITION SD->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.77 0.78 0.84 1.07 5.00 0.86 0.87 0.93 1.15 FUNCTION RISE 10.00 0.96 0.97 1.03 1.25 30.00 1.33 1.34 1.40 1.63 Rev.1.01.10 2 - 494 TC200G SERIES DATA SHEET FJK3P FJK3P 5/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.039 -0.077 0.38 -0.043 -0.081 1.00 -0.050 -0.089 3.00 -0.073 -0.112 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.141 -0.146 -0.153 -0.176 3.00 -0.349 -0.353 -0.360 -0.384 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.693 0.731 0.38 0.697 0.736 1.00 0.705 0.743 3.00 0.730 0.768 CONDITION SD WAVE_FORM 1.00 0.796 0.800 0.808 0.832 3.00 1.003 1.008 1.015 1.040 Rev.1.01.10 2 - 495 TC200G SERIES DATA SHEET FJK3P FJK3P 6/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA J ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP CONDITION CD&SD WAVE_FORM Don't Care Stable Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.560 0.529 0.38 0.618 0.587 1.00 0.717 0.686 3.00 1.034 1.004 TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE 1.00 0.476 0.535 0.634 0.953 3.00 0.308 0.367 0.467 0.788 CLOCK CP DATA HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.097 0.128 0.38 0.038 0.069 1.00 -0.061 -0.030 3.00 -0.378 -0.348 1.00 0.180 0.121 0.022 -0.297 3.00 0.348 0.289 0.189 -0.132 CONDITION CD WAVE_FORM SD CP Q HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.057 0.021 0.38 0.108 0.072 1.00 0.194 0.159 3.00 0.471 0.439 1.00 -0.040 0.012 0.100 0.384 3.00 -0.236 -0.181 -0.089 0.208 Rev.1.01.10 2 - 496 TC200G SERIES DATA SHEET FJK3P FJK3P 7/8 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE CLOCK CP DATA LOW SD CP Q CONDITION CD WAVE_FORM HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.600 0.636 0.38 0.549 0.584 1.00 0.462 0.497 3.00 0.184 0.217 TIMING CONDITION DATA K ITEM SETUP HOLD CLOCK POSEDGE POSEDGE CLOCK CP DATA DCARE DCARE J,K CP J,K CP HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.090 0.119 0.38 0.054 0.082 1.00 -0.007 0.022 3.00 -0.202 -0.174 Stable 1.00 0.697 0.644 0.556 0.272 3.00 0.893 0.838 0.745 0.448 CONDITION CD&SD WAVE_FORM Don't Care Stable Don't Care SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.566 0.538 0.38 0.603 0.574 1.00 0.663 0.635 3.00 0.858 0.830 1.00 0.491 0.527 0.587 0.783 3.00 0.337 0.374 0.434 0.630 1.00 0.166 0.130 0.069 -0.126 3.00 0.319 0.283 0.222 0.026 Rev.1.01.10 2 - 497 TC200G SERIES DATA SHEET FJK3P FJK3P 8/8 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT CP NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION SD&CD WAVE_FORM tw(H) 0.01 to 3.00 0.740 0.01 to 3.00 0.870 0.01 to 3.00 0.800 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.850 Rev.1.01.10 2 - 498 TC200G SERIES DATA SHEET FT2 CELL NAME FT2 FUNCTION TOGGLE FLIP FLOP with CLEAR 8 LOGIC SYMBOL 0 FT2 CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT OUTPUT CD CP Qn+1 QNn+1 L X* L H H Up QNn Qn H Dn Qn QNn *:Consider the HOLD Time of CLEAR FT2 QQ CP CK CL CD QN QN Verilog-HDL DESCRIPTION FT2 inst(Q,QN,CP,CD); VHDL DESCRIPTION inst:FT2 port map(Q,QN,CP,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME CP CD (LU) LOAD 0.99 2.17 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 47.3 QN 48.8 Rev.1.01.10 2 - 499 TC200G SERIES DATA SHEET FT2 FT2 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0339 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.35 0.46 0.26 0.37 0.49 0.33 0.44 0.56 0.46 0.59 0.71 30.00 0.88 0.90 0.97 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.09 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.52 0.59 0.75 5.00 0.63 0.66 0.73 0.89 FUNCTION RISE 10.00 0.79 0.82 0.89 1.05 30.00 1.41 1.44 1.51 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0935 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.67 0.84 0.61 0.75 0.92 0.69 0.83 1.00 0.85 0.99 1.16 30.00 1.49 1.56 1.65 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0339 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.65 0.77 0.63 0.73 0.85 0.71 0.81 0.93 0.85 0.96 1.08 30.00 1.18 1.26 1.34 1.49 Rev.1.01.10 2 - 500 TC200G SERIES DATA SHEET FT2 FT2 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.70 0.83 0.98 0.78 0.91 1.06 0.86 0.99 1.14 1.01 1.13 1.29 30.00 1.59 1.67 1.75 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0356 0.10 PATH CONDITION PATH CONDITION CP->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.69 0.77 0.85 1.01 5.00 0.80 0.88 0.97 1.13 FUNCTION FALL 10.00 0.92 1.00 1.08 1.24 30.00 1.35 1.43 1.52 1.68 Rev.1.01.10 2 - 501 TC200G SERIES DATA SHEET FT2 FT2 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION --WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.027 -0.067 0.38 -0.029 -0.069 1.00 -0.033 -0.072 3.00 -0.044 -0.083 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.133 -0.135 -0.138 -0.147 3.00 -0.349 -0.350 -0.351 -0.355 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.681 0.721 0.38 0.684 0.723 1.00 0.687 0.727 3.00 0.700 0.738 CONDITION --WAVE_FORM 1.00 0.788 0.790 0.793 0.802 3.00 1.003 1.004 1.006 1.010 Rev.1.01.10 2 - 502 TC200G SERIES DATA SHEET FT2 FT2 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM tw(H) 0.01 to 3.00 0.910 0.01 to 3.00 0.930 0.01 to 3.00 0.870 Rev.1.01.10 2 - 503 TC200G SERIES DATA SHEET FT2P CELL NAME FT2P FUNCTION TOGGLE FLIP FLOP with CLEAR 9 LOGIC SYMBOL 0 FT2P CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT OUTPUT CD CP Qn+1 QNn+1 L X* L H H Up QNn Qn H Dn Qn QNn *:Consider the HOLD Time of CLEAR FT2P QQ CP CK CL CD QN QN Verilog-HDL DESCRIPTION FT2P inst(Q,QN,CP,CD); VHDL DESCRIPTION inst:FT2P port map(Q,QN,CP,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME CP CD (LU) LOAD 0.99 2.17 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 82.9 QN 97.6 Rev.1.01.10 2 - 504 TC200G SERIES DATA SHEET FT2P FT2P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0182 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.32 0.39 0.27 0.34 0.42 0.34 0.41 0.49 0.48 0.57 0.65 30.00 0.63 0.66 0.73 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.55 0.58 0.66 0.84 5.00 0.63 0.66 0.73 0.92 FUNCTION RISE 10.00 0.72 0.75 0.82 1.00 30.00 1.04 1.07 1.15 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0546 0.10 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.63 0.73 0.62 0.71 0.81 0.71 0.80 0.90 0.87 0.96 1.06 30.00 1.11 1.19 1.27 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0182 0.11 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.63 0.70 0.64 0.71 0.78 0.72 0.79 0.86 0.87 0.94 1.01 30.00 0.94 1.02 1.10 1.25 Rev.1.01.10 2 - 505 TC200G SERIES DATA SHEET FT2P FT2P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.83 0.91 0.84 0.91 0.99 0.92 0.99 1.07 1.07 1.14 1.22 30.00 1.23 1.30 1.39 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.11 PATH CONDITION PATH CONDITION CP->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.76 0.84 0.92 1.08 5.00 0.83 0.91 0.99 1.15 FUNCTION FALL 10.00 0.90 0.98 1.06 1.22 30.00 1.14 1.22 1.30 1.46 Rev.1.01.10 2 - 506 TC200G SERIES DATA SHEET FT2P FT2P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION --WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.027 -0.067 0.38 -0.029 -0.069 1.00 -0.033 -0.072 3.00 -0.044 -0.083 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.133 -0.135 -0.138 -0.147 3.00 -0.349 -0.350 -0.351 -0.355 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.681 0.721 0.38 0.684 0.723 1.00 0.687 0.727 3.00 0.700 0.738 CONDITION --WAVE_FORM 1.00 0.788 0.790 0.793 0.802 3.00 1.003 1.004 1.006 1.010 Rev.1.01.10 2 - 507 TC200G SERIES DATA SHEET FT2P FT2P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM tw(H) 0.01 to 3.00 0.910 0.01 to 3.00 0.930 0.01 to 3.00 0.870 Rev.1.01.10 2 - 508 TC200G SERIES DATA SHEET FT4 CELL NAME FT4 FUNCTION TOGGLE FLIP FLOP with PRESET 8 LOGIC SYMBOL 0 FT4 CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT OUTPUT SD CP Qn+1 QNn+1 L X* H L H Up QNn Qn H Dn Qn QNn *:Consider the HOLD Time of PRESET SD FT4 PR QQ QN QN CP CK Verilog-HDL DESCRIPTION FT4 inst(Q,QN,CP,SD); VHDL DESCRIPTION inst:FT4 port map(Q,QN,CP,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME CP SD (LU) LOAD 0.99 2.17 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 42.3 QN 51.2 Rev.1.01.10 2 - 509 TC200G SERIES DATA SHEET FT4 FT4 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1002 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.62 0.79 0.55 0.70 0.87 0.64 0.78 0.95 0.80 0.94 1.11 30.00 1.47 1.55 1.63 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0423 0.11 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.57 0.65 0.73 0.88 5.00 0.69 0.77 0.85 1.00 FUNCTION FALL 10.00 0.82 0.90 0.98 1.13 30.00 1.32 1.40 1.48 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0838 0.11 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.93 1.08 0.87 1.01 1.16 0.95 1.09 1.24 1.10 1.24 1.39 30.00 1.67 1.75 1.84 1.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0339 0.11 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.76 0.88 0.73 0.84 0.96 0.82 0.93 1.04 0.97 1.08 1.20 30.00 1.30 1.38 1.46 1.62 Rev.1.01.10 2 - 510 TC200G SERIES DATA SHEET FT4 FT4 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1002 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.77 0.94 0.66 0.80 0.97 0.73 0.87 1.04 0.93 1.07 1.24 30.00 1.62 1.64 1.72 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0339 0.11 PATH CONDITION PATH CONDITION SD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.44 0.52 0.71 5.00 0.56 0.58 0.66 0.86 FUNCTION FALL 10.00 0.69 0.71 0.79 0.99 30.00 1.13 1.15 1.22 1.43 Rev.1.01.10 2 - 511 TC200G SERIES DATA SHEET FT4 FT4 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION --WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.156 0.118 0.38 0.189 0.151 1.00 0.243 0.206 3.00 0.418 0.384 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.055 0.088 0.144 0.325 3.00 -0.150 -0.114 -0.055 0.137 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.500 0.538 0.38 0.468 0.505 1.00 0.413 0.450 3.00 0.237 0.272 CONDITION --WAVE_FORM 1.00 0.601 0.567 0.511 0.330 3.00 0.804 0.769 0.709 0.518 Rev.1.01.10 2 - 512 TC200G SERIES DATA SHEET FT4 FT4 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT SD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION SD WAVE_FORM tw(H) 0.01 to 3.00 1.120 0.01 to 3.00 0.960 0.01 to 3.00 0.920 Rev.1.01.10 2 - 513 TC200G SERIES DATA SHEET FT4P CELL NAME FT4P FUNCTION TOGGLE FLIP FLOP with PRESET 9 LOGIC SYMBOL 0 FT4P CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT OUTPUT SD CP Qn+1 QNn+1 L X* H L H Up QNn Qn H Dn Qn QNn *:Consider the HOLD Time of PRESET SD FT4P PR QQ QN QN CP CK Verilog-HDL DESCRIPTION FT4P inst(Q,QN,CP,SD); VHDL DESCRIPTION inst:FT4P port map(Q,QN,CP,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME CP SD (LU) LOAD 0.99 2.19 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 77.1 QN 95.9 Rev.1.01.10 2 - 514 TC200G SERIES DATA SHEET FT4P FT4P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0549 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.55 0.65 0.55 0.63 0.73 0.64 0.72 0.82 0.79 0.88 0.97 30.00 1.02 1.10 1.19 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0238 0.10 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.57 0.65 0.73 0.88 5.00 0.65 0.73 0.81 0.96 FUNCTION FALL 10.00 0.73 0.81 0.90 1.04 30.00 1.03 1.11 1.19 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0444 0.10 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.84 0.92 1.00 0.92 1.00 1.08 1.00 1.08 1.16 1.15 1.22 1.31 30.00 1.32 1.40 1.48 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0185 0.11 PATH CONDITION PATH CONDITION CP->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.77 0.84 0.77 0.85 0.92 0.86 0.93 1.01 1.02 1.09 1.16 30.00 1.09 1.17 1.25 1.41 Rev.1.01.10 2 - 515 TC200G SERIES DATA SHEET FT4P FT4P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0549 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.77 0.87 0.72 0.80 0.90 0.79 0.87 0.97 1.02 1.10 1.20 30.00 1.24 1.27 1.34 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0185 0.11 PATH CONDITION PATH CONDITION SD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.41 0.44 0.51 0.72 5.00 0.51 0.54 0.61 0.83 FUNCTION FALL 10.00 0.60 0.62 0.70 0.92 30.00 0.87 0.89 0.97 1.19 Rev.1.01.10 2 - 516 TC200G SERIES DATA SHEET FT4P FT4P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION --WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.156 0.118 0.38 0.189 0.151 1.00 0.243 0.206 3.00 0.418 0.384 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 0.055 0.088 0.144 0.325 3.00 -0.150 -0.114 -0.055 0.137 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.500 0.538 0.38 0.468 0.505 1.00 0.413 0.450 3.00 0.237 0.272 CONDITION --WAVE_FORM 1.00 0.601 0.567 0.511 0.330 3.00 0.804 0.769 0.709 0.518 Rev.1.01.10 2 - 517 TC200G SERIES DATA SHEET FT4P FT4P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT SD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION SD WAVE_FORM tw(H) 0.01 to 3.00 1.120 0.01 to 3.00 0.960 0.01 to 3.00 0.920 Rev.1.01.10 2 - 518 TC200G SERIES DATA SHEET HA1 CELL NAME HA1 FUNCTION HALF ADDER 5 LOGIC SYMBOL TRUTH TABLE INPUT A B L L H L L H H H HA1 AA BB COCO SS HA1 CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT S L H H L CO L L L H Verilog-HDL DESCRIPTION HA1 inst(S,CO,A,B); VHDL DESCRIPTION inst:HA1 port map(S,CO,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE S,CO 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 2.00 3.19 OUTPUT DRIVE PIN NAME DRIVE (LU) S 47.6 CO 48.7 Rev.1.01.10 2 - 519 TC200G SERIES DATA SHEET HA1 HA1 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->CO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0865 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.31 0.46 0.25 0.38 0.53 0.32 0.45 0.61 0.49 0.63 0.78 30.00 1.07 1.14 1.22 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0391 0.06 PATH CONDITION PATH CONDITION A->CO --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.20 0.24 0.29 5.00 0.27 0.30 0.34 0.41 FUNCTION FALL 10.00 0.39 0.42 0.46 0.53 30.00 0.84 0.87 0.92 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0897 0.11 PATH CONDITION PATH CONDITION A->S B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.54 0.70 0.43 0.57 0.74 0.50 0.64 0.80 0.63 0.77 0.93 30.00 1.33 1.36 1.42 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0374 0.11 PATH CONDITION PATH CONDITION A->S B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.49 0.62 0.44 0.57 0.70 0.50 0.63 0.76 0.61 0.74 0.87 30.00 1.08 1.15 1.22 1.33 Rev.1.01.10 2 - 520 TC200G SERIES DATA SHEET HA1 HA1 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0897 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.40 0.56 0.34 0.48 0.64 0.43 0.57 0.73 0.59 0.73 0.90 30.00 1.19 1.27 1.36 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0374 0.11 PATH CONDITION PATH CONDITION A->S ~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.36 0.43 0.59 5.00 0.46 0.49 0.57 0.74 FUNCTION FALL 10.00 0.60 0.63 0.70 0.88 30.00 1.06 1.09 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0865 0.09 PATH CONDITION PATH CONDITION B->CO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.30 0.45 0.23 0.36 0.51 0.29 0.42 0.57 0.39 0.53 0.68 30.00 1.05 1.11 1.17 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0391 0.06 PATH CONDITION PATH CONDITION B->CO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.32 0.43 0.24 0.35 0.46 0.30 0.41 0.53 0.42 0.54 0.66 30.00 0.89 0.92 0.98 1.12 Rev.1.01.10 2 - 521 TC200G SERIES DATA SHEET HA1 HA1 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0897 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.41 0.57 0.30 0.44 0.60 0.36 0.50 0.66 0.46 0.60 0.76 30.00 1.20 1.23 1.28 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0374 0.11 PATH CONDITION PATH CONDITION B->S A PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.30 0.41 0.53 5.00 0.35 0.42 0.53 0.65 FUNCTION FALL 10.00 0.48 0.55 0.65 0.78 30.00 0.93 1.01 1.11 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0897 0.11 PATH CONDITION PATH CONDITION B->S ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.49 0.27 0.41 0.57 0.34 0.48 0.64 0.45 0.59 0.75 30.00 1.12 1.20 1.27 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0374 0.11 PATH CONDITION PATH CONDITION B->S ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.34 0.47 0.25 0.37 0.50 0.31 0.44 0.56 0.45 0.58 0.71 30.00 0.92 0.95 1.02 1.17 Rev.1.01.10 2 - 522 TC200G SERIES DATA SHEET HA1P CELL NAME HA1P FUNCTION HALF ADDER 6 LOGIC SYMBOL TRUTH TABLE INPUT A B L L H L L H H H HA1P AA BB COCO SS HA1P CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT S L H H L CO L L L H Verilog-HDL DESCRIPTION HA1P inst(S,CO,A,B); VHDL DESCRIPTION inst:HA1P port map(S,CO,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE S,CO 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 1.98 3.19 OUTPUT DRIVE PIN NAME DRIVE (LU) S 94.8 CO 99.6 Rev.1.01.10 2 - 523 TC200G SERIES DATA SHEET HA1P HA1P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->CO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0442 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.24 0.32 0.24 0.32 0.40 0.33 0.40 0.49 0.52 0.59 0.67 30.00 0.63 0.71 0.80 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0180 0.07 PATH CONDITION PATH CONDITION A->CO --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.20 0.25 0.33 5.00 0.23 0.26 0.31 0.40 FUNCTION FALL 10.00 0.29 0.32 0.37 0.47 30.00 0.51 0.54 0.60 0.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0439 0.10 PATH CONDITION PATH CONDITION A->S B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.49 0.58 0.45 0.52 0.61 0.51 0.59 0.67 0.64 0.72 0.80 30.00 0.90 0.93 0.99 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0200 0.11 PATH CONDITION PATH CONDITION A->S B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.45 0.54 0.45 0.53 0.61 0.51 0.59 0.68 0.62 0.71 0.79 30.00 0.80 0.88 0.94 1.06 Rev.1.01.10 2 - 524 TC200G SERIES DATA SHEET HA1P HA1P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->S ~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0439 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.35 0.43 0.35 0.43 0.51 0.45 0.52 0.61 0.63 0.71 0.80 30.00 0.75 0.83 0.93 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0200 0.11 PATH CONDITION PATH CONDITION A->S ~B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.37 0.44 0.61 5.00 0.42 0.45 0.53 0.71 FUNCTION FALL 10.00 0.51 0.54 0.61 0.80 30.00 0.78 0.81 0.88 1.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0442 0.07 PATH CONDITION PATH CONDITION B->CO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.25 0.33 0.23 0.31 0.39 0.30 0.37 0.45 0.42 0.50 0.58 30.00 0.65 0.70 0.77 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) CO 0.0180 0.07 PATH CONDITION PATH CONDITION B->CO --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.26 0.32 0.23 0.29 0.36 0.29 0.36 0.42 0.42 0.50 0.57 30.00 0.55 0.58 0.65 0.80 Rev.1.01.10 2 - 525 TC200G SERIES DATA SHEET HA1P HA1P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->S A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0439 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.45 0.32 0.39 0.48 0.38 0.45 0.54 0.50 0.57 0.66 30.00 0.77 0.80 0.86 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0200 0.11 PATH CONDITION PATH CONDITION B->S A PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.30 0.42 0.55 5.00 0.31 0.38 0.51 0.63 FUNCTION FALL 10.00 0.39 0.46 0.59 0.71 30.00 0.66 0.73 0.85 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0439 0.10 PATH CONDITION PATH CONDITION B->S ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.28 0.37 0.28 0.36 0.45 0.37 0.44 0.53 0.53 0.60 0.69 30.00 0.69 0.77 0.85 1.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) S 0.0200 0.11 PATH CONDITION PATH CONDITION B->S ~A LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.30 0.38 0.25 0.33 0.41 0.31 0.39 0.47 0.46 0.54 0.63 30.00 0.64 0.67 0.73 0.90 Rev.1.01.10 2 - 526 TC200G SERIES DATA SHEET IDRV4 CELL NAME IDRV4 FUNCTION INTERNAL CLOCK DRIVER ( equal 4mA DRIVER ) TRUTH TABLE INPUT A L H IDRV4 CELL COUNT GATE 0 I/O 1 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z L H A IDRV4 Z Verilog-HDL DESCRIPTION IDRV4 inst(Z,A); VHDL DESCRIPTION inst:IDRV4 port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 44123.9 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 5.55 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 551.5 Rev.1.01.10 2 - 527 TC200G SERIES DATA SHEET IDRV4 IDRV4 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --- FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.40 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.80 1.69 3.02 4.79 0.38 0.89 1.77 3.10 4.88 1.00 1.00 1.89 3.22 4.99 3.00 1.25 2.14 3.47 5.24 PATH CONDITION PATH CONDITION A->Z --FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.43 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.33 2.88 5.18 8.04 0.38 1.36 2.91 5.22 8.10 1.00 1.43 2.98 5.29 8.20 3.00 1.57 3.11 5.42 8.40 Rev.1.01.10 2 - 528 TC200G SERIES DATA SHEET IDRV8 CELL NAME IDRV8 FUNCTION INTERNAL CLOCK DRIVER ( equal 8mA DRIVER ) TRUTH TABLE INPUT A L H IDRV8 CELL COUNT GATE 0 I/O 1 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z L H A IDRV8 Z Verilog-HDL DESCRIPTION IDRV8 inst(Z,A); VHDL DESCRIPTION inst:IDRV8 port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 92825.5 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 5.55 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 1160.3 Rev.1.01.10 2 - 529 TC200G SERIES DATA SHEET IDRV8 IDRV8 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --- FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.26 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.61 1.07 1.74 2.63 0.38 0.70 1.16 1.83 2.72 1.00 0.84 1.30 1.97 2.85 3.00 1.14 1.60 2.27 3.16 PATH CONDITION PATH CONDITION A->Z --FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.31 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.99 1.78 2.94 4.49 0.38 1.02 1.81 2.98 4.52 1.00 1.09 1.89 3.05 4.59 3.00 1.28 2.07 3.23 4.77 Rev.1.01.10 2 - 530 TC200G SERIES DATA SHEET IDRV16 CELL NAME IDRV16 FUNCTION INTERNAL CLOCK DRIVER ( equal 16mA DRIVER ) TRUTH TABLE INPUT A L H IDRV16 CELL COUNT GATE 0 I/O 1 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z L H A IDRV16 Z Verilog-HDL DESCRIPTION IDRV16 inst(Z,A); VHDL DESCRIPTION inst:IDRV16 port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 191415.2 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 9.08 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 2392.7 Rev.1.01.10 2 - 531 TC200G SERIES DATA SHEET IDRV16 IDRV16 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --- FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.17 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.51 0.92 1.48 2.04 0.38 0.60 1.01 1.57 2.12 1.00 0.74 1.15 1.71 2.26 3.00 1.04 1.45 2.02 2.57 PATH CONDITION PATH CONDITION A->Z --FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0013 0.21 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.79 1.49 2.46 3.43 0.38 0.82 1.52 2.50 3.47 1.00 0.89 1.59 2.57 3.54 3.00 1.06 1.76 2.73 3.70 Rev.1.01.10 2 - 532 TC200G SERIES DATA SHEET IDRV24 CELL NAME IDRV24 FUNCTION INTERNAL CLOCK DRIVER ( equal 24mA DRIVER ) TRUTH TABLE INPUT A L H IDRV24 CELL COUNT GATE 0 I/O 2 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z L H A IDRV24 Z Verilog-HDL DESCRIPTION IDRV24 inst(Z,A); VHDL DESCRIPTION inst:IDRV24 port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 288343.7 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 17.93 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 3604.3 Rev.1.01.10 2 - 533 TC200G SERIES DATA SHEET IDRV24 IDRV24 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --- FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.20 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.46 0.74 1.11 1.49 0.38 0.55 0.83 1.20 1.57 1.00 0.68 0.96 1.34 1.71 3.00 0.98 1.27 1.65 2.02 PATH CONDITION PATH CONDITION A->Z --FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.25 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.70 1.18 1.83 2.47 0.38 0.73 1.21 1.86 2.50 1.00 0.80 1.28 1.93 2.57 3.00 0.97 1.45 2.10 2.74 Rev.1.01.10 2 - 534 TC200G SERIES DATA SHEET IV CELL NAME IV FUNCTION INVERTER 1 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 IV CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z H L A IV Z Verilog-HDL DESCRIPTION IV inst(Z,A); VHDL DESCRIPTION inst:IV port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 45.7 Rev.1.01.10 2 - 535 TC200G SERIES DATA SHEET IV IV 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0842 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.20 0.35 0.10 0.23 0.38 0.14 0.28 0.44 0.20 0.39 0.59 30.00 0.94 0.97 1.03 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0359 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.14 0.25 0.11 0.22 0.34 0.15 0.31 0.45 0.20 0.44 0.65 30.00 0.68 0.77 0.91 1.27 Rev.1.01.10 2 - 536 TC200G SERIES DATA SHEET IVP CELL NAME IVP FUNCTION INVERTER 1 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 IVP CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z H L A IVP Z Verilog-HDL DESCRIPTION IVP inst(Z,A); VHDL DESCRIPTION inst:IVP port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 2.01 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 76.6 Rev.1.01.10 2 - 537 TC200G SERIES DATA SHEET IVP IVP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0442 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.12 0.20 0.07 0.14 0.23 0.09 0.18 0.27 0.12 0.24 0.36 30.00 0.51 0.54 0.60 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0225 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.04 0.10 0.16 0.08 0.16 0.24 0.11 0.22 0.32 0.13 0.30 0.45 30.00 0.43 0.52 0.64 0.90 Rev.1.01.10 2 - 538 TC200G SERIES DATA SHEET IVA CELL NAME IVA FUNCTION INVERTER with PARALLEL Pch TRANSISTORS TRUTH TABLE INPUT A L H IVA CELL COUNT GATE 1 I/O 0 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z H L A IVA Z Verilog-HDL DESCRIPTION IVA inst(Z,A); VHDL DESCRIPTION inst:IVA port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.54 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 61.0 Rev.1.01.10 2 - 539 TC200G SERIES DATA SHEET IVA IVA 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0540 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.13 0.22 0.06 0.15 0.25 0.06 0.17 0.28 -0.00 0.15 0.30 30.00 0.59 0.61 0.67 0.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0332 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.14 0.24 0.12 0.22 0.32 0.17 0.31 0.45 0.31 0.51 0.70 30.00 0.64 0.73 0.87 1.26 Rev.1.01.10 2 - 540 TC200G SERIES DATA SHEET IVAP CELL NAME IVAP FUNCTION INVERTER with PARALLEL Pch TRANSISTORS TRUTH TABLE INPUT A L H IVAP CELL COUNT GATE 2 I/O 0 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z H L A IVAP Z Verilog-HDL DESCRIPTION IVAP inst(Z,A); VHDL DESCRIPTION inst:IVAP port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 3.02 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 105.1 Rev.1.01.10 2 - 541 TC200G SERIES DATA SHEET IVAP IVAP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0206 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.03 0.07 0.11 0.03 0.08 0.12 -0.00 0.06 0.13 -0.13 -0.04 0.05 30.00 0.26 0.29 0.32 0.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0228 0.09 PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.11 0.18 0.11 0.18 0.25 0.17 0.26 0.35 0.33 0.47 0.59 30.00 0.44 0.53 0.66 0.98 Rev.1.01.10 2 - 542 TC200G SERIES DATA SHEET IVDA CELL NAME IVDA FUNCTION INVERTER into INVERTER 1 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 IVDA CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Y H L Z L H A IVDA Y Z Verilog-HDL DESCRIPTION IVDA inst(Y,Z,A); VHDL DESCRIPTION inst:IVDA port map(Y,Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Y,Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Y 42.8 Z 39.7 Rev.1.01.10 2 - 543 TC200G SERIES DATA SHEET IVDA IVDA 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Y --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Y 0.0869 0.20 PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.24 0.39 0.14 0.27 0.42 0.18 0.32 0.48 0.25 0.44 0.63 30.00 1.00 1.02 1.09 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Y 0.0395 0.13 PATH CONDITION PATH CONDITION A->Y --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.18 0.30 0.15 0.26 0.38 0.20 0.35 0.50 0.29 0.52 0.73 30.00 0.76 0.85 0.99 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0983 0.09 PATH CONDITION PATH CONDITION Y->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.39 0.12 0.26 0.43 0.16 0.32 0.50 0.25 0.46 0.67 30.00 1.06 1.10 1.17 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0385 0.10 PATH CONDITION PATH CONDITION Y->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.14 0.25 0.11 0.22 0.34 0.14 0.30 0.45 0.16 0.41 0.63 30.00 0.70 0.78 0.92 1.27 Rev.1.01.10 2 - 544 TC200G SERIES DATA SHEET IVDAP CELL NAME IVDAP FUNCTION INVERTER into INVERTER 2 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 IVDAP CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Y H L Z L H A IVDAP Y Z Verilog-HDL DESCRIPTION IVDAP inst(Y,Z,A); VHDL DESCRIPTION inst:IVDAP port map(Y,Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Y,Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Y 77.4 Z 67.1 Rev.1.01.10 2 - 545 TC200G SERIES DATA SHEET IVDAP IVDAP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Y --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Y 0.0444 0.20 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.15 0.23 0.11 0.18 0.26 0.14 0.22 0.31 0.19 0.30 0.41 30.00 0.54 0.57 0.63 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Y 0.0231 0.15 PATH CONDITION PATH CONDITION A->Y --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.13 0.20 0.13 0.20 0.27 0.17 0.27 0.36 0.25 0.38 0.52 30.00 0.47 0.55 0.68 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0576 0.10 PATH CONDITION PATH CONDITION Y->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.17 0.27 0.11 0.20 0.30 0.14 0.24 0.35 0.23 0.36 0.49 30.00 0.66 0.69 0.76 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0204 0.10 PATH CONDITION PATH CONDITION Y->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.10 0.16 0.10 0.17 0.24 0.12 0.22 0.32 0.12 0.28 0.44 30.00 0.40 0.50 0.62 0.87 Rev.1.01.10 2 - 546 TC200G SERIES DATA SHEET LD1 CELL NAME LD1 FUNCTION D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) TRUTH TABLE INPUT G D H L H H L X LD1 DD GG QQ QN QN LD1 CELL COUNT GATE 5 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L Verilog-HDL DESCRIPTION LD1 inst(Q,QN,D,G); VHDL DESCRIPTION inst:LD1 port map(Q,QN,D,G); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,G (LU) LOAD 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 42.2 QN 50.2 Rev.1.01.10 2 - 547 TC200G SERIES DATA SHEET LD1 LD1 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0982 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.47 0.65 0.37 0.54 0.72 0.45 0.62 0.80 0.61 0.77 0.96 30.00 1.35 1.42 1.50 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0417 0.17 PATH CONDITION PATH CONDITION D->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.37 0.44 0.59 5.00 0.49 0.52 0.59 0.75 FUNCTION FALL 10.00 0.64 0.67 0.74 0.91 30.00 1.17 1.20 1.27 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0860 0.11 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.61 0.77 0.51 0.64 0.80 0.58 0.71 0.87 0.74 0.88 1.03 30.00 1.38 1.41 1.48 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0343 0.11 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.56 0.68 0.52 0.63 0.75 0.60 0.71 0.83 0.76 0.87 0.99 30.00 1.10 1.17 1.25 1.42 Rev.1.01.10 2 - 548 TC200G SERIES DATA SHEET LD1 LD1 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0982 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.58 0.76 0.48 0.65 0.84 0.55 0.72 0.90 0.67 0.84 1.03 30.00 1.46 1.54 1.60 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0417 0.17 PATH CONDITION PATH CONDITION G->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.37 0.45 0.52 0.65 5.00 0.52 0.60 0.67 0.80 FUNCTION FALL 10.00 0.67 0.75 0.82 0.96 30.00 1.20 1.27 1.34 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0860 0.11 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.65 0.80 0.59 0.72 0.88 0.66 0.79 0.95 0.79 0.93 1.08 30.00 1.41 1.49 1.56 1.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0343 0.11 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.67 0.78 0.63 0.74 0.86 0.70 0.81 0.92 0.82 0.93 1.05 30.00 1.20 1.28 1.35 1.47 Rev.1.01.10 2 - 549 TC200G SERIES DATA SHEET LD1 LD1 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION --WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.340 0.308 0.38 0.381 0.350 1.00 0.450 0.419 3.00 0.672 0.642 TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE 1.00 0.255 0.297 0.367 0.592 3.00 0.083 0.126 0.198 0.428 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.277 0.291 0.38 0.245 0.260 1.00 0.192 0.207 3.00 0.018 0.036 1.00 0.315 0.284 0.232 0.064 3.00 0.391 0.362 0.314 0.157 CONDITION --WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.380 0.409 0.38 0.340 0.369 1.00 0.272 0.301 3.00 0.053 0.083 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.439 0.426 0.38 0.472 0.458 1.00 0.526 0.512 3.00 0.702 0.687 1.00 0.404 0.436 0.489 0.660 3.00 0.333 0.363 0.413 0.575 1.00 0.458 0.418 0.351 0.134 3.00 0.615 0.576 0.510 0.298 Rev.1.01.10 2 - 550 TC200G SERIES DATA SHEET LD1 LD1 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT CONDITION --WAVE_FORM tw(H) G Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 551 TC200G SERIES DATA SHEET LD1P CELL NAME LD1P FUNCTION D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) TRUTH TABLE INPUT G D H L H H L X LD1P DD GG QQ QN QN LD1P CELL COUNT GATE 6 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L Verilog-HDL DESCRIPTION LD1P inst(Q,QN,D,G); VHDL DESCRIPTION inst:LD1P port map(Q,QN,D,G); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D,G (LU) LOAD 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 75.1 QN 97.9 Rev.1.01.10 2 - 552 TC200G SERIES DATA SHEET LD1P LD1P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0543 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.38 0.49 0.36 0.45 0.56 0.45 0.54 0.64 0.62 0.71 0.81 30.00 0.87 0.94 1.03 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0255 0.15 PATH CONDITION PATH CONDITION D->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.32 0.35 0.42 0.59 5.00 0.42 0.45 0.52 0.69 FUNCTION FALL 10.00 0.52 0.55 0.62 0.79 30.00 0.85 0.88 0.95 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.09 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.60 0.69 0.56 0.64 0.72 0.64 0.71 0.79 0.82 0.89 0.97 30.00 1.00 1.03 1.11 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0178 0.12 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.58 0.65 0.57 0.65 0.72 0.66 0.74 0.81 0.84 0.92 0.99 30.00 0.89 0.96 1.05 1.23 Rev.1.01.10 2 - 553 TC200G SERIES DATA SHEET LD1P LD1P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0543 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.49 0.59 0.47 0.56 0.67 0.54 0.63 0.73 0.66 0.75 0.86 30.00 0.98 1.05 1.12 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0255 0.15 PATH CONDITION PATH CONDITION G->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.35 0.43 0.50 0.63 5.00 0.45 0.53 0.60 0.73 FUNCTION FALL 10.00 0.55 0.63 0.70 0.83 30.00 0.88 0.95 1.02 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.09 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.63 0.72 0.64 0.71 0.79 0.71 0.78 0.86 0.84 0.91 1.00 30.00 1.03 1.11 1.18 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0178 0.12 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.68 0.75 0.68 0.76 0.83 0.75 0.82 0.90 0.87 0.95 1.02 30.00 0.99 1.07 1.13 1.26 Rev.1.01.10 2 - 554 TC200G SERIES DATA SHEET LD1P LD1P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION --WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.514 0.472 0.38 0.565 0.523 1.00 0.650 0.609 3.00 0.925 0.885 TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE 1.00 0.401 0.453 0.539 0.819 3.00 0.172 0.225 0.315 0.605 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.178 0.201 0.38 0.136 0.160 1.00 0.067 0.091 3.00 -0.158 -0.132 1.00 0.241 0.200 0.132 -0.088 3.00 0.368 0.329 0.263 0.052 CONDITION --WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.369 0.406 0.38 0.318 0.356 1.00 0.233 0.271 3.00 -0.041 -0.002 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.690 0.667 0.38 0.733 0.710 1.00 0.805 0.781 3.00 1.036 1.012 1.00 0.628 0.671 0.742 0.971 3.00 0.503 0.545 0.614 0.838 1.00 0.470 0.419 0.335 0.062 3.00 0.673 0.623 0.539 0.268 Rev.1.01.10 2 - 555 TC200G SERIES DATA SHEET LD1P LD1P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT CONDITION --WAVE_FORM tw(H) G Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.990 Rev.1.01.10 2 - 556 TC200G SERIES DATA SHEET LD2 CELL NAME LD2 FUNCTION D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) TRUTH TABLE INPUT GN D L L L H H X LD2 DD GNGN QQ QN QN LD2 CELL COUNT GATE 5 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L Verilog-HDL DESCRIPTION LD2 inst(Q,QN,D,GN); VHDL DESCRIPTION inst:LD2 port map(Q,QN,D,GN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D,GN (LU) LOAD 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 47.7 QN 48.1 Rev.1.01.10 2 - 557 TC200G SERIES DATA SHEET LD2 LD2 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0855 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.42 0.58 0.35 0.49 0.65 0.43 0.57 0.73 0.59 0.73 0.89 30.00 1.19 1.26 1.34 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0398 0.17 PATH CONDITION PATH CONDITION D->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.32 0.35 0.42 0.58 5.00 0.47 0.50 0.57 0.73 FUNCTION FALL 10.00 0.62 0.65 0.72 0.89 30.00 1.12 1.15 1.23 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0840 0.10 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.59 0.74 0.49 0.62 0.77 0.56 0.69 0.84 0.73 0.85 1.00 30.00 1.32 1.35 1.42 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0417 0.11 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.57 0.70 0.52 0.64 0.77 0.60 0.72 0.86 0.76 0.89 1.02 30.00 1.20 1.27 1.35 1.52 Rev.1.01.10 2 - 558 TC200G SERIES DATA SHEET LD2 LD2 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0855 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.55 0.71 0.44 0.58 0.74 0.51 0.65 0.81 0.65 0.79 0.95 30.00 1.32 1.35 1.42 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0398 0.17 PATH CONDITION PATH CONDITION GN->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.45 0.52 0.66 5.00 0.57 0.60 0.67 0.80 FUNCTION FALL 10.00 0.71 0.74 0.81 0.95 30.00 1.22 1.25 1.32 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0840 0.10 PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.68 0.83 0.59 0.72 0.87 0.66 0.78 0.93 0.80 0.92 1.07 30.00 1.42 1.45 1.52 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0417 0.11 PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.70 0.83 0.61 0.73 0.87 0.68 0.80 0.93 0.82 0.94 1.07 30.00 1.33 1.36 1.43 1.57 Rev.1.01.10 2 - 559 TC200G SERIES DATA SHEET LD2 LD2 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.413 0.401 0.38 0.453 0.441 1.00 0.521 0.508 3.00 0.741 0.725 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.382 0.420 0.486 0.697 3.00 0.319 0.354 0.414 0.606 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.254 0.283 0.38 0.221 0.249 1.00 0.165 0.193 3.00 -0.015 0.011 1.00 0.330 0.296 0.239 0.055 3.00 0.484 0.448 0.389 0.196 CONDITION --WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.290 0.299 0.38 0.251 0.261 1.00 0.187 0.197 3.00 -0.020 -0.007 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.429 0.402 0.38 0.463 0.436 1.00 0.521 0.494 3.00 0.706 0.680 1.00 0.356 0.391 0.449 0.638 3.00 0.207 0.243 0.304 0.501 1.00 0.313 0.276 0.214 0.014 3.00 0.360 0.326 0.269 0.085 Rev.1.01.10 2 - 560 TC200G SERIES DATA SHEET LD2 LD2 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION --WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.730 Rev.1.01.10 2 - 561 TC200G SERIES DATA SHEET LD2P CELL NAME LD2P FUNCTION D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) TRUTH TABLE INPUT GN D L L L H H X LD2P DD GNGN QQ QN QN LD2P CELL COUNT GATE 6 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L Verilog-HDL DESCRIPTION LD2P inst(Q,QN,D,GN); VHDL DESCRIPTION inst:LD2P port map(Q,QN,D,GN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 12880.0 (LU*MHz) QN 6880.0 INPUT LOAD PIN NAME D,GN (LU) LOAD 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 91.8 QN 90.0 Rev.1.01.10 2 - 562 TC200G SERIES DATA SHEET LD2P LD2P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0440 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.46 0.36 0.44 0.53 0.45 0.53 0.62 0.62 0.70 0.79 30.00 0.79 0.86 0.94 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0215 0.16 PATH CONDITION PATH CONDITION D->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.32 0.36 0.43 0.59 5.00 0.42 0.45 0.52 0.69 FUNCTION FALL 10.00 0.51 0.54 0.61 0.78 30.00 0.80 0.83 0.90 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.61 0.70 0.57 0.64 0.73 0.64 0.72 0.80 0.82 0.90 0.98 30.00 1.01 1.04 1.12 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0233 0.12 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.61 0.69 0.59 0.68 0.76 0.68 0.77 0.85 0.87 0.95 1.03 30.00 0.98 1.06 1.14 1.33 Rev.1.01.10 2 - 563 TC200G SERIES DATA SHEET LD2P LD2P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0440 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.50 0.59 0.46 0.54 0.63 0.52 0.60 0.69 0.67 0.75 0.84 30.00 0.92 0.95 1.02 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0215 0.16 PATH CONDITION PATH CONDITION GN->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.41 0.44 0.51 0.65 5.00 0.50 0.54 0.60 0.74 FUNCTION FALL 10.00 0.60 0.63 0.70 0.84 30.00 0.89 0.92 0.99 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.70 0.78 0.66 0.73 0.82 0.73 0.80 0.88 0.87 0.94 1.02 30.00 1.10 1.13 1.20 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0233 0.12 PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.74 0.82 0.69 0.77 0.86 0.76 0.84 0.92 0.90 0.98 1.07 30.00 1.12 1.15 1.22 1.36 Rev.1.01.10 2 - 564 TC200G SERIES DATA SHEET LD2P LD2P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.653 0.633 0.38 0.704 0.684 1.00 0.789 0.768 3.00 1.063 1.039 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.601 0.650 0.733 0.999 3.00 0.496 0.543 0.620 0.870 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.068 0.099 0.38 0.025 0.056 1.00 -0.047 -0.016 3.00 -0.278 -0.249 1.00 0.152 0.108 0.036 -0.199 3.00 0.320 0.276 0.201 -0.038 CONDITION --WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.171 0.182 0.38 0.124 0.134 1.00 0.044 0.056 3.00 -0.214 -0.199 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.718 0.690 0.38 0.762 0.734 1.00 0.836 0.808 3.00 1.075 1.047 1.00 0.644 0.688 0.762 1.001 3.00 0.495 0.540 0.614 0.853 1.00 0.199 0.153 0.075 -0.173 3.00 0.253 0.211 0.139 -0.091 Rev.1.01.10 2 - 565 TC200G SERIES DATA SHEET LD2P LD2P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION --WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 1.050 Rev.1.01.10 2 - 566 TC200G SERIES DATA SHEET LD3 CELL NAME LD3 FUNCTION D-TYPE TRANSPARENT LATCH with CLEAR ( HIGH ENABLE ) LD3 CELL COUNT GATE 5 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LD3 DD GG CL CD QQ QN QN TRUTH TABLE INPUT OUTPUT CD G D Q QN L X* X L H H H L L H H H H H L H L X HOLD *:Consider the Hold Time of CLEAR Verilog-HDL DESCRIPTION LD3 inst(Q,QN,D,G,CD); VHDL DESCRIPTION inst:LD3 port map(Q,QN,D,G,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D G CD (LU) LOAD 1.01 0.99 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 47.6 QN 48.7 Rev.1.01.10 2 - 567 TC200G SERIES DATA SHEET LD3 LD3 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0366 0.15 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.50 0.64 0.38 0.52 0.66 0.45 0.59 0.73 0.62 0.77 0.91 30.00 1.10 1.12 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.10 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.52 0.59 0.77 5.00 0.62 0.65 0.72 0.90 FUNCTION RISE 10.00 0.78 0.80 0.87 1.06 30.00 1.39 1.41 1.48 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0875 0.19 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.54 0.72 0.46 0.62 0.80 0.58 0.74 0.92 0.86 1.02 1.20 30.00 1.38 1.46 1.58 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0366 0.15 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.44 0.58 0.34 0.48 0.62 0.40 0.54 0.67 0.49 0.63 0.78 30.00 1.05 1.08 1.14 1.26 Rev.1.01.10 2 - 568 TC200G SERIES DATA SHEET LD3 LD3 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.58 0.73 0.48 0.61 0.77 0.54 0.67 0.83 0.64 0.78 0.93 30.00 1.35 1.38 1.44 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0357 0.12 PATH CONDITION PATH CONDITION D->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.54 0.61 0.74 1.02 5.00 0.65 0.73 0.85 1.14 FUNCTION FALL 10.00 0.77 0.85 0.97 1.26 30.00 1.21 1.29 1.41 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0875 0.19 PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.60 0.77 0.51 0.67 0.85 0.58 0.74 0.91 0.70 0.86 1.03 30.00 1.43 1.51 1.58 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0366 0.15 PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.48 0.62 0.42 0.56 0.69 0.49 0.63 0.76 0.62 0.76 0.90 30.00 1.08 1.16 1.23 1.36 Rev.1.01.10 2 - 569 TC200G SERIES DATA SHEET LD3 LD3 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.62 0.77 0.56 0.69 0.85 0.63 0.76 0.92 0.76 0.90 1.05 30.00 1.39 1.46 1.53 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0357 0.12 PATH CONDITION PATH CONDITION G->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.59 0.66 0.73 0.85 5.00 0.70 0.78 0.85 0.97 FUNCTION FALL 10.00 0.83 0.90 0.97 1.09 30.00 1.26 1.34 1.40 1.52 Rev.1.01.10 2 - 570 TC200G SERIES DATA SHEET LD3 LD3 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH CD G Q CONDITION D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.498 0.466 0.38 0.533 0.501 1.00 0.591 0.560 3.00 0.778 0.749 TIMING CONDITION DATA CD ITEM HOLD CLOCK NEGEDGE 1.00 0.413 0.449 0.509 0.701 3.00 0.242 0.280 0.343 0.545 CLOCK G DATA CD LOW G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.251 0.282 0.38 0.219 0.249 1.00 0.164 0.194 3.00 -0.012 0.017 CONDITION D WAVE_FORM 1.00 0.332 0.299 0.244 0.066 3.00 0.496 0.462 0.405 0.222 Rev.1.01.10 2 - 571 TC200G SERIES DATA SHEET LD3 LD3 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION CD WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.481 0.449 0.38 0.542 0.511 1.00 0.645 0.615 3.00 0.978 0.949 TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE 1.00 0.396 0.458 0.563 0.901 3.00 0.224 0.288 0.396 0.745 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.293 0.309 0.38 0.272 0.287 1.00 0.235 0.251 3.00 0.118 0.136 1.00 0.334 0.313 0.278 0.166 3.00 0.416 0.397 0.365 0.263 CONDITION CD WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.269 0.300 0.38 0.208 0.239 1.00 0.106 0.137 3.00 -0.222 -0.194 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.409 0.396 0.38 0.433 0.419 1.00 0.472 0.457 3.00 0.597 0.580 1.00 0.373 0.395 0.432 0.551 3.00 0.300 0.319 0.352 0.457 1.00 0.352 0.290 0.187 -0.145 3.00 0.519 0.456 0.351 0.011 Rev.1.01.10 2 - 572 TC200G SERIES DATA SHEET LD3 LD3 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT tw(H) G Q CONDITION CD WAVE_FORM 0.01 to 3.00 0.760 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 573 TC200G SERIES DATA SHEET LD3P CELL NAME LD3P FUNCTION D-TYPE TRANSPARENT LATCH with CLEAR ( HIGH ENABLE ) LD3P CELL COUNT GATE 6 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LD3P DD GG CL CD QQ QN QN TRUTH TABLE INPUT OUTPUT CD G D Q QN L X* X L H H H L L H H H H H L H L X HOLD *:Consider the Hold Time of CLEAR Verilog-HDL DESCRIPTION LD3P inst(Q,QN,D,G,CD); VHDL DESCRIPTION inst:LD3P port map(Q,QN,D,G,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D G CD (LU) LOAD 1.01 0.99 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 80.3 QN 97.4 Rev.1.01.10 2 - 574 TC200G SERIES DATA SHEET LD3P LD3P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0227 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.46 0.55 0.38 0.48 0.57 0.45 0.55 0.64 0.63 0.73 0.83 30.00 0.85 0.87 0.94 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.56 0.58 0.65 0.85 5.00 0.63 0.65 0.72 0.92 FUNCTION RISE 10.00 0.71 0.73 0.80 1.00 30.00 1.02 1.04 1.11 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0516 0.15 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.50 0.60 0.49 0.58 0.68 0.61 0.70 0.80 0.91 1.00 1.10 30.00 0.98 1.06 1.18 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0227 0.14 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.40 0.50 0.35 0.44 0.53 0.41 0.50 0.59 0.51 0.61 0.70 30.00 0.80 0.83 0.89 1.01 Rev.1.01.10 2 - 575 TC200G SERIES DATA SHEET LD3P LD3P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.58 0.66 0.55 0.62 0.70 0.61 0.68 0.76 0.73 0.80 0.88 30.00 0.98 1.01 1.07 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.13 PATH CONDITION PATH CONDITION D->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.63 0.71 0.84 1.14 5.00 0.70 0.78 0.91 1.21 FUNCTION FALL 10.00 0.78 0.86 0.98 1.29 30.00 1.02 1.10 1.23 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0516 0.15 PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.55 0.65 0.53 0.62 0.73 0.60 0.69 0.79 0.72 0.81 0.91 30.00 1.03 1.11 1.17 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0227 0.14 PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.44 0.53 0.42 0.51 0.61 0.49 0.58 0.68 0.62 0.71 0.81 30.00 0.83 0.90 0.98 1.11 Rev.1.01.10 2 - 576 TC200G SERIES DATA SHEET LD3P LD3P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.62 0.70 0.62 0.69 0.77 0.69 0.76 0.84 0.82 0.89 0.98 30.00 1.01 1.09 1.16 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.13 PATH CONDITION PATH CONDITION G->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.68 0.76 0.82 0.94 5.00 0.75 0.83 0.90 1.02 FUNCTION FALL 10.00 0.83 0.90 0.97 1.09 30.00 1.07 1.14 1.21 1.33 Rev.1.01.10 2 - 577 TC200G SERIES DATA SHEET LD3P LD3P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH CD G Q CONDITION D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.809 0.771 0.38 0.847 0.810 1.00 0.911 0.874 3.00 1.118 1.081 TIMING CONDITION DATA CD ITEM HOLD CLOCK NEGEDGE 1.00 0.708 0.747 0.811 1.020 3.00 0.504 0.544 0.609 0.821 CLOCK G DATA CD LOW G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.136 0.176 0.38 0.099 0.139 1.00 0.037 0.076 3.00 -0.163 -0.126 CONDITION D WAVE_FORM 1.00 0.244 0.206 0.142 -0.063 3.00 0.462 0.422 0.355 0.140 Rev.1.01.10 2 - 578 TC200G SERIES DATA SHEET LD3P LD3P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION CD WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.780 0.742 0.38 0.849 0.812 1.00 0.965 0.928 3.00 1.341 1.304 TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE 1.00 0.679 0.749 0.865 1.242 3.00 0.475 0.545 0.663 1.044 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.189 0.214 0.38 0.153 0.177 1.00 0.092 0.117 3.00 -0.105 -0.079 1.00 0.255 0.219 0.159 -0.034 3.00 0.387 0.353 0.295 0.110 CONDITION CD WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.169 0.210 0.38 0.101 0.141 1.00 -0.015 0.025 3.00 -0.386 -0.349 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.650 0.627 0.38 0.688 0.665 1.00 0.752 0.728 3.00 0.960 0.935 1.00 0.588 0.625 0.689 0.892 3.00 0.463 0.499 0.560 0.756 1.00 0.278 0.208 0.091 -0.286 3.00 0.496 0.425 0.305 -0.083 Rev.1.01.10 2 - 579 TC200G SERIES DATA SHEET LD3P LD3P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT tw(H) G Q CONDITION CD WAVE_FORM 0.01 to 3.00 1.090 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 1.160 Rev.1.01.10 2 - 580 TC200G SERIES DATA SHEET LD4 CELL NAME LD4 FUNCTION D-TYPE TRANSPARENT LATCH with CLEAR ( LOW ENABLE ) LD4 CELL COUNT GATE 5 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LD4 DD GNGN CL CD QQ QN QN TRUTH TABLE INPUT OUTPUT CD GN D Q QN L X* X L H H L L L H H L H H L H H X HOLD *:Consider the Hold Time of CLEAR Verilog-HDL DESCRIPTION LD4 inst(Q,QN,D,GN,CD); VHDL DESCRIPTION inst:LD4 port map(Q,QN,D,GN,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D GN CD (LU) LOAD 1.01 0.99 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 47.7 QN 48.7 Rev.1.01.10 2 - 581 TC200G SERIES DATA SHEET LD4 LD4 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0366 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.50 0.64 0.38 0.52 0.66 0.45 0.59 0.73 0.62 0.77 0.91 30.00 1.10 1.12 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.09 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.52 0.58 0.77 5.00 0.62 0.65 0.71 0.90 FUNCTION RISE 10.00 0.78 0.80 0.87 1.05 30.00 1.39 1.41 1.48 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0875 0.19 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.54 0.72 0.47 0.62 0.80 0.58 0.74 0.92 0.86 1.02 1.20 30.00 1.38 1.46 1.58 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0366 0.16 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.44 0.58 0.34 0.48 0.61 0.40 0.53 0.67 0.48 0.63 0.78 30.00 1.04 1.08 1.14 1.25 Rev.1.01.10 2 - 582 TC200G SERIES DATA SHEET LD4 LD4 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.58 0.73 0.48 0.61 0.77 0.54 0.67 0.83 0.64 0.77 0.93 30.00 1.35 1.38 1.44 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0356 0.12 PATH CONDITION PATH CONDITION D->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.54 0.62 0.74 1.02 5.00 0.65 0.73 0.85 1.14 FUNCTION FALL 10.00 0.77 0.85 0.97 1.26 30.00 1.21 1.29 1.41 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0875 0.19 PATH CONDITION PATH CONDITION GN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.61 0.79 0.49 0.64 0.82 0.55 0.71 0.89 0.68 0.84 1.01 30.00 1.45 1.48 1.55 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0366 0.16 PATH CONDITION PATH CONDITION GN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.53 0.66 0.42 0.56 0.70 0.49 0.62 0.76 0.61 0.75 0.88 30.00 1.13 1.16 1.22 1.35 Rev.1.01.10 2 - 583 TC200G SERIES DATA SHEET LD4 LD4 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0885 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.66 0.82 0.57 0.70 0.85 0.63 0.76 0.92 0.75 0.89 1.04 30.00 1.43 1.47 1.53 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0356 0.12 PATH CONDITION PATH CONDITION GN->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.60 0.64 0.70 0.83 5.00 0.72 0.75 0.82 0.94 FUNCTION FALL 10.00 0.84 0.87 0.94 1.07 30.00 1.28 1.31 1.38 1.50 Rev.1.01.10 2 - 584 TC200G SERIES DATA SHEET LD4 LD4 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH CD GN Q CONDITION D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.566 0.550 0.38 0.600 0.584 1.00 0.657 0.640 3.00 0.840 0.821 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 0.524 0.557 0.612 0.790 3.00 0.437 0.468 0.520 0.688 CLOCK GN DATA CD LOW GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.171 0.182 0.38 0.140 0.151 1.00 0.087 0.098 3.00 -0.085 -0.072 CONDITION D WAVE_FORM 1.00 0.201 0.170 0.118 -0.050 3.00 0.261 0.231 0.181 0.020 Rev.1.01.10 2 - 585 TC200G SERIES DATA SHEET LD4 LD4 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION CD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.541 0.526 0.38 0.603 0.587 1.00 0.707 0.690 3.00 1.040 1.020 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.501 0.561 0.661 0.986 3.00 0.419 0.475 0.570 0.876 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.267 0.296 0.38 0.242 0.271 1.00 0.201 0.230 3.00 0.067 0.095 1.00 0.346 0.321 0.278 0.141 3.00 0.506 0.479 0.434 0.290 CONDITION CD WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.190 0.201 0.38 0.131 0.142 1.00 0.031 0.043 3.00 -0.290 -0.275 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.412 0.383 0.38 0.437 0.409 1.00 0.480 0.452 3.00 0.618 0.591 1.00 0.334 0.360 0.404 0.546 3.00 0.177 0.205 0.251 0.401 1.00 0.219 0.161 0.064 -0.250 3.00 0.278 0.223 0.130 -0.167 Rev.1.01.10 2 - 586 TC200G SERIES DATA SHEET LD4 LD4 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM 0.01 to 3.00 0.760 0.01 to 3.00 0.780 Rev.1.01.10 2 - 587 TC200G SERIES DATA SHEET LD4P CELL NAME LD4P FUNCTION D-TYPE TRANSPARENT LATCH with CLEAR ( LOW ENABLE ) LD4P CELL COUNT GATE 6 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LD4P DD GNGN CL CD QQ QN QN TRUTH TABLE INPUT OUTPUT CD GN D Q QN L X* X L H H L L L H H L H H L H H X HOLD *:Consider the Hold Time of CLEAR Verilog-HDL DESCRIPTION LD4P inst(Q,QN,D,GN,CD); VHDL DESCRIPTION inst:LD4P port map(Q,QN,D,GN,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D GN CD (LU) LOAD 1.01 0.99 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 80.5 QN 97.4 Rev.1.01.10 2 - 588 TC200G SERIES DATA SHEET LD4P LD4P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0225 0.15 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.46 0.55 0.38 0.48 0.57 0.45 0.55 0.64 0.62 0.73 0.83 30.00 0.85 0.87 0.93 1.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.56 0.58 0.65 0.85 5.00 0.63 0.65 0.72 0.92 FUNCTION RISE 10.00 0.71 0.73 0.80 1.00 30.00 1.02 1.04 1.11 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0517 0.15 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.50 0.60 0.49 0.58 0.68 0.61 0.70 0.81 0.91 1.00 1.10 30.00 0.98 1.06 1.18 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0225 0.15 PATH CONDITION PATH CONDITION D->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.40 0.49 0.35 0.44 0.53 0.41 0.50 0.59 0.51 0.60 0.70 30.00 0.79 0.83 0.89 1.01 Rev.1.01.10 2 - 589 TC200G SERIES DATA SHEET LD4P LD4P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.58 0.66 0.55 0.62 0.70 0.61 0.68 0.76 0.73 0.80 0.88 30.00 0.98 1.01 1.07 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.13 PATH CONDITION PATH CONDITION D->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.63 0.71 0.84 1.14 5.00 0.71 0.79 0.91 1.21 FUNCTION FALL 10.00 0.78 0.86 0.98 1.29 30.00 1.02 1.10 1.23 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0517 0.15 PATH CONDITION PATH CONDITION GN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.57 0.67 0.51 0.60 0.71 0.57 0.67 0.77 0.70 0.79 0.90 30.00 1.05 1.09 1.15 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0225 0.15 PATH CONDITION PATH CONDITION GN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.48 0.57 0.42 0.51 0.61 0.49 0.58 0.67 0.61 0.70 0.80 30.00 0.87 0.91 0.97 1.09 Rev.1.01.10 2 - 590 TC200G SERIES DATA SHEET LD4P LD4P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.66 0.74 0.62 0.69 0.78 0.69 0.76 0.84 0.81 0.88 0.96 30.00 1.05 1.09 1.15 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0180 0.13 PATH CONDITION PATH CONDITION GN->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.70 0.74 0.80 0.93 5.00 0.78 0.81 0.87 1.00 FUNCTION FALL 10.00 0.85 0.88 0.95 1.07 30.00 1.09 1.12 1.19 1.32 Rev.1.01.10 2 - 591 TC200G SERIES DATA SHEET LD4P LD4P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH CD GN Q CONDITION D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.929 0.904 0.38 0.968 0.942 1.00 1.032 1.006 3.00 1.239 1.212 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 0.862 0.899 0.962 1.166 3.00 0.725 0.761 0.821 1.016 CLOCK GN DATA CD LOW GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.028 -0.015 0.38 -0.063 -0.050 1.00 -0.123 -0.109 3.00 -0.314 -0.299 CONDITION D WAVE_FORM 1.00 0.007 -0.027 -0.085 -0.273 3.00 0.079 0.046 -0.010 -0.191 Rev.1.01.10 2 - 592 TC200G SERIES DATA SHEET LD4P LD4P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION CD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.900 0.874 0.38 0.968 0.943 1.00 1.084 1.058 3.00 1.456 1.428 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.832 0.900 1.014 1.382 3.00 0.696 0.762 0.874 1.234 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.091 0.123 0.38 0.053 0.085 1.00 -0.012 0.020 3.00 -0.220 -0.189 1.00 0.176 0.138 0.073 -0.137 3.00 0.348 0.309 0.244 0.032 CONDITION CD WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.001 0.015 0.38 -0.065 -0.051 1.00 -0.177 -0.162 3.00 -0.537 -0.519 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.681 0.652 0.38 0.720 0.691 1.00 0.786 0.757 3.00 0.998 0.969 1.00 0.602 0.641 0.707 0.919 3.00 0.443 0.482 0.547 0.759 1.00 0.037 -0.028 -0.138 -0.490 3.00 0.108 0.046 -0.059 -0.395 Rev.1.01.10 2 - 593 TC200G SERIES DATA SHEET LD4P LD4P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD WAVE_FORM 0.01 to 3.00 1.090 0.01 to 3.00 1.200 Rev.1.01.10 2 - 594 TC200G SERIES DATA SHEET LS1 CELL NAME LS1 FUNCTION D-TYPE TRANSPARENT LATCH with SCAN TEST INPUT LS1 CELL COUNT GATE 7 I/O 0 1/14 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LS1 D1D1 C1 C1 D2D2 C2 C2 QQ QN QN TRUTH TABLE INPUT D1 C1 D2 L H X H H X X L L X L H X L X H H X X H H L H L C2 L L H H L H H H OUTPUT Q QN L H H L L H H L HOLD H L H L L H Verilog-HDL DESCRIPTION LS1 inst(Q,QN,D1,C1,D2,C2); VHDL DESCRIPTION inst:LS1 port map(Q,QN,D1,C1,D2,C2); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D1 C1 D2 C2 (LU) LOAD 0.98 2.00 0.99 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 41.7 QN 50.2 Rev.1.01.10 2 - 595 TC200G SERIES DATA SHEET LS1 LS1 2/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.59 0.78 0.47 0.64 0.83 0.55 0.72 0.91 0.70 0.87 1.06 30.00 1.49 1.54 1.62 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION C1->Q C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.71 0.70 0.72 0.86 5.00 0.90 0.89 0.91 1.06 FUNCTION FALL 10.00 1.08 1.07 1.09 1.24 30.00 1.66 1.66 1.68 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH CONDITION PATH CONDITION C1->Q ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.66 0.85 0.56 0.73 0.92 0.64 0.81 1.00 0.81 0.98 1.18 30.00 1.56 1.62 1.70 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION C1->Q ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.55 0.71 0.46 0.63 0.79 0.53 0.70 0.86 0.64 0.81 0.96 30.00 1.26 1.34 1.41 1.51 Rev.1.01.10 2 - 596 TC200G SERIES DATA SHEET LS1 LS1 3/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->QN C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.88 1.02 1.17 0.88 1.01 1.17 0.89 1.03 1.19 1.04 1.18 1.34 30.00 1.78 1.78 1.80 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION C1->QN C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.57 0.63 0.70 0.86 5.00 0.69 0.74 0.82 0.97 FUNCTION FALL 10.00 0.80 0.86 0.93 1.09 30.00 1.23 1.28 1.36 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION C1->QN ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.75 0.87 0.71 0.82 0.94 0.79 0.90 1.02 0.97 1.08 1.20 30.00 1.29 1.36 1.44 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH CONDITION PATH CONDITION C1->QN ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.00 0.06 0.33 0.01 0.31 0.53 0.98 1.00 1.04 0.76 1.10 1.18 30.00 1.06 1.30 1.60 1.71 Rev.1.01.10 2 - 597 TC200G SERIES DATA SHEET LS1 LS1 4/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.59 0.78 0.47 0.64 0.84 0.54 0.72 0.91 0.67 0.84 1.04 30.00 1.49 1.54 1.62 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION C2->Q C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.64 0.65 0.72 0.98 5.00 0.83 0.84 0.91 1.17 FUNCTION FALL 10.00 1.01 1.02 1.09 1.35 30.00 1.59 1.60 1.67 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH CONDITION PATH CONDITION C2->Q ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.65 0.85 0.55 0.72 0.92 0.62 0.79 0.99 0.76 0.94 1.13 30.00 1.55 1.63 1.69 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION C2->Q ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.54 0.70 0.45 0.62 0.78 0.51 0.68 0.84 0.58 0.75 0.91 30.00 1.25 1.33 1.39 1.45 Rev.1.01.10 2 - 598 TC200G SERIES DATA SHEET LS1 LS1 5/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->QN C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.95 1.11 0.82 0.96 1.12 0.89 1.03 1.19 1.16 1.29 1.45 30.00 1.71 1.72 1.80 2.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION C2->QN C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.57 0.63 0.70 0.83 5.00 0.68 0.74 0.81 0.95 FUNCTION FALL 10.00 0.80 0.86 0.93 1.07 30.00 1.22 1.28 1.36 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH CONDITION PATH CONDITION C2->QN ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.65 0.81 0.60 0.73 0.89 0.66 0.79 0.95 0.72 0.86 1.02 30.00 1.42 1.50 1.56 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION C2->QN ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.75 0.87 0.71 0.82 0.94 0.78 0.89 1.01 0.93 1.04 1.16 30.00 1.29 1.36 1.43 1.58 Rev.1.01.10 2 - 599 TC200G SERIES DATA SHEET LS1 LS1 6/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.58 0.77 0.49 0.66 0.85 0.60 0.77 0.96 0.82 0.99 1.18 30.00 1.48 1.55 1.66 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION D1->Q C1&C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.63 0.62 0.64 0.75 5.00 0.81 0.81 0.83 0.94 FUNCTION FALL 10.00 0.99 0.99 1.00 1.12 30.00 1.56 1.56 1.58 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH CONDITION PATH CONDITION D1->Q C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.60 0.79 0.51 0.68 0.87 0.62 0.79 0.98 0.86 1.03 1.22 30.00 1.50 1.57 1.69 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION D1->Q C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.88 1.05 0.68 0.87 1.05 0.70 0.89 1.07 0.81 1.00 1.18 30.00 1.63 1.63 1.64 1.76 Rev.1.01.10 2 - 600 TC200G SERIES DATA SHEET LS1 LS1 7/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.59 0.78 0.50 0.67 0.86 0.62 0.79 0.98 0.86 1.03 1.22 30.00 1.49 1.57 1.68 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION D1->Q C1&~C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.52 0.53 0.56 0.68 5.00 0.70 0.71 0.74 0.87 FUNCTION FALL 10.00 0.87 0.87 0.91 1.04 30.00 1.42 1.43 1.47 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH CONDITION PATH CONDITION D1->QN C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.93 1.09 0.79 0.93 1.08 0.81 0.94 1.10 0.92 1.06 1.22 30.00 1.69 1.69 1.71 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION D1->QN C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.68 0.79 0.64 0.75 0.87 0.75 0.87 0.98 0.98 1.10 1.22 30.00 1.22 1.30 1.41 1.64 Rev.1.01.10 2 - 601 TC200G SERIES DATA SHEET LS1 LS1 8/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->QN C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.99 1.15 0.85 0.99 1.15 0.87 1.00 1.16 0.98 1.12 1.28 30.00 1.76 1.76 1.77 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION D1->QN C1&~C2&D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.58 0.66 0.78 1.02 5.00 0.70 0.77 0.89 1.13 FUNCTION FALL 10.00 0.81 0.89 1.01 1.25 30.00 1.24 1.31 1.43 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH CONDITION PATH CONDITION D1->QN C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.81 0.97 0.69 0.82 0.98 0.72 0.86 1.01 0.85 0.98 1.14 30.00 1.58 1.59 1.62 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION D1->QN C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.69 0.80 0.65 0.77 0.88 0.77 0.88 1.00 1.02 1.13 1.25 30.00 1.23 1.31 1.43 1.68 Rev.1.01.10 2 - 602 TC200G SERIES DATA SHEET LS1 LS1 9/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.58 0.77 0.48 0.65 0.85 0.58 0.75 0.95 0.77 0.94 1.13 30.00 1.48 1.55 1.65 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION D2->Q C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.58 0.60 0.67 0.90 5.00 0.77 0.79 0.85 1.09 FUNCTION FALL 10.00 0.94 0.96 1.03 1.27 30.00 1.52 1.53 1.60 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH CONDITION PATH CONDITION D2->Q ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.59 0.79 0.50 0.67 0.87 0.61 0.78 0.97 0.80 0.97 1.17 30.00 1.50 1.58 1.68 1.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION D2->Q ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.85 1.03 0.68 0.87 1.05 0.74 0.94 1.12 0.99 1.18 1.37 30.00 1.62 1.63 1.70 1.95 Rev.1.01.10 2 - 603 TC200G SERIES DATA SHEET LS1 LS1 10/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0977 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.58 0.77 0.48 0.65 0.85 0.58 0.76 0.95 0.79 0.96 1.15 30.00 1.48 1.55 1.65 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0433 0.18 PATH CONDITION PATH CONDITION D2->Q ~C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.50 0.52 0.59 0.79 5.00 0.67 0.69 0.76 0.97 FUNCTION FALL 10.00 0.84 0.86 0.93 1.14 30.00 1.40 1.42 1.49 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH CONDITION PATH CONDITION D2->QN C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.89 1.04 0.77 0.90 1.06 0.84 0.97 1.13 1.08 1.21 1.37 30.00 1.65 1.67 1.74 1.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION D2->QN C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.67 0.79 0.64 0.75 0.87 0.74 0.85 0.97 0.93 1.05 1.17 30.00 1.21 1.29 1.39 1.59 Rev.1.01.10 2 - 604 TC200G SERIES DATA SHEET LS1 LS1 11/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->QN ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.97 1.13 0.85 0.98 1.14 0.92 1.05 1.21 1.17 1.30 1.46 30.00 1.74 1.75 1.82 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION D2->QN ~C1&C2&D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.58 0.66 0.76 0.97 5.00 0.69 0.77 0.88 1.08 FUNCTION FALL 10.00 0.81 0.89 1.00 1.20 30.00 1.23 1.31 1.42 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0859 0.11 PATH CONDITION PATH CONDITION D2->QN ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.79 0.95 0.68 0.81 0.97 0.75 0.88 1.04 0.96 1.09 1.25 30.00 1.56 1.58 1.65 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0342 0.11 PATH CONDITION PATH CONDITION D2->QN ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.67 0.79 0.64 0.75 0.87 0.74 0.85 0.97 0.95 1.07 1.19 30.00 1.21 1.29 1.40 1.61 Rev.1.01.10 2 - 605 TC200G SERIES DATA SHEET LS1 LS1 12/14 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE CLOCK C1 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C2 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.539 0.510 0.38 0.560 0.527 1.00 0.595 0.558 3.00 0.708 0.654 TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE 1.00 0.461 0.474 0.495 0.565 3.00 0.304 0.301 0.295 0.276 CLOCK C1 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.165 0.121 0.38 0.109 0.065 1.00 0.015 -0.027 3.00 -0.287 -0.326 1.00 0.046 -0.008 -0.098 -0.390 3.00 -0.194 -0.244 -0.328 -0.599 CONDITION ~C2 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.223 0.252 0.38 0.205 0.237 1.00 0.174 0.213 3.00 0.077 0.134 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.555 0.596 0.38 0.613 0.653 1.00 0.711 0.749 3.00 1.024 1.059 1.00 0.663 0.719 0.813 1.116 3.00 0.881 0.933 1.020 1.302 1.00 0.300 0.292 0.278 0.231 3.00 0.457 0.468 0.486 0.544 Rev.1.01.10 2 - 606 TC200G SERIES DATA SHEET LS1 LS1 13/14 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE CLOCK C2 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C1 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.531 0.490 0.38 0.569 0.526 1.00 0.632 0.585 3.00 0.837 0.778 TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE 1.00 0.422 0.453 0.507 0.678 3.00 0.200 0.220 0.253 0.358 CLOCK C2 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.169 0.132 0.38 0.121 0.084 1.00 0.040 0.005 3.00 -0.222 -0.251 1.00 0.068 0.023 -0.053 -0.298 3.00 -0.135 -0.174 -0.240 -0.452 CONDITION ~C1 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.223 0.266 0.38 0.188 0.233 1.00 0.130 0.179 3.00 -0.058 0.005 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.555 0.590 0.38 0.607 0.640 1.00 0.693 0.725 3.00 0.972 0.997 1.00 0.648 0.696 0.777 1.040 3.00 0.833 0.876 0.948 1.178 1.00 0.337 0.309 0.262 0.110 3.00 0.568 0.553 0.529 0.450 Rev.1.01.10 2 - 607 TC200G SERIES DATA SHEET LS1 LS1 14/14 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK C1 ITEM D1 POSLIMIT CONDITION --WAVE_FORM tw(H) C1 Q1 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.910 CONDITION --WAVE_FORM D1 tw(H) C1 Q1 MINIMUM PULSE WIDTH CONDITION CLOCK C2 ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.930 Rev.1.01.10 2 - 608 TC200G SERIES DATA SHEET LS1P CELL NAME LS1P FUNCTION D-TYPE TRANSPARENT LATCH with SCAN TEST INPUT LS1P CELL COUNT GATE 8 I/O 0 1/14 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LS1P D1D1 C1 C1 D2D2 C2 C2 QQ QN QN TRUTH TABLE INPUT D1 C1 D2 L H X H H X X L L X L H X L X H H X X H H L H L C2 L L H H L H H H OUTPUT Q QN L H H L L H H L HOLD H L H L L H Verilog-HDL DESCRIPTION LS1P inst(Q,QN,D1,C1,D2,C2); VHDL DESCRIPTION inst:LS1P port map(Q,QN,D1,C1,D2,C2); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q 6880.0 (LU*MHz) QN 12880.0 INPUT LOAD PIN NAME D1 C1 D2 C2 (LU) LOAD 0.98 2.00 0.99 1.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 73.0 QN 98.0 Rev.1.01.10 2 - 609 TC200G SERIES DATA SHEET LS1P LS1P 2/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.51 0.62 0.47 0.57 0.67 0.55 0.64 0.75 0.71 0.80 0.91 30.00 1.01 1.06 1.14 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION C1->Q C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.71 0.71 0.73 0.87 5.00 0.84 0.83 0.85 0.99 FUNCTION FALL 10.00 0.96 0.95 0.97 1.12 30.00 1.34 1.33 1.35 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH CONDITION PATH CONDITION C1->Q ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.58 0.68 0.55 0.65 0.75 0.63 0.73 0.83 0.81 0.91 1.02 30.00 1.07 1.14 1.22 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION C1->Q ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.47 0.58 0.44 0.55 0.66 0.51 0.62 0.73 0.62 0.73 0.83 30.00 0.93 1.01 1.08 1.18 Rev.1.01.10 2 - 610 TC200G SERIES DATA SHEET LS1P LS1P 3/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->QN C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.99 1.06 1.15 0.99 1.06 1.14 1.00 1.08 1.16 1.15 1.22 1.31 30.00 1.46 1.46 1.48 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION C1->QN C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.65 0.70 0.78 0.95 5.00 0.72 0.77 0.85 1.02 FUNCTION FALL 10.00 0.79 0.84 0.92 1.09 30.00 1.03 1.09 1.17 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION C1->QN ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.66 0.74 0.67 0.74 0.82 0.74 0.81 0.89 0.84 0.91 1.00 30.00 1.06 1.14 1.21 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION C1->QN ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.78 0.85 0.78 0.85 0.92 0.86 0.93 1.00 1.05 1.12 1.20 30.00 1.09 1.16 1.24 1.44 Rev.1.01.10 2 - 611 TC200G SERIES DATA SHEET LS1P LS1P 4/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.51 0.62 0.47 0.57 0.67 0.55 0.64 0.75 0.69 0.78 0.89 30.00 1.01 1.07 1.14 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION C2->Q C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.65 0.65 0.73 0.99 5.00 0.77 0.78 0.85 1.11 FUNCTION FALL 10.00 0.89 0.90 0.97 1.23 30.00 1.26 1.27 1.34 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH CONDITION PATH CONDITION C2->Q ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.57 0.68 0.55 0.64 0.75 0.62 0.71 0.82 0.77 0.87 0.98 30.00 1.07 1.15 1.22 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION C2->Q ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.47 0.57 0.43 0.54 0.65 0.49 0.60 0.71 0.56 0.67 0.78 30.00 0.93 1.00 1.06 1.13 Rev.1.01.10 2 - 612 TC200G SERIES DATA SHEET LS1P LS1P 5/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->QN C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.92 0.99 1.07 0.93 1.00 1.08 1.00 1.07 1.15 1.27 1.34 1.43 30.00 1.39 1.40 1.47 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION C2->QN C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.65 0.70 0.78 0.93 5.00 0.72 0.78 0.86 1.01 FUNCTION FALL 10.00 0.79 0.85 0.93 1.08 30.00 1.04 1.09 1.17 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION C2->QN ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.66 0.74 0.66 0.74 0.82 0.72 0.80 0.88 0.79 0.86 0.94 30.00 1.06 1.14 1.20 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION C2->QN ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.78 0.86 0.78 0.85 0.93 0.85 0.93 1.00 1.01 1.09 1.16 30.00 1.10 1.17 1.24 1.41 Rev.1.01.10 2 - 613 TC200G SERIES DATA SHEET LS1P LS1P 6/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.50 0.61 0.49 0.58 0.69 0.60 0.69 0.80 0.84 0.94 1.04 30.00 1.00 1.08 1.19 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION D1->Q C1&C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.63 0.63 0.65 0.76 5.00 0.75 0.75 0.77 0.88 FUNCTION FALL 10.00 0.87 0.87 0.88 1.00 30.00 1.24 1.24 1.25 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH CONDITION PATH CONDITION D1->Q C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.52 0.63 0.50 0.60 0.70 0.62 0.72 0.82 0.87 0.97 1.07 30.00 1.02 1.09 1.21 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION D1->Q C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.81 0.93 0.69 0.81 0.93 0.70 0.82 0.94 0.81 0.93 1.06 30.00 1.31 1.31 1.32 1.43 Rev.1.01.10 2 - 614 TC200G SERIES DATA SHEET LS1P LS1P 7/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.51 0.62 0.50 0.59 0.70 0.62 0.71 0.82 0.88 0.97 1.07 30.00 1.01 1.09 1.21 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION D1->Q C1&~C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.52 0.52 0.56 0.68 5.00 0.63 0.64 0.67 0.80 FUNCTION FALL 10.00 0.74 0.75 0.78 0.91 30.00 1.10 1.11 1.14 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION D1->QN C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.90 0.97 1.05 0.90 0.97 1.05 0.91 0.99 1.07 1.03 1.10 1.19 30.00 1.37 1.37 1.38 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION D1->QN C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.71 0.78 0.71 0.79 0.86 0.83 0.90 0.97 1.08 1.15 1.23 30.00 1.02 1.10 1.22 1.47 Rev.1.01.10 2 - 615 TC200G SERIES DATA SHEET LS1P LS1P 8/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->QN C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.96 1.03 1.12 0.96 1.03 1.12 0.97 1.05 1.13 1.09 1.16 1.25 30.00 1.43 1.43 1.45 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION D1->QN C1&~C2&D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.65 0.73 0.85 1.11 5.00 0.73 0.80 0.92 1.19 FUNCTION FALL 10.00 0.80 0.88 1.00 1.26 30.00 1.04 1.12 1.24 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION D1->QN C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.83 0.92 0.77 0.84 0.92 0.80 0.88 0.96 0.94 1.01 1.10 30.00 1.23 1.24 1.27 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION D1->QN C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.64 0.72 0.79 0.72 0.80 0.87 0.84 0.92 0.99 1.11 1.19 1.26 30.00 1.03 1.11 1.23 1.50 Rev.1.01.10 2 - 616 TC200G SERIES DATA SHEET LS1P LS1P 9/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.50 0.61 0.48 0.58 0.69 0.59 0.68 0.79 0.79 0.89 1.00 30.00 1.00 1.08 1.18 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION D2->Q C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.59 0.61 0.67 0.91 5.00 0.71 0.73 0.79 1.04 FUNCTION FALL 10.00 0.83 0.84 0.91 1.15 30.00 1.20 1.21 1.28 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH CONDITION PATH CONDITION D2->Q ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.52 0.62 0.50 0.60 0.70 0.61 0.71 0.81 0.82 0.92 1.03 30.00 1.02 1.10 1.21 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION D2->Q ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.79 0.91 0.68 0.81 0.93 0.75 0.87 0.99 1.00 1.12 1.25 30.00 1.29 1.31 1.37 1.63 Rev.1.01.10 2 - 617 TC200G SERIES DATA SHEET LS1P LS1P 10/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0541 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.50 0.61 0.48 0.58 0.68 0.59 0.68 0.79 0.81 0.91 1.01 30.00 1.00 1.08 1.18 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0274 0.16 PATH CONDITION PATH CONDITION D2->Q ~C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.50 0.52 0.59 0.79 5.00 0.61 0.63 0.70 0.91 FUNCTION FALL 10.00 0.72 0.74 0.81 1.02 30.00 1.07 1.10 1.17 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION D2->QN C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.93 1.01 0.87 0.95 1.03 0.94 1.01 1.10 1.19 1.27 1.35 30.00 1.33 1.34 1.41 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION D2->QN C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.71 0.78 0.71 0.79 0.86 0.82 0.90 0.97 1.04 1.11 1.19 30.00 1.02 1.10 1.21 1.43 Rev.1.01.10 2 - 618 TC200G SERIES DATA SHEET LS1P LS1P 11/14 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->QN ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.94 1.02 1.10 0.96 1.03 1.12 1.03 1.10 1.18 1.28 1.36 1.44 30.00 1.42 1.43 1.50 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION D2->QN ~C1&C2&D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.65 0.73 0.84 1.07 5.00 0.73 0.81 0.92 1.15 FUNCTION FALL 10.00 0.80 0.88 0.99 1.22 30.00 1.04 1.12 1.23 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0440 0.09 PATH CONDITION PATH CONDITION D2->QN ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.81 0.90 0.76 0.83 0.92 0.83 0.90 0.99 1.06 1.13 1.21 30.00 1.21 1.23 1.30 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0177 0.13 PATH CONDITION PATH CONDITION D2->QN ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.71 0.78 0.71 0.79 0.86 0.82 0.90 0.97 1.05 1.13 1.20 30.00 1.02 1.10 1.21 1.45 Rev.1.01.10 2 - 619 TC200G SERIES DATA SHEET LS1P LS1P 12/14 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE CLOCK C1 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C2 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.620 0.591 0.38 0.643 0.611 1.00 0.680 0.644 3.00 0.802 0.752 TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE 1.00 0.541 0.557 0.584 0.670 3.00 0.382 0.385 0.389 0.405 CLOCK C1 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.129 0.083 0.38 0.071 0.026 1.00 -0.026 -0.070 3.00 -0.340 -0.379 1.00 0.006 -0.050 -0.143 -0.445 3.00 -0.243 -0.294 -0.380 -0.657 CONDITION ~C2 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.200 0.229 0.38 0.181 0.214 1.00 0.149 0.188 3.00 0.048 0.105 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.632 0.671 0.38 0.692 0.730 1.00 0.793 0.830 3.00 1.118 1.151 1.00 0.735 0.794 0.891 1.206 3.00 0.944 0.999 1.090 1.384 1.00 0.279 0.269 0.253 0.200 3.00 0.438 0.447 0.462 0.509 Rev.1.01.10 2 - 620 TC200G SERIES DATA SHEET LS1P LS1P 13/14 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE CLOCK C2 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C1 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.626 0.583 0.38 0.665 0.621 1.00 0.731 0.684 3.00 0.942 0.887 TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE 1.00 0.512 0.547 0.605 0.794 3.00 0.282 0.308 0.352 0.493 CLOCK C2 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.136 0.096 0.38 0.084 0.045 1.00 -0.002 -0.039 3.00 -0.281 -0.311 1.00 0.028 -0.020 -0.101 -0.363 3.00 -0.189 -0.231 -0.301 -0.528 CONDITION ~C1 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.207 0.249 0.38 0.171 0.215 1.00 0.110 0.158 3.00 -0.087 -0.026 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.639 0.672 0.38 0.693 0.726 1.00 0.784 0.815 3.00 1.077 1.103 1.00 0.729 0.780 0.867 1.145 3.00 0.910 0.956 1.033 1.284 1.00 0.320 0.290 0.239 0.075 3.00 0.549 0.531 0.501 0.404 Rev.1.01.10 2 - 621 TC200G SERIES DATA SHEET LS1P LS1P 14/14 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK C1 ITEM D1 POSLIMIT CONDITION --WAVE_FORM tw(H) C1 Q1 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.980 CONDITION --WAVE_FORM D1 tw(H) C1 Q1 MINIMUM PULSE WIDTH CONDITION CLOCK C2 ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 1.000 Rev.1.01.10 2 - 622 TC200G SERIES DATA SHEET LS2 CELL NAME LS2 FUNCTION D-TYPE TRANSPARENT LATCH with SCAN TEST INPUT LS2 CELL COUNT GATE 11 I/O 0 1/27 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LS2 D1 D1 C1 C1 D2 D2 C2 C2 C3 C3 Q1 Q1 Q1N Q1N Q2 Q2 Q2N Q2N TRUTH TABLE INPUT OUTPUT D1 C1 D2 C2 C3 Q1 Q1N Q2 Q2N LHXL L H HHXL H L XLLHL H XLHHH L XLXL - HOLD HOLD HHXHH L XHHHH L LHLHL H -H Q1 Q1N L HOLD HOLD Verilog-HDL DESCRIPTION LS2 inst(Q1,Q1N,Q2,Q2N,D1,C1,D2, C2,C3); VHDL DESCRIPTION inst:LS2 port map(Q1,Q1N,Q2,Q2N,D1, C1,D2,C2,C3); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE (LU*MHz) Q1,Q1N,Q2,Q2N 6880.0 INPUT LOAD PIN NAME D1 C1 D2,C3 C2 (LU) LOAD 0.98 2.00 0.99 1.97 OUTPUT DRIVE PIN NAME Q1 DRIVE 40.9 Q1N 49.4 Q2 50.2 (LU) Q2N 42.1 Rev.1.01.10 2 - 623 TC200G SERIES DATA SHEET LS2 LS2 2/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q1 C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.60 0.80 0.47 0.65 0.85 0.55 0.73 0.92 0.69 0.88 1.07 30.00 1.52 1.57 1.64 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION C1->Q1 C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.71 0.70 0.72 0.86 5.00 0.91 0.90 0.92 1.07 FUNCTION FALL 10.00 1.10 1.09 1.11 1.26 30.00 1.68 1.68 1.69 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH CONDITION PATH CONDITION C1->Q1 ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.67 0.86 0.55 0.73 0.93 0.63 0.81 1.01 0.80 0.99 1.18 30.00 1.58 1.65 1.73 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION C1->Q1 ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.55 0.72 0.46 0.63 0.80 0.53 0.70 0.87 0.64 0.81 0.98 30.00 1.28 1.35 1.42 1.52 Rev.1.01.10 2 - 624 TC200G SERIES DATA SHEET LS2 LS2 3/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q1N C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.05 1.20 1.37 1.05 1.19 1.36 1.07 1.21 1.38 1.22 1.36 1.53 30.00 1.99 1.98 2.00 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION C1->Q1N C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.74 0.79 0.87 1.02 5.00 0.89 0.94 1.01 1.17 FUNCTION FALL 10.00 1.03 1.08 1.15 1.31 30.00 1.49 1.54 1.62 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH CONDITION PATH CONDITION C1->Q1N ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.82 0.99 0.75 0.90 1.07 0.82 0.97 1.14 0.93 1.07 1.24 30.00 1.61 1.69 1.76 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION C1->Q1N ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.80 0.95 1.09 0.87 1.02 1.15 0.95 1.09 1.23 1.13 1.28 1.42 30.00 1.55 1.62 1.70 1.88 Rev.1.01.10 2 - 625 TC200G SERIES DATA SHEET LS2 LS2 4/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q2 C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.98 1.11 1.27 1.03 1.16 1.32 1.11 1.24 1.40 1.26 1.40 1.55 30.00 1.88 1.93 2.01 2.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION C1->Q2 C2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.29 1.28 1.30 1.45 5.00 1.40 1.40 1.42 1.57 FUNCTION FALL 10.00 1.52 1.52 1.53 1.68 30.00 1.95 1.94 1.96 2.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH CONDITION PATH CONDITION C1->Q2 ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.04 1.17 1.33 1.11 1.24 1.40 1.19 1.32 1.48 1.37 1.50 1.66 30.00 1.94 2.01 2.09 2.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION C1->Q2 ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.91 1.03 1.14 0.99 1.10 1.22 1.06 1.18 1.29 1.17 1.28 1.40 30.00 1.57 1.65 1.72 1.82 Rev.1.01.10 2 - 626 TC200G SERIES DATA SHEET LS2 LS2 5/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q2N C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.14 1.31 1.50 1.13 1.30 1.49 1.15 1.32 1.51 1.30 1.47 1.66 30.00 2.20 2.19 2.21 2.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION C1->Q2N C2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.82 0.87 0.95 1.10 5.00 0.99 1.05 1.12 1.28 FUNCTION FALL 10.00 1.16 1.21 1.29 1.44 30.00 1.70 1.75 1.83 1.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH CONDITION PATH CONDITION C1->Q2N ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.93 1.12 0.84 1.01 1.20 0.91 1.08 1.27 1.01 1.18 1.37 30.00 1.82 1.90 1.97 2.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION C1->Q2N ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.88 1.06 1.22 0.95 1.12 1.29 1.03 1.20 1.37 1.21 1.38 1.55 30.00 1.76 1.83 1.91 2.09 Rev.1.01.10 2 - 627 TC200G SERIES DATA SHEET LS2 LS2 6/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q2 C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.97 1.11 1.27 1.03 1.17 1.32 1.11 1.24 1.40 1.24 1.38 1.53 30.00 1.87 1.93 2.01 2.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION C2->Q2 C1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.22 1.23 1.30 1.57 5.00 1.33 1.34 1.42 1.68 FUNCTION FALL 10.00 1.45 1.46 1.53 1.80 30.00 1.88 1.88 1.96 2.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH CONDITION PATH CONDITION C2->Q2 ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.04 1.17 1.33 1.11 1.24 1.40 1.18 1.31 1.47 1.33 1.47 1.62 30.00 1.94 2.01 2.08 2.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION C2->Q2 ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.91 1.02 1.14 0.98 1.10 1.21 1.04 1.16 1.28 1.11 1.22 1.34 30.00 1.56 1.64 1.70 1.77 Rev.1.01.10 2 - 628 TC200G SERIES DATA SHEET LS2 LS2 7/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q2N C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.07 1.24 1.43 1.07 1.25 1.44 1.15 1.32 1.51 1.41 1.58 1.77 30.00 2.13 2.14 2.21 2.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION C2->Q2N C1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.82 0.87 0.95 1.08 5.00 0.99 1.05 1.12 1.26 FUNCTION FALL 10.00 1.15 1.21 1.29 1.42 30.00 1.70 1.76 1.83 1.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH CONDITION PATH CONDITION C2->Q2N ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.92 1.11 0.83 1.00 1.19 0.89 1.06 1.25 0.96 1.13 1.32 30.00 1.82 1.90 1.96 2.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION C2->Q2N ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.88 1.05 1.22 0.95 1.13 1.29 1.02 1.20 1.36 1.17 1.35 1.51 30.00 1.76 1.83 1.90 2.06 Rev.1.01.10 2 - 629 TC200G SERIES DATA SHEET LS2 LS2 8/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q1 C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.60 0.80 0.48 0.66 0.86 0.55 0.73 0.93 0.68 0.86 1.06 30.00 1.52 1.58 1.65 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION C2->Q1 C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.64 0.66 0.73 0.99 5.00 0.84 0.86 0.93 1.19 FUNCTION FALL 10.00 1.03 1.05 1.12 1.38 30.00 1.61 1.63 1.70 1.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH CONDITION PATH CONDITION C2->Q1 ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.66 0.86 0.55 0.73 0.93 0.62 0.80 1.00 0.76 0.95 1.15 30.00 1.58 1.65 1.72 1.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION C2->Q1 ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.55 0.72 0.45 0.63 0.79 0.51 0.69 0.85 0.58 0.75 0.92 30.00 1.27 1.34 1.40 1.47 Rev.1.01.10 2 - 630 TC200G SERIES DATA SHEET LS2 LS2 9/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q1N C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.99 1.14 1.31 1.00 1.15 1.32 1.08 1.23 1.39 1.35 1.49 1.66 30.00 1.93 1.94 2.01 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION C2->Q1N C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.74 0.80 0.87 1.01 5.00 0.89 0.95 1.02 1.16 FUNCTION FALL 10.00 1.03 1.09 1.16 1.30 30.00 1.50 1.55 1.63 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH CONDITION PATH CONDITION C2->Q1N ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.82 0.98 0.75 0.90 1.06 0.81 0.96 1.12 0.87 1.02 1.19 30.00 1.61 1.68 1.74 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION C2->Q1N ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.80 0.95 1.09 0.87 1.02 1.16 0.94 1.09 1.23 1.10 1.25 1.39 30.00 1.56 1.63 1.70 1.85 Rev.1.01.10 2 - 631 TC200G SERIES DATA SHEET LS2 LS2 10/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C3->Q2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.63 0.79 0.57 0.70 0.86 0.63 0.77 0.93 0.75 0.89 1.05 30.00 1.40 1.47 1.54 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION C3->Q2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.56 0.63 0.69 0.80 5.00 0.67 0.75 0.81 0.91 FUNCTION FALL 10.00 0.79 0.86 0.92 1.03 30.00 1.21 1.29 1.35 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH CONDITION PATH CONDITION C3->Q2N --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.59 0.77 0.49 0.66 0.84 0.55 0.72 0.91 0.65 0.82 1.01 30.00 1.47 1.55 1.61 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION C3->Q2N --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.51 0.66 0.43 0.58 0.74 0.49 0.65 0.80 0.61 0.77 0.92 30.00 1.19 1.26 1.33 1.45 Rev.1.01.10 2 - 632 TC200G SERIES DATA SHEET LS2 LS2 11/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q1 C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.59 0.79 0.49 0.67 0.86 0.60 0.78 0.97 0.82 1.00 1.20 30.00 1.51 1.58 1.69 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION D1->Q1 C1&C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.62 0.62 0.64 0.75 5.00 0.82 0.82 0.83 0.95 FUNCTION FALL 10.00 1.00 1.00 1.02 1.13 30.00 1.58 1.58 1.59 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.61 0.81 0.51 0.69 0.88 0.62 0.80 1.00 0.86 1.04 1.23 30.00 1.53 1.60 1.72 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.88 1.07 0.68 0.88 1.07 0.70 0.89 1.08 0.80 1.01 1.20 30.00 1.65 1.65 1.66 1.78 Rev.1.01.10 2 - 633 TC200G SERIES DATA SHEET LS2 LS2 12/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.60 0.80 0.50 0.68 0.88 0.62 0.80 0.99 0.86 1.04 1.23 30.00 1.52 1.59 1.71 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.52 0.53 0.56 0.68 5.00 0.71 0.71 0.75 0.87 FUNCTION FALL 10.00 0.88 0.89 0.92 1.05 30.00 1.44 1.45 1.48 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH CONDITION PATH CONDITION D1->Q1N C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.96 1.11 1.27 0.96 1.10 1.27 0.97 1.12 1.29 1.09 1.24 1.41 30.00 1.89 1.89 1.91 2.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION D1->Q1N C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.87 1.01 0.80 0.95 1.09 0.92 1.06 1.20 1.15 1.29 1.44 30.00 1.48 1.56 1.67 1.90 Rev.1.01.10 2 - 634 TC200G SERIES DATA SHEET LS2 LS2 13/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.03 1.17 1.34 1.02 1.17 1.34 1.04 1.19 1.35 1.16 1.30 1.47 30.00 1.96 1.96 1.97 2.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.75 0.82 0.94 1.18 5.00 0.89 0.97 1.09 1.33 FUNCTION FALL 10.00 1.03 1.11 1.23 1.47 30.00 1.50 1.58 1.69 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.98 1.15 0.84 0.99 1.16 0.88 1.02 1.19 1.01 1.16 1.33 30.00 1.77 1.78 1.81 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.89 1.03 0.82 0.96 1.10 0.93 1.08 1.22 1.18 1.33 1.47 30.00 1.49 1.57 1.69 1.94 Rev.1.01.10 2 - 635 TC200G SERIES DATA SHEET LS2 LS2 14/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q2 C1&C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.97 1.10 1.26 1.04 1.18 1.33 1.15 1.29 1.45 1.39 1.52 1.68 30.00 1.87 1.94 2.05 2.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION D1->Q2 C1&C2&~D2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.20 1.19 1.21 1.33 5.00 1.31 1.31 1.32 1.44 FUNCTION FALL 10.00 1.43 1.42 1.44 1.56 30.00 1.85 1.85 1.87 1.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.99 1.12 1.28 1.06 1.20 1.35 1.18 1.31 1.47 1.42 1.56 1.72 30.00 1.89 1.96 2.08 2.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.26 1.38 1.49 1.26 1.38 1.49 1.28 1.39 1.51 1.39 1.51 1.62 30.00 1.92 1.92 1.93 2.05 Rev.1.01.10 2 - 636 TC200G SERIES DATA SHEET LS2 LS2 15/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.98 1.11 1.27 1.05 1.19 1.35 1.17 1.31 1.46 1.42 1.56 1.71 30.00 1.88 1.95 2.07 2.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&~D2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.07 1.08 1.11 1.25 5.00 1.19 1.19 1.23 1.36 FUNCTION FALL 10.00 1.30 1.31 1.35 1.48 30.00 1.73 1.74 1.77 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH CONDITION PATH CONDITION D1->Q2N C1&C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.04 1.21 1.40 1.04 1.21 1.40 1.06 1.23 1.42 1.18 1.35 1.54 30.00 2.11 2.10 2.12 2.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION D1->Q2N C1&C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.98 1.15 0.89 1.06 1.22 1.00 1.17 1.33 1.23 1.40 1.57 30.00 1.69 1.77 1.88 2.11 Rev.1.01.10 2 - 637 TC200G SERIES DATA SHEET LS2 LS2 16/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.11 1.28 1.47 1.11 1.28 1.47 1.12 1.29 1.48 1.24 1.41 1.60 30.00 2.17 2.17 2.19 2.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&D2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.83 0.91 1.02 1.26 5.00 1.00 1.08 1.20 1.44 FUNCTION FALL 10.00 1.17 1.24 1.36 1.60 30.00 1.71 1.79 1.90 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.92 1.09 1.28 0.93 1.10 1.29 0.96 1.13 1.32 1.09 1.27 1.45 30.00 1.98 1.99 2.03 2.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.99 1.16 0.90 1.07 1.23 1.01 1.19 1.35 1.26 1.44 1.60 30.00 1.70 1.78 1.90 2.15 Rev.1.01.10 2 - 638 TC200G SERIES DATA SHEET LS2 LS2 17/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q1 C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.59 0.78 0.48 0.66 0.86 0.58 0.76 0.96 0.77 0.95 1.15 30.00 1.50 1.58 1.68 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION D2->Q1 C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.58 0.60 0.67 0.90 5.00 0.78 0.79 0.86 1.10 FUNCTION FALL 10.00 0.96 0.98 1.04 1.28 30.00 1.54 1.55 1.62 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.60 0.80 0.50 0.68 0.88 0.61 0.79 0.99 0.80 0.98 1.18 30.00 1.53 1.61 1.71 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.86 1.05 0.67 0.88 1.06 0.74 0.94 1.13 0.99 1.19 1.38 30.00 1.63 1.65 1.72 1.97 Rev.1.01.10 2 - 639 TC200G SERIES DATA SHEET LS2 LS2 18/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0987 0.23 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.59 0.78 0.48 0.66 0.86 0.58 0.77 0.96 0.79 0.97 1.17 30.00 1.50 1.58 1.68 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0438 0.20 PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.50 0.52 0.59 0.79 5.00 0.68 0.70 0.77 0.98 FUNCTION FALL 10.00 0.85 0.88 0.95 1.15 30.00 1.41 1.43 1.51 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH CONDITION PATH CONDITION D2->Q1N C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.92 1.06 1.23 0.93 1.08 1.25 1.00 1.15 1.32 1.25 1.39 1.56 30.00 1.85 1.87 1.94 2.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION D2->Q1N C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.72 0.87 1.01 0.80 0.95 1.09 0.90 1.05 1.19 1.10 1.25 1.39 30.00 1.48 1.56 1.66 1.85 Rev.1.01.10 2 - 640 TC200G SERIES DATA SHEET LS2 LS2 19/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.01 1.15 1.32 1.02 1.17 1.34 1.09 1.24 1.40 1.34 1.49 1.66 30.00 1.94 1.96 2.02 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.75 0.83 0.93 1.13 5.00 0.89 0.97 1.08 1.28 FUNCTION FALL 10.00 1.03 1.11 1.22 1.42 30.00 1.50 1.58 1.69 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0845 0.17 PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.96 1.12 0.83 0.98 1.15 0.90 1.05 1.22 1.12 1.26 1.43 30.00 1.74 1.77 1.84 2.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0346 0.20 PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.72 0.87 1.01 0.80 0.95 1.09 0.91 1.05 1.19 1.12 1.27 1.41 30.00 1.48 1.56 1.66 1.88 Rev.1.01.10 2 - 641 TC200G SERIES DATA SHEET LS2 LS2 20/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q2 C2&C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.96 1.10 1.25 1.04 1.18 1.33 1.14 1.28 1.43 1.34 1.47 1.63 30.00 1.86 1.94 2.04 2.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION D2->Q2 C2&C1&~D1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.15 1.17 1.24 1.48 5.00 1.27 1.28 1.35 1.60 FUNCTION FALL 10.00 1.38 1.40 1.47 1.71 30.00 1.81 1.82 1.89 2.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.98 1.12 1.28 1.06 1.20 1.36 1.17 1.30 1.46 1.37 1.51 1.67 30.00 1.88 1.96 2.07 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.24 1.36 1.47 1.26 1.37 1.49 1.33 1.44 1.56 1.58 1.69 1.81 30.00 1.90 1.91 1.98 2.24 Rev.1.01.10 2 - 642 TC200G SERIES DATA SHEET LS2 LS2 21/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0860 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.96 1.10 1.25 1.04 1.18 1.33 1.14 1.28 1.44 1.36 1.49 1.65 30.00 1.86 1.94 2.04 2.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0343 0.11 PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&~D1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.05 1.07 1.14 1.35 5.00 1.16 1.18 1.25 1.47 FUNCTION FALL 10.00 1.28 1.30 1.37 1.58 30.00 1.70 1.72 1.79 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH CONDITION PATH CONDITION D2->Q2N C2&C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.00 1.17 1.36 1.01 1.19 1.38 1.08 1.26 1.45 1.33 1.50 1.69 30.00 2.06 2.08 2.15 2.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION D2->Q2N C2&C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.98 1.14 0.88 1.06 1.22 0.99 1.16 1.32 1.18 1.36 1.52 30.00 1.69 1.77 1.87 2.06 Rev.1.01.10 2 - 643 TC200G SERIES DATA SHEET LS2 LS2 22/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH DELAY (ns) 1.00 5.00 10.00 1.09 1.26 1.45 1.10 1.27 1.46 1.17 1.34 1.53 1.42 1.60 1.79 30.00 2.15 2.17 2.24 2.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&D1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.83 0.91 1.01 1.22 5.00 1.00 1.08 1.19 1.39 FUNCTION FALL 10.00 1.16 1.25 1.35 1.56 30.00 1.71 1.79 1.89 2.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0981 0.17 PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.89 1.07 1.26 0.92 1.09 1.28 0.99 1.16 1.35 1.20 1.37 1.56 30.00 1.96 1.98 2.05 2.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0424 0.16 PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.98 1.14 0.88 1.06 1.22 0.99 1.16 1.32 1.20 1.38 1.54 30.00 1.69 1.77 1.87 2.08 Rev.1.01.10 2 - 644 TC200G SERIES DATA SHEET LS2 LS2 23/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE CLOCK C1 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C2 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.654 0.626 0.38 0.677 0.646 1.00 0.715 0.680 3.00 0.837 0.791 TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE 1.00 0.578 0.594 0.623 0.713 3.00 0.422 0.427 0.436 0.464 CLOCK C1 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.165 0.121 0.38 0.109 0.065 1.00 0.015 -0.027 3.00 -0.287 -0.326 1.00 0.046 -0.008 -0.098 -0.390 3.00 -0.194 -0.244 -0.328 -0.599 CONDITION ~C2 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.223 0.252 0.38 0.205 0.237 1.00 0.174 0.213 3.00 0.077 0.135 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.639 0.672 0.38 0.697 0.730 1.00 0.794 0.825 3.00 1.106 1.135 1.00 0.729 0.785 0.879 1.182 3.00 0.910 0.962 1.051 1.336 1.00 0.300 0.292 0.278 0.233 3.00 0.457 0.468 0.488 0.550 Rev.1.01.10 2 - 645 TC200G SERIES DATA SHEET LS2 LS2 24/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE CLOCK C3 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION C1&~C2 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 1.111 1.079 0.38 1.127 1.094 1.00 1.152 1.120 3.00 1.235 1.203 TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE 1.00 1.025 1.040 1.066 1.150 3.00 0.851 0.867 0.893 0.979 CLOCK C3 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.281 -0.265 0.38 -0.334 -0.318 1.00 -0.423 -0.406 3.00 -0.709 -0.692 1.00 -0.237 -0.290 -0.379 -0.665 3.00 -0.147 -0.200 -0.289 -0.575 CONDITION C1&~C2 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.457 -0.424 0.38 -0.472 -0.439 1.00 -0.497 -0.465 3.00 -0.580 -0.548 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.937 0.921 0.38 0.990 0.973 1.00 1.079 1.062 3.00 1.364 1.348 1.00 0.893 0.946 1.034 1.320 3.00 0.804 0.857 0.945 1.231 1.00 -0.369 -0.385 -0.411 -0.495 3.00 -0.193 -0.209 -0.236 -0.324 Rev.1.01.10 2 - 646 TC200G SERIES DATA SHEET LS2 LS2 25/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE CLOCK C2 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C1 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.650 0.609 0.38 0.689 0.647 1.00 0.754 0.710 3.00 0.966 0.913 TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE 1.00 0.541 0.576 0.635 0.823 3.00 0.322 0.349 0.392 0.534 CLOCK C2 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.177 0.138 0.38 0.127 0.090 1.00 0.045 0.009 3.00 -0.222 -0.251 1.00 0.073 0.027 -0.050 -0.298 3.00 -0.135 -0.174 -0.240 -0.452 CONDITION ~C1 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.230 0.271 0.38 0.195 0.239 1.00 0.136 0.185 3.00 -0.052 0.011 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.643 0.670 0.38 0.695 0.721 1.00 0.781 0.806 3.00 1.060 1.079 1.00 0.716 0.765 0.847 1.112 3.00 0.863 0.907 0.981 1.219 1.00 0.342 0.314 0.267 0.116 3.00 0.568 0.554 0.531 0.456 Rev.1.01.10 2 - 647 TC200G SERIES DATA SHEET LS2 LS2 26/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE CLOCK C3 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION C2&~C1 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 1.052 1.021 0.38 1.094 1.062 1.00 1.163 1.132 3.00 1.388 1.356 TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE 1.00 0.968 1.009 1.079 1.303 3.00 0.797 0.838 0.908 1.132 CLOCK C3 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.281 -0.264 0.38 -0.328 -0.311 1.00 -0.405 -0.389 3.00 -0.656 -0.640 1.00 -0.236 -0.282 -0.360 -0.612 3.00 -0.143 -0.190 -0.269 -0.523 CONDITION C2&~C1 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.398 -0.366 0.38 -0.440 -0.407 1.00 -0.509 -0.476 3.00 -0.732 -0.700 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.937 0.921 0.38 0.983 0.967 1.00 1.061 1.045 3.00 1.312 1.295 1.00 0.893 0.939 1.017 1.267 3.00 0.804 0.850 0.928 1.178 1.00 -0.311 -0.352 -0.422 -0.647 3.00 -0.134 -0.177 -0.247 -0.475 Rev.1.01.10 2 - 648 TC200G SERIES DATA SHEET LS2 LS2 27/27 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK C1 ITEM D1 POSLIMIT CONDITION --WAVE_FORM tw(H) C1 Q1 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.980 CONDITION --WAVE_FORM Q1 tw(H) C3 Q2 MINIMUM PULSE WIDTH CONDITION CLOCK C3 ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION --WAVE_FORM D1 tw(H) C1 Q1 MINIMUM PULSE WIDTH CONDITION CLOCK C2 ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 1.000 Rev.1.01.10 2 - 649 TC200G SERIES DATA SHEET LS2P CELL NAME LS2P FUNCTION D-TYPE TRANSPARENT LATCH with SCAN TEST INPUT LS2P CELL COUNT GATE 13 I/O 0 1/27 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL LS2P D1 D1 C1 C1 D2 D2 C2 C2 C3 C3 Q1 Q1 Q1N Q1N Q2 Q2 Q2N Q2N TRUTH TABLE INPUT OUTPUT D1 C1 D2 C2 C3 Q1 Q1N Q2 Q2N LHXL L H HHXL H L XLLHL H XLHHH L XLXL - HOLD HOLD HHXHH L XHHHH L LHLHL H -H Q1 Q1N L HOLD HOLD Verilog-HDL DESCRIPTION LS2P inst(Q1,Q1N,Q2,Q2N,D1,C1,D2, C2,C3); VHDL DESCRIPTION inst:LS2P port map(Q1,Q1N,Q2,Q2N,D1, C1,D2,C2,C3); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE (LU*MHz) Q1,Q1N,Q2,Q2N 6880.0 INPUT LOAD PIN NAME D1 C1 D2 C2 C3 (LU) LOAD 0.98 2.00 0.99 1.97 1.01 OUTPUT DRIVE PIN NAME Q1 DRIVE 73.2 Q1N 88.8 Q2 97.9 (LU) Q2N 74.4 Rev.1.01.10 2 - 650 TC200G SERIES DATA SHEET LS2P LS2P 2/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q1 C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.51 0.62 0.47 0.56 0.67 0.55 0.64 0.75 0.71 0.80 0.91 30.00 1.01 1.06 1.14 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION C1->Q1 C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.71 0.70 0.72 0.86 5.00 0.83 0.83 0.85 0.99 FUNCTION FALL 10.00 0.95 0.95 0.97 1.11 30.00 1.33 1.33 1.35 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH CONDITION PATH CONDITION C1->Q1 ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.57 0.68 0.55 0.64 0.75 0.63 0.72 0.83 0.81 0.90 1.01 30.00 1.07 1.14 1.22 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION C1->Q1 ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.47 0.57 0.44 0.55 0.65 0.51 0.62 0.72 0.62 0.72 0.83 30.00 0.92 1.00 1.07 1.17 Rev.1.01.10 2 - 651 TC200G SERIES DATA SHEET LS2P LS2P 3/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q1N C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH DELAY (ns) 1.00 5.00 10.00 1.19 1.28 1.38 1.19 1.28 1.37 1.21 1.29 1.39 1.36 1.44 1.54 30.00 1.73 1.73 1.74 1.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION C1->Q1N C2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.83 0.88 0.96 1.13 5.00 0.94 0.99 1.07 1.24 FUNCTION FALL 10.00 1.04 1.09 1.17 1.34 30.00 1.34 1.39 1.47 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH CONDITION PATH CONDITION C1->Q1N ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.77 0.86 0.95 0.85 0.94 1.03 0.92 1.01 1.10 1.02 1.10 1.20 30.00 1.31 1.39 1.46 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION C1->Q1N ~C2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.89 1.00 1.10 0.96 1.07 1.16 1.04 1.15 1.24 1.23 1.34 1.44 30.00 1.40 1.47 1.55 1.74 Rev.1.01.10 2 - 652 TC200G SERIES DATA SHEET LS2P LS2P 4/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q2 C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 1.17 1.24 1.32 1.22 1.29 1.37 1.30 1.37 1.45 1.47 1.54 1.62 30.00 1.63 1.69 1.77 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION C1->Q2 C2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.52 1.51 1.53 1.68 5.00 1.59 1.58 1.60 1.75 FUNCTION FALL 10.00 1.66 1.66 1.67 1.82 30.00 1.90 1.90 1.92 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH CONDITION PATH CONDITION C1->Q2 ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.22 1.30 1.38 1.29 1.36 1.45 1.37 1.44 1.53 1.57 1.64 1.72 30.00 1.69 1.76 1.84 2.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION C1->Q2 ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.09 1.17 1.24 1.17 1.24 1.32 1.24 1.31 1.39 1.34 1.41 1.49 30.00 1.48 1.56 1.63 1.73 Rev.1.01.10 2 - 653 TC200G SERIES DATA SHEET LS2P LS2P 5/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C1->Q2N C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH DELAY (ns) 1.00 5.00 10.00 1.29 1.38 1.49 1.28 1.37 1.48 1.30 1.39 1.50 1.45 1.54 1.65 30.00 1.87 1.87 1.89 2.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION C1->Q2N C2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.92 0.97 1.05 1.22 5.00 1.03 1.09 1.16 1.34 FUNCTION FALL 10.00 1.15 1.20 1.28 1.45 30.00 1.50 1.55 1.63 1.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH CONDITION PATH CONDITION C1->Q2N ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.96 1.07 0.94 1.04 1.14 1.01 1.11 1.21 1.11 1.21 1.31 30.00 1.45 1.53 1.60 1.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION C1->Q2N ~C2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.98 1.09 1.20 1.05 1.16 1.27 1.13 1.24 1.35 1.32 1.43 1.55 30.00 1.56 1.63 1.71 1.90 Rev.1.01.10 2 - 654 TC200G SERIES DATA SHEET LS2P LS2P 6/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q2 C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 1.17 1.24 1.33 1.23 1.30 1.38 1.30 1.38 1.46 1.46 1.53 1.61 30.00 1.64 1.70 1.77 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION C2->Q2 C1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.44 1.45 1.52 1.79 5.00 1.51 1.52 1.59 1.87 FUNCTION FALL 10.00 1.59 1.60 1.67 1.94 30.00 1.83 1.84 1.91 2.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH CONDITION PATH CONDITION C2->Q2 ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.23 1.30 1.39 1.30 1.38 1.46 1.37 1.45 1.53 1.54 1.61 1.70 30.00 1.70 1.77 1.84 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION C2->Q2 ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.09 1.17 1.24 1.17 1.24 1.32 1.23 1.30 1.37 1.29 1.37 1.44 30.00 1.48 1.56 1.62 1.68 Rev.1.01.10 2 - 655 TC200G SERIES DATA SHEET LS2P LS2P 7/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q2N C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH DELAY (ns) 1.00 5.00 10.00 1.21 1.31 1.41 1.22 1.31 1.42 1.29 1.38 1.49 1.56 1.66 1.76 30.00 1.80 1.81 1.88 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION C2->Q2N C1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.92 0.98 1.06 1.21 5.00 1.04 1.10 1.17 1.33 FUNCTION FALL 10.00 1.15 1.21 1.28 1.44 30.00 1.50 1.56 1.64 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH CONDITION PATH CONDITION C2->Q2N ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.96 1.07 0.94 1.04 1.14 1.00 1.10 1.20 1.06 1.16 1.26 30.00 1.45 1.53 1.59 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION C2->Q2N ~C1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.98 1.10 1.21 1.05 1.17 1.28 1.13 1.24 1.35 1.29 1.41 1.52 30.00 1.56 1.64 1.71 1.87 Rev.1.01.10 2 - 656 TC200G SERIES DATA SHEET LS2P LS2P 8/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q1 C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.51 0.62 0.47 0.57 0.68 0.55 0.65 0.75 0.69 0.79 0.89 30.00 1.01 1.07 1.14 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION C2->Q1 C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.64 0.66 0.73 0.99 5.00 0.77 0.78 0.85 1.12 FUNCTION FALL 10.00 0.89 0.90 0.97 1.24 30.00 1.27 1.28 1.35 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH CONDITION PATH CONDITION C2->Q1 ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.57 0.68 0.55 0.64 0.75 0.62 0.71 0.82 0.77 0.87 0.98 30.00 1.07 1.14 1.21 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION C2->Q1 ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.46 0.57 0.43 0.54 0.65 0.49 0.60 0.71 0.56 0.67 0.77 30.00 0.92 1.00 1.06 1.12 Rev.1.01.10 2 - 657 TC200G SERIES DATA SHEET LS2P LS2P 9/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C2->Q1N C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH DELAY (ns) 1.00 5.00 10.00 1.12 1.21 1.31 1.14 1.23 1.32 1.21 1.30 1.39 1.48 1.57 1.67 30.00 1.66 1.68 1.75 2.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION C2->Q1N C1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.83 0.89 0.97 1.12 5.00 0.94 1.00 1.08 1.23 FUNCTION FALL 10.00 1.04 1.10 1.18 1.33 30.00 1.35 1.40 1.48 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH CONDITION PATH CONDITION C2->Q1N ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.77 0.86 0.96 0.85 0.94 1.03 0.90 0.99 1.09 0.97 1.06 1.15 30.00 1.31 1.39 1.45 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION C2->Q1N ~C1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.89 1.00 1.10 0.96 1.07 1.17 1.03 1.15 1.24 1.20 1.31 1.41 30.00 1.41 1.48 1.55 1.72 Rev.1.01.10 2 - 658 TC200G SERIES DATA SHEET LS2P LS2P 10/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C3->Q2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.61 0.70 0.61 0.69 0.77 0.68 0.75 0.84 0.80 0.88 0.96 30.00 1.01 1.09 1.15 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION C3->Q2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.61 0.68 0.74 0.85 5.00 0.68 0.75 0.82 0.92 FUNCTION FALL 10.00 0.75 0.83 0.89 0.99 30.00 0.99 1.07 1.13 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH CONDITION PATH CONDITION C3->Q2N --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.49 0.59 0.47 0.56 0.67 0.53 0.62 0.73 0.64 0.73 0.83 30.00 0.98 1.05 1.11 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION C3->Q2N --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.44 0.54 0.41 0.51 0.61 0.48 0.57 0.68 0.60 0.70 0.80 30.00 0.87 0.94 1.01 1.13 Rev.1.01.10 2 - 659 TC200G SERIES DATA SHEET LS2P LS2P 11/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q1 C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.50 0.61 0.49 0.58 0.68 0.60 0.69 0.80 0.84 0.93 1.04 30.00 1.00 1.07 1.19 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION D1->Q1 C1&C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.63 0.63 0.64 0.75 5.00 0.75 0.75 0.76 0.87 FUNCTION FALL 10.00 0.86 0.86 0.88 0.99 30.00 1.24 1.23 1.25 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.52 0.62 0.50 0.60 0.70 0.62 0.71 0.82 0.87 0.97 1.07 30.00 1.02 1.09 1.21 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.81 0.93 0.69 0.81 0.93 0.70 0.82 0.94 0.81 0.93 1.05 30.00 1.30 1.30 1.32 1.43 Rev.1.01.10 2 - 660 TC200G SERIES DATA SHEET LS2P LS2P 12/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.51 0.62 0.50 0.59 0.70 0.62 0.71 0.81 0.88 0.97 1.07 30.00 1.01 1.08 1.20 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION D1->Q1 C1&~C2&~D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.52 0.56 0.68 5.00 0.63 0.63 0.67 0.79 FUNCTION FALL 10.00 0.74 0.74 0.78 0.91 30.00 1.09 1.10 1.14 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH CONDITION PATH CONDITION D1->Q1N C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.09 1.18 1.28 1.09 1.18 1.28 1.11 1.20 1.29 1.23 1.32 1.41 30.00 1.63 1.63 1.65 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION D1->Q1N C1&C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.93 1.03 0.89 1.00 1.10 1.01 1.12 1.22 1.26 1.37 1.47 30.00 1.33 1.40 1.52 1.77 Rev.1.01.10 2 - 661 TC200G SERIES DATA SHEET LS2P LS2P 13/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH DELAY (ns) 1.00 5.00 10.00 1.16 1.25 1.35 1.16 1.25 1.35 1.17 1.26 1.36 1.29 1.38 1.48 30.00 1.70 1.70 1.71 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.84 0.91 1.03 1.30 5.00 0.95 1.02 1.14 1.41 FUNCTION FALL 10.00 1.05 1.12 1.24 1.50 30.00 1.35 1.43 1.54 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.94 1.03 1.13 0.95 1.04 1.14 0.99 1.07 1.17 1.13 1.22 1.31 30.00 1.48 1.49 1.53 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION D1->Q1N C1&~C2&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.94 1.04 0.91 1.02 1.11 1.03 1.14 1.23 1.29 1.40 1.50 30.00 1.34 1.42 1.54 1.80 Rev.1.01.10 2 - 662 TC200G SERIES DATA SHEET LS2P LS2P 14/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q2 C1&C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 1.15 1.23 1.31 1.23 1.30 1.39 1.35 1.42 1.50 1.60 1.67 1.75 30.00 1.62 1.70 1.82 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION D1->Q2 C1&C2&~D2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.41 1.41 1.43 1.55 5.00 1.49 1.49 1.50 1.62 FUNCTION FALL 10.00 1.56 1.56 1.58 1.70 30.00 1.80 1.80 1.82 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.18 1.25 1.33 1.25 1.32 1.41 1.37 1.44 1.53 1.63 1.71 1.79 30.00 1.64 1.72 1.84 2.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.48 1.56 1.63 1.48 1.56 1.63 1.50 1.57 1.64 1.61 1.69 1.76 30.00 1.87 1.87 1.88 2.00 Rev.1.01.10 2 - 663 TC200G SERIES DATA SHEET LS2P LS2P 15/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 1.16 1.24 1.32 1.24 1.32 1.40 1.36 1.43 1.52 1.63 1.70 1.79 30.00 1.63 1.71 1.83 2.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION D1->Q2 C1&~C2&~D2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.27 1.27 1.31 1.45 5.00 1.34 1.35 1.38 1.52 FUNCTION FALL 10.00 1.41 1.42 1.46 1.60 30.00 1.65 1.66 1.70 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH CONDITION PATH CONDITION D1->Q2N C1&C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.19 1.28 1.39 1.18 1.28 1.39 1.20 1.30 1.40 1.32 1.42 1.52 30.00 1.78 1.77 1.79 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION D1->Q2N C1&C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.91 1.02 1.14 0.98 1.10 1.21 1.10 1.21 1.33 1.35 1.47 1.58 30.00 1.49 1.56 1.68 1.93 Rev.1.01.10 2 - 664 TC200G SERIES DATA SHEET LS2P LS2P 16/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH DELAY (ns) 1.00 5.00 10.00 1.25 1.35 1.45 1.25 1.35 1.45 1.27 1.36 1.47 1.38 1.48 1.58 30.00 1.84 1.84 1.86 1.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&D2&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.93 1.00 1.12 1.39 5.00 1.04 1.12 1.24 1.50 FUNCTION FALL 10.00 1.16 1.23 1.35 1.61 30.00 1.51 1.58 1.70 1.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.04 1.13 1.24 1.05 1.14 1.25 1.08 1.18 1.28 1.22 1.32 1.42 30.00 1.63 1.64 1.67 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION D1->Q2N C1&~C2&~D2&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.92 1.03 1.15 1.00 1.11 1.22 1.12 1.23 1.34 1.38 1.50 1.61 30.00 1.50 1.58 1.70 1.96 Rev.1.01.10 2 - 665 TC200G SERIES DATA SHEET LS2P LS2P 17/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q1 C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.50 0.60 0.48 0.58 0.68 0.59 0.68 0.79 0.79 0.89 0.99 30.00 1.00 1.08 1.18 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION D2->Q1 C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.59 0.60 0.67 0.91 5.00 0.71 0.72 0.79 1.03 FUNCTION FALL 10.00 0.82 0.84 0.91 1.15 30.00 1.19 1.21 1.28 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.51 0.62 0.50 0.60 0.70 0.61 0.70 0.81 0.82 0.92 1.03 30.00 1.02 1.10 1.20 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.66 0.79 0.91 0.68 0.80 0.92 0.74 0.87 0.99 0.99 1.12 1.24 30.00 1.29 1.30 1.37 1.62 Rev.1.01.10 2 - 666 TC200G SERIES DATA SHEET LS2P LS2P 18/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0540 0.14 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.50 0.60 0.48 0.58 0.68 0.59 0.68 0.79 0.81 0.91 1.01 30.00 1.00 1.07 1.18 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1 0.0274 0.16 PATH CONDITION PATH CONDITION D2->Q1 ~C1&C2&~D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.51 0.58 0.79 5.00 0.60 0.63 0.70 0.91 FUNCTION FALL 10.00 0.71 0.74 0.81 1.02 30.00 1.07 1.09 1.16 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH CONDITION PATH CONDITION D2->Q1N C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.05 1.14 1.24 1.07 1.16 1.25 1.13 1.22 1.32 1.39 1.48 1.57 30.00 1.59 1.61 1.67 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION D2->Q1N C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.93 1.03 0.90 1.01 1.11 1.01 1.12 1.21 1.22 1.33 1.43 30.00 1.33 1.41 1.52 1.74 Rev.1.01.10 2 - 667 TC200G SERIES DATA SHEET LS2P LS2P 19/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH DELAY (ns) 1.00 5.00 10.00 1.15 1.24 1.33 1.16 1.25 1.35 1.23 1.32 1.41 1.49 1.58 1.67 30.00 1.69 1.70 1.77 2.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.84 0.92 1.03 1.26 5.00 0.95 1.03 1.14 1.37 FUNCTION FALL 10.00 1.05 1.13 1.24 1.47 30.00 1.35 1.44 1.54 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0460 0.16 PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.92 1.01 1.11 0.94 1.03 1.13 1.01 1.10 1.20 1.24 1.33 1.43 30.00 1.46 1.48 1.55 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q1N 0.0200 0.23 PATH CONDITION PATH CONDITION D2->Q1N ~C1&C2&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.82 0.93 1.03 0.90 1.01 1.11 1.01 1.12 1.22 1.24 1.35 1.45 30.00 1.33 1.41 1.52 1.75 Rev.1.01.10 2 - 668 TC200G SERIES DATA SHEET LS2P LS2P 20/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q2 C2&C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 1.16 1.23 1.31 1.24 1.31 1.39 1.34 1.42 1.50 1.56 1.63 1.72 30.00 1.63 1.71 1.81 2.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION D2->Q2 C2&C1&~D1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.37 1.39 1.46 1.71 5.00 1.45 1.46 1.53 1.78 FUNCTION FALL 10.00 1.52 1.54 1.60 1.86 30.00 1.76 1.78 1.85 2.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.18 1.25 1.34 1.26 1.33 1.42 1.37 1.44 1.53 1.60 1.67 1.75 30.00 1.65 1.73 1.84 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 1.47 1.54 1.62 1.48 1.56 1.63 1.55 1.62 1.70 1.81 1.88 1.96 30.00 1.86 1.87 1.94 2.20 Rev.1.01.10 2 - 669 TC200G SERIES DATA SHEET LS2P LS2P 21/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0441 0.08 PATH DELAY (ns) 1.00 5.00 10.00 1.16 1.23 1.31 1.24 1.31 1.39 1.35 1.42 1.50 1.58 1.65 1.74 30.00 1.63 1.71 1.81 2.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2 0.0176 0.13 PATH CONDITION PATH CONDITION D2->Q2 C2&~C1&~D1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.25 1.27 1.34 1.56 5.00 1.32 1.34 1.41 1.64 FUNCTION FALL 10.00 1.39 1.41 1.48 1.71 30.00 1.63 1.66 1.73 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH CONDITION PATH CONDITION D2->Q2N C2&C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.14 1.24 1.34 1.16 1.25 1.36 1.23 1.32 1.43 1.48 1.58 1.68 30.00 1.73 1.75 1.82 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION D2->Q2N C2&C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.91 1.03 1.14 0.99 1.11 1.22 1.10 1.21 1.32 1.31 1.43 1.54 30.00 1.49 1.57 1.68 1.89 Rev.1.01.10 2 - 670 TC200G SERIES DATA SHEET LS2P LS2P 22/27 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH DELAY (ns) 1.00 5.00 10.00 1.24 1.33 1.44 1.25 1.35 1.46 1.32 1.41 1.52 1.58 1.67 1.78 30.00 1.83 1.84 1.91 2.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&D1&C3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.93 1.01 1.12 1.35 5.00 1.05 1.13 1.24 1.46 FUNCTION FALL 10.00 1.16 1.24 1.35 1.58 30.00 1.51 1.59 1.70 1.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0542 0.12 PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 1.02 1.11 1.22 1.04 1.13 1.24 1.11 1.20 1.31 1.33 1.43 1.53 30.00 1.61 1.63 1.70 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q2N 0.0264 0.13 PATH CONDITION PATH CONDITION D2->Q2N C2&~C1&~D1&C3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.91 1.03 1.14 0.99 1.11 1.22 1.10 1.21 1.33 1.33 1.45 1.56 30.00 1.49 1.57 1.68 1.91 Rev.1.01.10 2 - 671 TC200G SERIES DATA SHEET LS2P LS2P 23/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE CLOCK C1 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C2 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.749 0.720 0.38 0.773 0.741 1.00 0.811 0.777 3.00 0.937 0.894 TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE 1.00 0.670 0.689 0.720 0.821 3.00 0.511 0.520 0.536 0.586 CLOCK C1 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.129 0.083 0.38 0.071 0.026 1.00 -0.026 -0.070 3.00 -0.340 -0.379 1.00 0.006 -0.050 -0.143 -0.445 3.00 -0.243 -0.294 -0.380 -0.657 CONDITION ~C2 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.207 0.237 0.38 0.188 0.221 1.00 0.156 0.195 3.00 0.053 0.110 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.732 0.763 0.38 0.792 0.823 1.00 0.893 0.923 3.00 1.218 1.245 1.00 0.816 0.874 0.973 1.290 3.00 0.985 1.041 1.134 1.436 1.00 0.286 0.276 0.259 0.206 3.00 0.446 0.454 0.468 0.515 Rev.1.01.10 2 - 672 TC200G SERIES DATA SHEET LS2P LS2P 24/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE CLOCK C3 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION C1&~C2 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 1.340 1.309 0.38 1.356 1.325 1.00 1.381 1.351 3.00 1.464 1.434 TIMING CONDITION DATA D1 ITEM SETUP CLOCK NEGEDGE 1.00 1.258 1.273 1.299 1.383 3.00 1.091 1.107 1.133 1.219 CLOCK C3 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.474 -0.456 0.38 -0.529 -0.512 1.00 -0.623 -0.605 3.00 -0.925 -0.907 1.00 -0.426 -0.482 -0.575 -0.877 3.00 -0.330 -0.386 -0.479 -0.780 CONDITION C1&~C2 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.684 -0.653 0.38 -0.699 -0.668 1.00 -0.725 -0.694 3.00 -0.808 -0.778 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 1.131 1.113 0.38 1.187 1.169 1.00 1.280 1.262 3.00 1.581 1.563 1.00 1.083 1.138 1.232 1.533 3.00 0.985 1.041 1.134 1.436 1.00 -0.601 -0.617 -0.643 -0.727 3.00 -0.433 -0.450 -0.477 -0.564 Rev.1.01.10 2 - 673 TC200G SERIES DATA SHEET LS2P LS2P 25/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE CLOCK C2 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION ~C1 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.754 0.712 0.38 0.794 0.751 1.00 0.861 0.816 3.00 1.077 1.026 TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE 1.00 0.642 0.679 0.740 0.940 3.00 0.415 0.446 0.497 0.663 CLOCK C2 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.136 0.096 0.38 0.084 0.045 1.00 -0.002 -0.039 3.00 -0.281 -0.311 1.00 0.028 -0.020 -0.101 -0.363 3.00 -0.189 -0.231 -0.301 -0.528 CONDITION ~C1 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.207 0.249 0.38 0.171 0.216 1.00 0.111 0.160 3.00 -0.082 -0.021 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.750 0.774 0.38 0.804 0.827 1.00 0.893 0.916 3.00 1.182 1.201 1.00 0.815 0.866 0.953 1.233 3.00 0.944 0.993 1.074 1.336 1.00 0.320 0.291 0.241 0.081 3.00 0.549 0.532 0.503 0.409 Rev.1.01.10 2 - 674 TC200G SERIES DATA SHEET LS2P LS2P 26/27 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE CLOCK C3 DATA HIGH D1 C1 Q1 D1 C1 Q1 CONDITION C2&~C1 WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 1.281 1.250 0.38 1.323 1.293 1.00 1.394 1.363 3.00 1.622 1.592 TIMING CONDITION DATA D2 ITEM SETUP CLOCK NEGEDGE 1.00 1.199 1.241 1.312 1.541 3.00 1.032 1.075 1.146 1.377 CLOCK C3 DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.481 -0.463 0.38 -0.531 -0.513 1.00 -0.615 -0.596 3.00 -0.884 -0.866 1.00 -0.433 -0.483 -0.566 -0.836 3.00 -0.335 -0.385 -0.469 -0.739 CONDITION C2&~C1 WAVE_FORM D1 C1 Q1 D1 C1 Q1 HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.627 -0.595 0.38 -0.669 -0.638 1.00 -0.739 -0.708 3.00 -0.966 -0.936 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 1.136 1.118 0.38 1.186 1.168 1.00 1.269 1.252 3.00 1.540 1.522 1.00 1.088 1.138 1.222 1.492 3.00 0.992 1.042 1.126 1.395 1.00 -0.543 -0.585 -0.656 -0.885 3.00 -0.375 -0.418 -0.490 -0.722 Rev.1.01.10 2 - 675 TC200G SERIES DATA SHEET LS2P LS2P 27/27 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK C1 ITEM D1 POSLIMIT CONDITION --WAVE_FORM tw(H) C1 Q1 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 1.070 CONDITION --WAVE_FORM Q1 tw(H) C3 Q2 MINIMUM PULSE WIDTH CONDITION CLOCK C3 ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION --WAVE_FORM D1 tw(H) C1 Q1 MINIMUM PULSE WIDTH CONDITION CLOCK C2 ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 1.100 Rev.1.01.10 2 - 676 TC200G SERIES DATA SHEET LSR1 CELL NAME LSR1 FUNCTION SR-LATCH with SEPARATE GATE SD and RD LSR1 CELL COUNT GATE 4 I/O 0 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL SD LSR1 SD S1 S1 QQ S2 S2 R1 R1 R2 R2 RD RD QNQN TRUTH TABLE INPUT OUTPUT SD RD S1+S2 R1+R2 Q QN L H X H H L H L H X L H H H L H H L H H H L L H H H H H HOLD ALL OTHER COMBINATIONS H* H* *:Inhibit from changing directly to HOLD Verilog-HDL DESCRIPTION LSR1 inst(Q,QN,S1,S2,SD,R1,R2,RD); VHDL DESCRIPTION inst:LSR1 port map(Q,QN,S1,S2,SD,R1, R2,RD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME S1 S2,R2 SD,RD R1 (LU) LOAD 1.08 1.05 0.98 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q,QN 19.7 Rev.1.01.10 2 - 677 TC200G SERIES DATA SHEET LSR1 LSR1 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0837 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.48 0.72 0.98 30.00 1.61 1.65 1.72 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1784 0.44 PATH CONDITION PATH CONDITION R1->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.27 0.31 0.39 5.00 0.50 0.52 0.57 0.70 FUNCTION RISE 10.00 0.81 0.83 0.88 1.03 30.00 2.05 2.07 2.11 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0837 0.29 PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.48 0.72 0.98 30.00 1.61 1.65 1.72 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1784 0.44 PATH CONDITION PATH CONDITION R2->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.53 0.84 0.28 0.53 0.85 0.28 0.54 0.85 0.28 0.56 0.88 30.00 2.07 2.09 2.08 2.11 Rev.1.01.10 2 - 678 TC200G SERIES DATA SHEET LSR1 LSR1 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0837 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.48 0.72 0.98 30.00 1.61 1.65 1.72 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1784 0.44 PATH CONDITION PATH CONDITION RD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.22 0.26 0.30 5.00 0.33 0.36 0.41 0.49 FUNCTION RISE 10.00 0.50 0.52 0.58 0.70 30.00 1.16 1.19 1.24 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1785 0.43 PATH CONDITION PATH CONDITION S1->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.50 0.81 0.27 0.52 0.83 0.31 0.57 0.88 0.39 0.70 1.03 30.00 2.05 2.07 2.11 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0837 0.29 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.48 0.72 0.98 30.00 1.61 1.65 1.72 1.95 Rev.1.01.10 2 - 679 TC200G SERIES DATA SHEET LSR1 LSR1 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S2->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1785 0.43 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.53 0.83 0.28 0.53 0.84 0.28 0.53 0.85 0.27 0.55 0.88 30.00 2.07 2.08 2.08 2.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0837 0.29 PATH CONDITION PATH CONDITION Q->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.26 0.30 0.35 0.48 5.00 0.44 0.49 0.55 0.72 FUNCTION FALL 10.00 0.68 0.72 0.79 0.98 30.00 1.61 1.65 1.72 1.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1785 0.43 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.33 0.50 0.22 0.36 0.52 0.26 0.41 0.58 0.30 0.49 0.70 30.00 1.16 1.19 1.24 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0837 0.29 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.48 0.72 0.98 30.00 1.61 1.65 1.72 1.95 Rev.1.01.10 2 - 680 TC200G SERIES DATA SHEET LSR1 LSR1 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK R1 ITEM NEGLIMIT R1 Q CONDITION RD&SD&(S1 S2)&~R2 WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK R2 ITEM NEGLIMIT R1 Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK S1 ITEM NEGLIMIT S1 Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION RD&SD&(R1 R2)&~S2 WAVE_FORM CONDITION RD&SD&(S1 S2)&~R1 WAVE_FORM 0.01 to 3.00 0.710 0.01 to 3.00 0.690 0.01 to 3.00 0.710 Rev.1.01.10 2 - 681 TC200G SERIES DATA SHEET LSR1 LSR1 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK S2 ITEM NEGLIMIT S1 Q CONDITION RD&SD&(R1 R2)&~S1 WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.690 Rev.1.01.10 2 - 682 TC200G SERIES DATA SHEET LSR1P CELL NAME LSR1P FUNCTION SR-LATCH with SEPARATE GATE SD and RD LSR1P CELL COUNT GATE 8 I/O 0 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL SD LSR1P SD S1 S1 QQ S2 S2 R1 R1 R2 R2 RD RD QNQN TRUTH TABLE INPUT OUTPUT SD RD S1+S2 R1+R2 Q QN L H X H H L H L H X L H H H L H H L H H H L L H H H H H HOLD ALL OTHER COMBINATIONS H* H* *:Inhibit from changing directly to HOLD Verilog-HDL DESCRIPTION LSR1P inst(Q,QN,S1,S2,SD,R1,R2,RD); VHDL DESCRIPTION inst:LSR1P port map(Q,QN,S1,S2,SD,R1, R2,RD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME S1,R1 S2,R2 SD,RD (LU) LOAD 2.02 2.20 2.11 OUTPUT DRIVE PIN NAME DRIVE (LU) Q,QN 42.4 Rev.1.01.10 2 - 683 TC200G SERIES DATA SHEET LSR1P LSR1P 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0384 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.67 30.00 0.85 0.90 0.96 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0874 0.45 PATH CONDITION PATH CONDITION R1->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.24 0.28 0.37 5.00 0.35 0.37 0.41 0.53 FUNCTION RISE 10.00 0.50 0.52 0.57 0.71 30.00 1.11 1.13 1.18 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0384 0.29 PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.67 30.00 0.85 0.90 0.96 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0874 0.45 PATH CONDITION PATH CONDITION R2->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.38 0.53 0.25 0.38 0.53 0.25 0.38 0.54 0.25 0.40 0.57 30.00 1.14 1.15 1.15 1.19 Rev.1.01.10 2 - 684 TC200G SERIES DATA SHEET LSR1P LSR1P 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0384 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.67 30.00 0.85 0.90 0.96 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0874 0.45 PATH CONDITION PATH CONDITION RD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.18 0.21 0.24 0.29 5.00 0.25 0.28 0.32 0.39 FUNCTION RISE 10.00 0.33 0.36 0.41 0.51 30.00 0.67 0.69 0.75 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0874 0.45 PATH CONDITION PATH CONDITION S1->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.35 0.50 0.24 0.37 0.52 0.28 0.41 0.57 0.37 0.53 0.71 30.00 1.11 1.13 1.18 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0384 0.29 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.67 30.00 0.85 0.90 0.96 1.16 Rev.1.01.10 2 - 685 TC200G SERIES DATA SHEET LSR1P LSR1P 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S2->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0874 0.45 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.38 0.53 0.25 0.38 0.53 0.25 0.38 0.54 0.25 0.40 0.57 30.00 1.14 1.15 1.15 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0384 0.29 PATH CONDITION PATH CONDITION Q->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.26 0.31 0.42 5.00 0.31 0.35 0.41 0.54 FUNCTION FALL 10.00 0.42 0.46 0.52 0.67 30.00 0.85 0.90 0.96 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0874 0.45 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.25 0.33 0.21 0.28 0.36 0.24 0.32 0.41 0.29 0.39 0.51 30.00 0.67 0.69 0.75 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0384 0.29 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.67 30.00 0.85 0.90 0.96 1.16 Rev.1.01.10 2 - 686 TC200G SERIES DATA SHEET LSR1P LSR1P 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK R1 ITEM NEGLIMIT R1 Q CONDITION RD&SD&(S1 S2)&~R2 WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK R2 ITEM NEGLIMIT R1 Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK S1 ITEM NEGLIMIT S1 Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION RD&SD&(R1 R2)&~S2 WAVE_FORM CONDITION RD&SD&(S1 S2)&~R1 WAVE_FORM 0.01 to 3.00 0.710 0.01 to 3.00 0.690 0.01 to 3.00 0.710 Rev.1.01.10 2 - 687 TC200G SERIES DATA SHEET LSR1P LSR1P 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK S2 ITEM NEGLIMIT S1 Q CONDITION RD&SD&(R1 R2)&~S1 WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.690 Rev.1.01.10 2 - 688 TC200G SERIES DATA SHEET LSR2 CELL NAME LSR2 FUNCTION SR-LATCH with COMMON GATE SD and RD 4 LOGIC SYMBOL 0 LSR2 CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. S S SD LSR2 SD QQ QNQN TRUTH TABLE INPUT OUTPUT SD RD G+S G+R Q QN L H X H H L H L H X L H H H L H H L H H H L L H H H H H HOLD ALL OTHER COMBINATIONS H* H* *:Inhibit from changing directly to HOLD RR GG RD RD Verilog-HDL DESCRIPTION LSR2 inst(Q,QN,S,R,G,SD,RD); VHDL DESCRIPTION inst:LSR2 port map(Q,QN,S,R,G,SD,RD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME S R G SD RD (LU) LOAD 1.02 1.03 2.11 1.06 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 18.3 QN 18.2 Rev.1.01.10 2 - 689 TC200G SERIES DATA SHEET LSR2 LSR2 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1784 0.44 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.51 0.82 0.27 0.53 0.84 0.31 0.57 0.88 0.40 0.70 1.03 30.00 2.05 2.08 2.11 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1003 0.29 PATH CONDITION PATH CONDITION G->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.29 0.38 0.55 5.00 0.44 0.52 0.64 0.90 FUNCTION FALL 10.00 0.72 0.80 0.94 1.26 30.00 1.80 1.89 2.04 2.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1784 0.44 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.50 0.81 0.27 0.52 0.84 0.31 0.57 0.88 0.40 0.70 1.03 30.00 2.05 2.07 2.11 2.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1003 0.29 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.44 0.71 0.29 0.52 0.80 0.38 0.64 0.94 0.55 0.90 1.26 30.00 1.80 1.89 2.04 2.47 Rev.1.01.10 2 - 690 TC200G SERIES DATA SHEET LSR2 LSR2 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1003 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.47 0.71 0.98 30.00 1.61 1.66 1.72 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1784 0.44 PATH CONDITION PATH CONDITION R->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.28 0.28 0.28 5.00 0.53 0.54 0.54 0.56 FUNCTION RISE 10.00 0.84 0.85 0.85 0.88 30.00 2.07 2.09 2.08 2.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1003 0.29 PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.47 0.71 0.98 30.00 1.61 1.66 1.72 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1784 0.44 PATH CONDITION PATH CONDITION RD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.34 0.51 0.23 0.37 0.54 0.25 0.41 0.59 0.28 0.48 0.70 30.00 1.20 1.22 1.28 1.45 Rev.1.01.10 2 - 691 TC200G SERIES DATA SHEET LSR2 LSR2 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1784 0.44 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.53 0.84 0.28 0.53 0.84 0.28 0.53 0.85 0.28 0.56 0.88 30.00 2.07 2.09 2.08 2.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1003 0.29 PATH CONDITION PATH CONDITION Q->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.26 0.30 0.35 0.47 5.00 0.44 0.49 0.55 0.71 FUNCTION FALL 10.00 0.68 0.72 0.79 0.97 30.00 1.61 1.65 1.72 1.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1784 0.44 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.34 0.51 0.23 0.37 0.54 0.26 0.41 0.59 0.28 0.48 0.70 30.00 1.20 1.22 1.28 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1003 0.29 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.44 0.68 0.30 0.49 0.72 0.35 0.55 0.79 0.47 0.71 0.97 30.00 1.61 1.65 1.72 1.94 Rev.1.01.10 2 - 692 TC200G SERIES DATA SHEET LSR2 LSR2 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM NEGLIMIT G CONDITION RD&SD WAVE_FORM tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.730 MINIMUM PULSE WIDTH CONDITION CLOCK R ITEM NEGLIMIT R Q CONDITION RD&SD&S&~G WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK S ITEM NEGLIMIT S Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION RD&SD&R&~G WAVE_FORM 0.01 to 3.00 0.720 0.01 to 3.00 0.720 Rev.1.01.10 2 - 693 TC200G SERIES DATA SHEET LSR2P CELL NAME LSR2P FUNCTION SR-LATCH with COMMON GATE SD and RD 8 LOGIC SYMBOL 0 LSR2P CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. S S SD LSR2P SD QQ QNQN TRUTH TABLE INPUT OUTPUT SD RD G+S G+R Q QN L H X H H L H L H X L H H H L H H L H H H L L H H H H H HOLD ALL OTHER COMBINATIONS H* H* *:Inhibit from changing directly to HOLD RR GG RD RD Verilog-HDL DESCRIPTION LSR2P inst(Q,QN,S,R,G,SD,RD); VHDL DESCRIPTION inst:LSR2P port map(Q,QN,S,R,G,SD,RD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME S,R G SD,RD (LU) LOAD 2.02 4.53 2.12 OUTPUT DRIVE PIN NAME DRIVE (LU) Q,QN 38.4 Rev.1.01.10 2 - 694 TC200G SERIES DATA SHEET LSR2P LSR2P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0874 0.45 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.35 0.51 0.25 0.37 0.53 0.29 0.42 0.58 0.37 0.53 0.71 30.00 1.12 1.14 1.18 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0468 0.29 PATH CONDITION PATH CONDITION G->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.18 0.26 0.34 0.48 5.00 0.29 0.37 0.48 0.67 FUNCTION FALL 10.00 0.42 0.50 0.62 0.87 30.00 0.94 1.03 1.17 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0875 0.45 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.35 0.51 0.25 0.37 0.53 0.29 0.42 0.58 0.37 0.53 0.71 30.00 1.12 1.14 1.18 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0468 0.29 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.29 0.42 0.26 0.37 0.50 0.34 0.48 0.62 0.48 0.67 0.87 30.00 0.94 1.03 1.17 1.53 Rev.1.01.10 2 - 695 TC200G SERIES DATA SHEET LSR2P LSR2P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0468 0.29 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.68 30.00 0.85 0.90 0.96 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0875 0.45 PATH CONDITION PATH CONDITION R->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.25 0.25 0.25 5.00 0.37 0.38 0.38 0.40 FUNCTION RISE 10.00 0.53 0.53 0.54 0.57 30.00 1.14 1.15 1.15 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0468 0.29 PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.68 30.00 0.85 0.90 0.96 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0875 0.45 PATH CONDITION PATH CONDITION RD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.25 0.33 0.21 0.28 0.36 0.24 0.31 0.41 0.27 0.37 0.49 30.00 0.67 0.69 0.75 0.88 Rev.1.01.10 2 - 696 TC200G SERIES DATA SHEET LSR2P LSR2P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0874 0.45 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.37 0.53 0.25 0.38 0.53 0.25 0.38 0.54 0.25 0.40 0.57 30.00 1.14 1.15 1.15 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0468 0.29 PATH CONDITION PATH CONDITION Q->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.26 0.31 0.42 5.00 0.31 0.35 0.41 0.54 FUNCTION FALL 10.00 0.42 0.46 0.52 0.67 30.00 0.85 0.90 0.96 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0874 0.45 PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.25 0.33 0.21 0.28 0.36 0.24 0.31 0.41 0.27 0.37 0.49 30.00 0.67 0.69 0.75 0.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0468 0.29 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.42 0.26 0.35 0.46 0.31 0.41 0.52 0.42 0.54 0.67 30.00 0.85 0.90 0.96 1.16 Rev.1.01.10 2 - 697 TC200G SERIES DATA SHEET LSR2P LSR2P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM NEGLIMIT G CONDITION RD&SD WAVE_FORM tw(L) NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.730 MINIMUM PULSE WIDTH CONDITION CLOCK R ITEM NEGLIMIT R Q CONDITION RD&SD&S&~G WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK S ITEM NEGLIMIT S Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION RD&SD&R&~G WAVE_FORM 0.01 to 3.00 0.720 0.01 to 3.00 0.720 Rev.1.01.10 2 - 698 TC200G SERIES DATA SHEET MUX21H CELL NAME MUX21H FUNCTION 2 TO 1 MULTIPLEXER 4 LOGIC SYMBOL TRUTH TABLE INPUT S A L L L H H X H X MUX21H A A BB SS ZZ MUX21H CELL COUNT GATE I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B X X L H OUTPUT Z L H L H Verilog-HDL DESCRIPTION MUX21H inst(Z,A,B,S); VHDL DESCRIPTION inst:MUX21H port map(Z,A,B,S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B S (LU) LOAD 0.99 1.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 64.4 Rev.1.01.10 2 - 699 TC200G SERIES DATA SHEET MUX21H MUX21H 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.29 0.39 0.28 0.37 0.46 0.35 0.44 0.54 0.47 0.57 0.67 30.00 0.76 0.84 0.91 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.13 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.31 0.34 0.42 0.58 5.00 0.44 0.47 0.55 0.71 FUNCTION FALL 10.00 0.57 0.61 0.68 0.85 30.00 1.05 1.09 1.16 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.29 0.39 0.28 0.37 0.47 0.35 0.44 0.55 0.48 0.57 0.68 30.00 0.77 0.84 0.92 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.13 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.46 0.60 0.37 0.50 0.63 0.44 0.57 0.71 0.61 0.74 0.88 30.00 1.08 1.12 1.19 1.37 Rev.1.01.10 2 - 700 TC200G SERIES DATA SHEET MUX21H MUX21H 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.34 0.44 0.29 0.38 0.47 0.35 0.44 0.54 0.49 0.58 0.67 30.00 0.81 0.85 0.91 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.13 PATH CONDITION PATH CONDITION S->Z ~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.33 0.44 0.53 5.00 0.38 0.46 0.56 0.66 FUNCTION FALL 10.00 0.52 0.59 0.70 0.79 30.00 1.00 1.08 1.18 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.25 0.35 0.24 0.33 0.43 0.30 0.39 0.49 0.41 0.50 0.61 30.00 0.72 0.80 0.87 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.13 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.38 0.52 0.29 0.41 0.55 0.35 0.48 0.61 0.51 0.64 0.78 30.00 0.99 1.02 1.09 1.26 Rev.1.01.10 2 - 701 TC200G SERIES DATA SHEET MUX21HP CELL NAME MUX21HP FUNCTION 2 TO 1 MULTIPLEXER 5 LOGIC SYMBOL TRUTH TABLE INPUT S A L L L H H X H X MUX21HP AA BB SS ZZ MUX21HP CELL COUNT GATE I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B X X L H OUTPUT Z L H L H Verilog-HDL DESCRIPTION MUX21HP inst(Z,A,B,S); VHDL DESCRIPTION inst:MUX21HP port map(Z,A,B,S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B S (LU) LOAD 0.99 1.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 117.5 Rev.1.01.10 2 - 702 TC200G SERIES DATA SHEET MUX21HP MUX21HP 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0266 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.29 0.35 0.32 0.37 0.43 0.40 0.46 0.52 0.57 0.62 0.68 30.00 0.56 0.63 0.72 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0245 0.17 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.38 0.42 0.49 0.68 5.00 0.47 0.50 0.58 0.77 FUNCTION FALL 10.00 0.56 0.59 0.67 0.86 30.00 0.88 0.91 0.99 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0266 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.28 0.34 0.31 0.36 0.42 0.39 0.44 0.50 0.54 0.59 0.65 30.00 0.55 0.62 0.71 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0245 0.17 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.48 0.57 0.43 0.51 0.61 0.50 0.59 0.68 0.70 0.78 0.88 30.00 0.89 0.92 1.00 1.19 Rev.1.01.10 2 - 703 TC200G SERIES DATA SHEET MUX21HP MUX21HP 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0266 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.33 0.39 0.31 0.37 0.43 0.38 0.43 0.49 0.52 0.57 0.63 30.00 0.59 0.63 0.69 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0245 0.17 PATH CONDITION PATH CONDITION S->Z ~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.30 0.37 0.51 0.64 5.00 0.39 0.46 0.60 0.72 FUNCTION FALL 10.00 0.48 0.55 0.69 0.81 30.00 0.80 0.87 1.00 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0266 0.11 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.24 0.30 0.27 0.32 0.38 0.35 0.41 0.47 0.50 0.56 0.62 30.00 0.50 0.58 0.67 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0245 0.17 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.40 0.49 0.34 0.43 0.52 0.41 0.49 0.59 0.58 0.66 0.76 30.00 0.81 0.83 0.90 1.07 Rev.1.01.10 2 - 704 TC200G SERIES DATA SHEET MUX21L CELL NAME MUX21L FUNCTION 2 TO 1 INVERTING MULTIPLEXER 3 LOGIC SYMBOL TRUTH TABLE INPUT S A L L L H H X H X MUX21L AA BB SS ZZ MUX21L CELL COUNT GATE I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B X X L H OUTPUT Z H L H L Verilog-HDL DESCRIPTION MUX21L inst(Z,A,B,S); VHDL DESCRIPTION inst:MUX21L port map(Z,A,B,S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B S (LU) LOAD 3.85 3.84 2.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 67.2 Rev.1.01.10 2 - 705 TC200G SERIES DATA SHEET MUX21L MUX21L 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0471 0.06 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.27 0.11 0.19 0.28 0.10 0.20 0.31 0.04 0.18 0.32 30.00 0.59 0.61 0.66 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0347 0.07 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.17 0.24 0.38 5.00 0.21 0.28 0.38 0.58 FUNCTION FALL 10.00 0.32 0.39 0.51 0.77 30.00 0.73 0.81 0.95 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0471 0.06 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.17 0.26 0.11 0.19 0.27 0.10 0.20 0.30 0.04 0.18 0.32 30.00 0.58 0.60 0.65 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0347 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.23 0.34 0.18 0.29 0.40 0.24 0.38 0.52 0.38 0.58 0.77 30.00 0.75 0.82 0.95 1.34 Rev.1.01.10 2 - 706 TC200G SERIES DATA SHEET MUX21L MUX21L 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0471 0.06 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.27 0.18 0.25 0.33 0.23 0.30 0.39 0.30 0.38 0.47 30.00 0.59 0.66 0.72 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0347 0.07 PATH CONDITION PATH CONDITION S->Z ~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.19 0.23 0.29 0.42 5.00 0.29 0.32 0.39 0.53 FUNCTION FALL 10.00 0.40 0.43 0.49 0.64 30.00 0.81 0.84 0.90 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0471 0.06 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.28 0.37 0.25 0.32 0.40 0.31 0.38 0.46 0.43 0.50 0.58 30.00 0.70 0.73 0.79 0.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0347 0.07 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.28 0.39 0.27 0.37 0.48 0.35 0.45 0.56 0.46 0.56 0.67 30.00 0.80 0.89 0.97 1.08 Rev.1.01.10 2 - 707 TC200G SERIES DATA SHEET MUX21LP CELL NAME MUX21LP FUNCTION 2 TO 1 INVERTING MULTIPLEXER 4 LOGIC SYMBOL TRUTH TABLE INPUT S A L L L H H X H X MUX21LP AA BB SS ZZ MUX21LP CELL COUNT GATE I/O 0 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. B X X L H OUTPUT Z H L H L Verilog-HDL DESCRIPTION MUX21LP inst(Z,A,B,S); VHDL DESCRIPTION inst:MUX21LP port map(Z,A,B,S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B S (LU) LOAD 5.25 5.24 2.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 112.2 Rev.1.01.10 2 - 708 TC200G SERIES DATA SHEET MUX21LP MUX21LP 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0224 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.16 0.21 0.12 0.17 0.22 0.11 0.17 0.22 0.02 0.10 0.19 30.00 0.37 0.38 0.41 0.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.10 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.13 0.18 0.24 0.40 5.00 0.19 0.25 0.33 0.51 FUNCTION FALL 10.00 0.26 0.32 0.41 0.63 30.00 0.49 0.55 0.68 0.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0224 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.15 0.19 0.12 0.16 0.21 0.10 0.16 0.22 0.02 0.10 0.18 30.00 0.36 0.37 0.41 0.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.10 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.21 0.28 0.19 0.26 0.33 0.25 0.33 0.42 0.39 0.51 0.63 30.00 0.51 0.56 0.68 0.99 Rev.1.01.10 2 - 709 TC200G SERIES DATA SHEET MUX21LP MUX21LP 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z ~A&B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0224 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.16 0.21 0.20 0.24 0.29 0.27 0.31 0.36 0.37 0.42 0.47 30.00 0.37 0.45 0.52 0.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.10 PATH CONDITION PATH CONDITION S->Z ~A&B PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.22 0.25 0.32 0.47 5.00 0.28 0.32 0.38 0.54 FUNCTION FALL 10.00 0.35 0.38 0.45 0.61 30.00 0.58 0.61 0.68 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0224 0.07 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.26 0.31 0.26 0.30 0.35 0.32 0.36 0.41 0.44 0.49 0.53 30.00 0.47 0.51 0.57 0.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.10 PATH CONDITION PATH CONDITION S->Z A&~B LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.25 0.32 0.28 0.34 0.41 0.39 0.45 0.52 0.50 0.57 0.63 30.00 0.55 0.65 0.75 0.87 Rev.1.01.10 2 - 710 TC200G SERIES DATA SHEET MUX41 CELL NAME MUX41 FUNCTION 4 TO 1 MULTIPLEXER 6 LOGIC SYMBOL TRUTH TABLE INPUT B L L H H 0 MUX41 CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. MUX41 D0 D0 D1 D1 D2 D2 D3 D3 AB AB ZZ A L H L H OUTPUT Z D0 D1 D2 D3 Verilog-HDL DESCRIPTION MUX41 inst(Z,D0,D1,D2,D3,A,B); VHDL DESCRIPTION inst:MUX41 port map(Z,D0,D1,D2,D3,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME D0 D1 D2 D3 A B (LU) LOAD 3.50 3.58 3.35 3.41 3.08 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 42.2 Rev.1.01.10 2 - 711 TC200G SERIES DATA SHEET MUX41 MUX41 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~D2&D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.55 0.73 0.43 0.58 0.76 0.48 0.64 0.81 0.60 0.76 0.94 30.00 1.41 1.45 1.50 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION A->Z B&~D2&D3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.39 0.45 0.50 0.59 5.00 0.53 0.59 0.64 0.73 FUNCTION FALL 10.00 0.67 0.74 0.79 0.88 30.00 1.19 1.25 1.30 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH CONDITION PATH CONDITION A->Z B&D2&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.56 0.74 0.50 0.66 0.83 0.60 0.75 0.93 0.72 0.88 1.06 30.00 1.43 1.52 1.62 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION A->Z B&D2&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.67 0.81 0.56 0.70 0.84 0.63 0.77 0.91 0.77 0.91 1.05 30.00 1.32 1.35 1.42 1.56 Rev.1.01.10 2 - 712 TC200G SERIES DATA SHEET MUX41 MUX41 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&~D0&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.55 0.73 0.43 0.58 0.76 0.49 0.64 0.81 0.61 0.76 0.94 30.00 1.41 1.44 1.50 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION A->Z ~B&~D0&D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.38 0.45 0.50 0.59 5.00 0.52 0.58 0.64 0.73 FUNCTION FALL 10.00 0.66 0.73 0.78 0.88 30.00 1.17 1.24 1.29 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH CONDITION PATH CONDITION A->Z ~B&D0&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.56 0.74 0.50 0.65 0.83 0.60 0.75 0.93 0.73 0.88 1.06 30.00 1.42 1.52 1.61 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION A->Z ~B&D0&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.80 0.55 0.69 0.83 0.62 0.76 0.90 0.76 0.90 1.04 30.00 1.31 1.34 1.41 1.55 Rev.1.01.10 2 - 713 TC200G SERIES DATA SHEET MUX41 MUX41 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&~D1&D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.63 0.33 0.48 0.66 0.39 0.54 0.72 0.52 0.67 0.84 30.00 1.32 1.35 1.40 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION B->Z A&~D1&D3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.23 0.31 0.42 0.53 5.00 0.37 0.45 0.55 0.66 FUNCTION FALL 10.00 0.51 0.59 0.69 0.80 30.00 1.02 1.10 1.20 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH CONDITION PATH CONDITION B->Z A&D1&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.52 0.28 0.43 0.60 0.35 0.50 0.67 0.47 0.62 0.80 30.00 1.21 1.29 1.36 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION B->Z A&D1&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.51 0.27 0.40 0.54 0.33 0.46 0.60 0.47 0.61 0.75 30.00 1.01 1.04 1.11 1.26 Rev.1.01.10 2 - 714 TC200G SERIES DATA SHEET MUX41 MUX41 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&~D0&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.63 0.33 0.48 0.66 0.39 0.54 0.72 0.52 0.67 0.84 30.00 1.32 1.35 1.40 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION B->Z ~A&~D0&D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.23 0.31 0.42 0.53 5.00 0.37 0.45 0.55 0.66 FUNCTION FALL 10.00 0.51 0.59 0.69 0.80 30.00 1.02 1.10 1.20 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH CONDITION PATH CONDITION B->Z ~A&D0&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.52 0.28 0.43 0.60 0.35 0.50 0.67 0.47 0.62 0.80 30.00 1.21 1.29 1.36 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION B->Z ~A&D0&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.51 0.27 0.40 0.54 0.33 0.46 0.60 0.47 0.61 0.75 30.00 1.01 1.04 1.11 1.26 Rev.1.01.10 2 - 715 TC200G SERIES DATA SHEET MUX41 MUX41 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D0->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.47 0.65 0.39 0.54 0.71 0.46 0.61 0.79 0.61 0.76 0.94 30.00 1.34 1.40 1.48 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION D0->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.36 0.38 0.44 0.59 5.00 0.50 0.52 0.58 0.74 FUNCTION FALL 10.00 0.64 0.66 0.73 0.89 30.00 1.15 1.17 1.24 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.49 0.66 0.39 0.54 0.72 0.47 0.62 0.80 0.61 0.76 0.94 30.00 1.35 1.41 1.48 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.49 0.64 0.38 0.52 0.66 0.44 0.58 0.73 0.59 0.74 0.89 30.00 1.14 1.17 1.24 1.41 Rev.1.01.10 2 - 716 TC200G SERIES DATA SHEET MUX41 MUX41 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.48 0.65 0.39 0.54 0.72 0.46 0.62 0.80 0.61 0.76 0.94 30.00 1.34 1.41 1.49 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION D2->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.36 0.38 0.45 0.59 5.00 0.50 0.52 0.59 0.74 FUNCTION FALL 10.00 0.65 0.67 0.73 0.89 30.00 1.16 1.18 1.25 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.12 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.49 0.66 0.39 0.54 0.72 0.47 0.62 0.80 0.61 0.76 0.94 30.00 1.35 1.41 1.49 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0425 0.13 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.50 0.64 0.38 0.52 0.67 0.44 0.59 0.73 0.59 0.74 0.89 30.00 1.16 1.18 1.24 1.41 Rev.1.01.10 2 - 717 TC200G SERIES DATA SHEET MUX41P CELL NAME MUX41P FUNCTION 4 TO 1 MULTIPLEXER 7 LOGIC SYMBOL TRUTH TABLE INPUT B L L H H 0 MUX41P CELL COUNT GATE I/O 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. MUX41P D0 D0 D1 D1 D2 D2 D3 D3 AB AB ZZ A L H L H OUTPUT Z D0 D1 D2 D3 Verilog-HDL DESCRIPTION MUX41P inst(Z,D0,D1,D2,D3,A,B); VHDL DESCRIPTION inst:MUX41P port map(Z,D0,D1,D2,D3,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME D0 D1 D2 D3 A B (LU) LOAD 3.50 3.58 3.35 3.41 3.08 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 94.9 Rev.1.01.10 2 - 718 TC200G SERIES DATA SHEET MUX41P MUX41P 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z B&~D2&D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.46 0.55 0.42 0.50 0.58 0.47 0.55 0.64 0.60 0.67 0.76 30.00 0.87 0.90 0.96 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION A->Z B&~D2&D3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.38 0.44 0.49 0.58 5.00 0.47 0.53 0.58 0.67 FUNCTION FALL 10.00 0.55 0.61 0.66 0.75 30.00 0.81 0.88 0.93 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH CONDITION PATH CONDITION A->Z B&D2&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.48 0.57 0.49 0.57 0.66 0.59 0.67 0.75 0.72 0.79 0.88 30.00 0.89 0.98 1.07 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION A->Z B&D2&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.60 0.68 0.55 0.63 0.72 0.62 0.70 0.79 0.76 0.84 0.93 30.00 0.95 0.98 1.05 1.19 Rev.1.01.10 2 - 719 TC200G SERIES DATA SHEET MUX41P MUX41P 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z ~B&~D0&D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.46 0.55 0.42 0.50 0.58 0.48 0.55 0.64 0.60 0.68 0.77 30.00 0.87 0.90 0.96 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION A->Z ~B&~D0&D1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.37 0.44 0.49 0.59 5.00 0.45 0.52 0.57 0.67 FUNCTION FALL 10.00 0.54 0.60 0.65 0.75 30.00 0.80 0.86 0.92 1.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH CONDITION PATH CONDITION A->Z ~B&D0&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.48 0.56 0.49 0.57 0.65 0.59 0.66 0.75 0.72 0.79 0.88 30.00 0.88 0.97 1.07 1.20 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION A->Z ~B&D0&~D1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.59 0.67 0.54 0.62 0.71 0.61 0.69 0.78 0.75 0.84 0.92 30.00 0.93 0.97 1.04 1.18 Rev.1.01.10 2 - 720 TC200G SERIES DATA SHEET MUX41P MUX41P 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z A&~D1&D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.35 0.44 0.31 0.39 0.47 0.37 0.45 0.53 0.49 0.57 0.65 30.00 0.76 0.79 0.85 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION B->Z A&~D1&D3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.28 0.41 0.53 5.00 0.29 0.37 0.49 0.61 FUNCTION FALL 10.00 0.37 0.45 0.57 0.69 30.00 0.63 0.71 0.83 0.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH CONDITION PATH CONDITION B->Z A&D1&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.28 0.37 0.29 0.36 0.45 0.37 0.45 0.53 0.53 0.61 0.69 30.00 0.69 0.77 0.85 1.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION B->Z A&D1&~D3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.26 0.34 0.42 0.32 0.40 0.48 0.46 0.55 0.63 30.00 0.64 0.67 0.74 0.90 Rev.1.01.10 2 - 721 TC200G SERIES DATA SHEET MUX41P MUX41P 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z ~A&~D0&D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.35 0.44 0.31 0.39 0.47 0.37 0.45 0.53 0.49 0.57 0.65 30.00 0.76 0.79 0.85 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION B->Z ~A&~D0&D2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.28 0.41 0.53 5.00 0.29 0.37 0.49 0.61 FUNCTION FALL 10.00 0.37 0.45 0.57 0.69 30.00 0.63 0.71 0.83 0.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH CONDITION PATH CONDITION B->Z ~A&D0&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.28 0.37 0.29 0.36 0.45 0.37 0.45 0.53 0.53 0.61 0.69 30.00 0.69 0.77 0.85 1.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION B->Z ~A&D0&~D2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.39 0.26 0.34 0.42 0.32 0.40 0.48 0.46 0.55 0.63 30.00 0.64 0.67 0.74 0.90 Rev.1.01.10 2 - 722 TC200G SERIES DATA SHEET MUX41P MUX41P 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D0->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.39 0.47 0.38 0.45 0.54 0.46 0.54 0.63 0.63 0.71 0.79 30.00 0.79 0.86 0.94 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION D0->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.35 0.37 0.44 0.60 5.00 0.43 0.45 0.52 0.69 FUNCTION FALL 10.00 0.51 0.53 0.60 0.77 30.00 0.78 0.79 0.86 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.49 0.38 0.46 0.55 0.47 0.54 0.63 0.63 0.71 0.79 30.00 0.80 0.86 0.95 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.43 0.51 0.37 0.45 0.53 0.44 0.52 0.60 0.60 0.69 0.77 30.00 0.77 0.79 0.86 1.04 Rev.1.01.10 2 - 723 TC200G SERIES DATA SHEET MUX41P MUX41P 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.39 0.48 0.38 0.46 0.54 0.47 0.54 0.63 0.63 0.71 0.80 30.00 0.80 0.86 0.95 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION D2->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.35 0.38 0.44 0.60 5.00 0.44 0.46 0.52 0.69 FUNCTION FALL 10.00 0.52 0.54 0.61 0.77 30.00 0.79 0.81 0.87 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0439 0.09 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.49 0.38 0.46 0.55 0.47 0.54 0.63 0.63 0.71 0.80 30.00 0.81 0.87 0.95 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0199 0.12 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.43 0.52 0.37 0.46 0.54 0.44 0.52 0.61 0.60 0.69 0.77 30.00 0.78 0.80 0.87 1.05 Rev.1.01.10 2 - 724 TC200G SERIES DATA SHEET MUX81 CELL NAME MUX81 FUNCTION 8 TO 1 MULTIPLEXER 15 LOGIC SYMBOL MUX81 D0 D0 D1 D1 D2 D2 D3 D3 D4 D4 D5 D5 D6 D6 D7 D7 ABC ABC ZZ MUX81 CELL COUNT GATE I/O 0 1/17 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT C B L L L L L H L H H L H L H H H H A L H L H L H L H OUTPUT Z D0 D1 D2 D3 D4 D5 D6 D7 Verilog-HDL DESCRIPTION MUX81 inst(Z,D0,D1,D2,D3,D4,D5, D6,D7,A,B,C); VHDL DESCRIPTION inst:MUX81 port map(Z,D0,D1,D2,D3,D4, D5,D6,D7,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME D0 D1,D7 D2 D3 D4 D5 D6 A B C (LU) LOAD 3.46 3.42 3.30 3.39 3.40 3.49 3.36 0.99 3.24 2.11 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 46.3 Rev.1.01.10 2 - 725 TC200G SERIES DATA SHEET MUX81 MUX81 2/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (B&C)&(~D6&D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.95 1.12 0.84 0.99 1.15 0.92 1.06 1.23 1.08 1.23 1.39 30.00 1.75 1.78 1.86 2.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (B&C)&(~D6&D7) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.80 0.89 0.98 1.16 5.00 0.95 1.04 1.14 1.32 FUNCTION FALL 10.00 1.10 1.19 1.29 1.47 30.00 1.60 1.68 1.78 1.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION A->Z (B&C)&(D6&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.79 0.96 0.74 0.88 1.05 0.85 0.99 1.16 1.06 1.21 1.37 30.00 1.59 1.68 1.79 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (B&C)&(D6&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.89 1.04 0.77 0.92 1.07 0.85 1.00 1.15 1.03 1.18 1.33 30.00 1.53 1.56 1.64 1.83 Rev.1.01.10 2 - 726 TC200G SERIES DATA SHEET MUX81 MUX81 3/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (B&~C)&(~D2&D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.86 1.00 1.17 0.89 1.04 1.20 0.96 1.11 1.28 1.13 1.28 1.44 30.00 1.81 1.84 1.91 2.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (B&~C)&(~D2&D3) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.86 0.95 1.04 1.22 5.00 1.02 1.10 1.20 1.38 FUNCTION FALL 10.00 1.17 1.26 1.35 1.53 30.00 1.67 1.76 1.86 2.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION A->Z (B&~C)&(D2&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.84 1.01 0.78 0.93 1.10 0.90 1.04 1.21 1.11 1.26 1.42 30.00 1.65 1.73 1.85 2.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (B&~C)&(D2&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.80 0.96 1.11 0.83 0.99 1.14 0.91 1.07 1.22 1.09 1.25 1.40 30.00 1.61 1.64 1.72 1.91 Rev.1.01.10 2 - 727 TC200G SERIES DATA SHEET MUX81 MUX81 4/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (~B&C)&(~D4&D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.84 0.99 1.16 0.88 1.02 1.19 0.95 1.10 1.27 1.12 1.26 1.43 30.00 1.79 1.82 1.90 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (~B&C)&(~D4&D5) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.81 0.90 1.00 1.18 5.00 0.97 1.05 1.15 1.33 FUNCTION FALL 10.00 1.12 1.20 1.30 1.48 30.00 1.61 1.70 1.80 1.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION A->Z (~B&C)&(D4&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.83 0.99 0.77 0.92 1.08 0.88 1.03 1.19 1.09 1.24 1.40 30.00 1.63 1.72 1.83 2.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (~B&C)&(D4&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.92 1.07 0.79 0.95 1.10 0.87 1.03 1.18 1.06 1.22 1.37 30.00 1.56 1.60 1.68 1.86 Rev.1.01.10 2 - 728 TC200G SERIES DATA SHEET MUX81 MUX81 5/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (~B&~C)&(~D0&D1) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.86 1.01 1.17 0.89 1.04 1.21 0.97 1.11 1.28 1.13 1.28 1.45 30.00 1.81 1.84 1.92 2.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (~B&~C)&(~D0&D1) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.85 0.94 1.03 1.21 5.00 1.01 1.09 1.19 1.37 FUNCTION FALL 10.00 1.16 1.25 1.34 1.52 30.00 1.66 1.75 1.84 2.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION A->Z (~B&~C)&(D0&~D1) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.86 1.02 0.80 0.94 1.11 0.91 1.06 1.22 1.12 1.27 1.44 30.00 1.66 1.75 1.86 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION A->Z (~B&~C)&(D0&~D1) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.78 0.93 1.09 0.81 0.96 1.12 0.89 1.04 1.20 1.07 1.23 1.38 30.00 1.59 1.62 1.70 1.88 Rev.1.01.10 2 - 729 TC200G SERIES DATA SHEET MUX81 MUX81 6/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (A&C)&(~D5&D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.59 0.76 0.48 0.62 0.79 0.55 0.69 0.86 0.69 0.84 1.00 30.00 1.39 1.42 1.49 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (A&C)&(~D5&D7) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.41 0.55 0.71 5.00 0.48 0.56 0.70 0.87 FUNCTION FALL 10.00 0.63 0.71 0.85 1.02 30.00 1.13 1.21 1.35 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION B->Z (A&C)&(D5&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.46 0.63 0.40 0.54 0.71 0.49 0.64 0.80 0.66 0.81 0.97 30.00 1.26 1.34 1.44 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (A&C)&(D5&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.51 0.66 0.39 0.54 0.69 0.46 0.61 0.76 0.62 0.78 0.93 30.00 1.16 1.19 1.26 1.44 Rev.1.01.10 2 - 730 TC200G SERIES DATA SHEET MUX81 MUX81 7/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (A&~C)&(~D1&D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.59 0.76 0.47 0.62 0.79 0.54 0.69 0.86 0.69 0.83 1.00 30.00 1.39 1.42 1.49 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (A&~C)&(~D1&D3) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.32 0.40 0.55 0.71 5.00 0.48 0.56 0.70 0.87 FUNCTION FALL 10.00 0.63 0.71 0.85 1.02 30.00 1.13 1.21 1.35 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION B->Z (A&~C)&(D1&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.47 0.64 0.40 0.55 0.72 0.49 0.64 0.81 0.67 0.82 0.99 30.00 1.27 1.35 1.45 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (A&~C)&(D1&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.50 0.65 0.38 0.53 0.68 0.45 0.60 0.75 0.61 0.77 0.92 30.00 1.15 1.18 1.25 1.43 Rev.1.01.10 2 - 731 TC200G SERIES DATA SHEET MUX81 MUX81 8/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (~A&C)&(~D4&D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.59 0.76 0.48 0.62 0.79 0.55 0.69 0.86 0.69 0.84 1.00 30.00 1.39 1.42 1.49 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (~A&C)&(~D4&D6) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.41 0.55 0.71 5.00 0.48 0.56 0.70 0.87 FUNCTION FALL 10.00 0.63 0.71 0.85 1.02 30.00 1.13 1.21 1.35 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION B->Z (~A&C)&(D4&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.46 0.63 0.40 0.54 0.71 0.49 0.64 0.80 0.66 0.81 0.97 30.00 1.26 1.34 1.44 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (~A&C)&(D4&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.51 0.66 0.39 0.54 0.69 0.46 0.61 0.76 0.62 0.78 0.93 30.00 1.16 1.19 1.26 1.44 Rev.1.01.10 2 - 732 TC200G SERIES DATA SHEET MUX81 MUX81 9/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (~A&~C)&(~D0&D2) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.59 0.76 0.47 0.62 0.79 0.54 0.69 0.86 0.69 0.83 1.00 30.00 1.39 1.42 1.49 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (~A&~C)&(~D0&D2) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.32 0.40 0.55 0.71 5.00 0.48 0.56 0.70 0.87 FUNCTION FALL 10.00 0.63 0.71 0.85 1.02 30.00 1.13 1.21 1.35 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION B->Z (~A&~C)&(D0&~D2) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.47 0.64 0.40 0.55 0.72 0.49 0.64 0.81 0.67 0.82 0.99 30.00 1.27 1.35 1.45 1.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION B->Z (~A&~C)&(D0&~D2) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.50 0.65 0.38 0.53 0.68 0.45 0.60 0.75 0.61 0.77 0.92 30.00 1.15 1.18 1.25 1.43 Rev.1.01.10 2 - 733 TC200G SERIES DATA SHEET MUX81 MUX81 10/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (A&B)&(~D3&D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.46 0.63 0.34 0.49 0.66 0.40 0.55 0.72 0.51 0.66 0.83 30.00 1.26 1.30 1.35 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (A&B)&(~D3&D7) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.43 0.54 5.00 0.36 0.45 0.57 0.68 FUNCTION FALL 10.00 0.50 0.59 0.70 0.82 30.00 0.99 1.08 1.19 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION C->Z (A&B)&(D3&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.52 0.29 0.43 0.60 0.36 0.50 0.67 0.47 0.61 0.78 30.00 1.15 1.23 1.31 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (A&B)&(D3&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.52 0.27 0.41 0.55 0.34 0.47 0.62 0.49 0.63 0.78 30.00 1.00 1.04 1.10 1.27 Rev.1.01.10 2 - 734 TC200G SERIES DATA SHEET MUX81 MUX81 11/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (A&~B)&(~D1&D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.62 0.34 0.49 0.65 0.39 0.54 0.71 0.51 0.65 0.82 30.00 1.26 1.29 1.34 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (A&~B)&(~D1&D5) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.43 0.54 5.00 0.36 0.45 0.57 0.68 FUNCTION FALL 10.00 0.51 0.59 0.71 0.82 30.00 1.00 1.08 1.19 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION C->Z (A&~B)&(D1&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.52 0.28 0.43 0.60 0.36 0.50 0.67 0.47 0.62 0.78 30.00 1.15 1.23 1.31 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (A&~B)&(D1&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.51 0.27 0.41 0.55 0.34 0.47 0.61 0.49 0.63 0.77 30.00 1.00 1.03 1.10 1.26 Rev.1.01.10 2 - 735 TC200G SERIES DATA SHEET MUX81 MUX81 12/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (~A&B)&(~D2&D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.46 0.63 0.34 0.49 0.66 0.40 0.55 0.72 0.51 0.66 0.83 30.00 1.26 1.30 1.35 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (~A&B)&(~D2&D6) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.43 0.54 5.00 0.36 0.45 0.57 0.68 FUNCTION FALL 10.00 0.50 0.59 0.70 0.82 30.00 0.99 1.08 1.19 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION C->Z (~A&B)&(D2&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.52 0.29 0.43 0.60 0.36 0.50 0.67 0.47 0.61 0.78 30.00 1.15 1.23 1.31 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (~A&B)&(D2&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.52 0.27 0.41 0.55 0.34 0.47 0.62 0.49 0.63 0.78 30.00 1.00 1.04 1.10 1.27 Rev.1.01.10 2 - 736 TC200G SERIES DATA SHEET MUX81 MUX81 13/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (~A&~B)&(~D0&D4) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.62 0.34 0.49 0.65 0.39 0.54 0.71 0.51 0.65 0.82 30.00 1.26 1.29 1.34 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (~A&~B)&(~D0&D4) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.43 0.54 5.00 0.36 0.45 0.57 0.68 FUNCTION FALL 10.00 0.51 0.59 0.71 0.82 30.00 1.00 1.08 1.19 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION C->Z (~A&~B)&(D0&~D4) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.52 0.28 0.43 0.60 0.36 0.50 0.67 0.47 0.62 0.78 30.00 1.15 1.23 1.31 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION C->Z (~A&~B)&(D0&~D4) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.51 0.27 0.41 0.55 0.34 0.47 0.61 0.49 0.63 0.77 30.00 1.00 1.03 1.10 1.26 Rev.1.01.10 2 - 737 TC200G SERIES DATA SHEET MUX81 MUX81 14/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D0->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.51 0.66 0.83 0.60 0.75 0.92 0.79 0.94 1.11 30.00 1.40 1.46 1.55 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D0->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.48 0.50 0.57 0.74 5.00 0.63 0.65 0.72 0.90 FUNCTION FALL 10.00 0.79 0.81 0.88 1.06 30.00 1.29 1.31 1.38 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.52 0.67 0.83 0.61 0.76 0.92 0.80 0.95 1.11 30.00 1.40 1.47 1.56 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.64 0.79 0.51 0.66 0.81 0.57 0.73 0.88 0.75 0.91 1.07 30.00 1.29 1.32 1.38 1.58 Rev.1.01.10 2 - 738 TC200G SERIES DATA SHEET MUX81 MUX81 15/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.52 0.66 0.83 0.61 0.76 0.92 0.80 0.94 1.11 30.00 1.40 1.47 1.56 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D2->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.48 0.51 0.57 0.75 5.00 0.64 0.66 0.73 0.91 FUNCTION FALL 10.00 0.79 0.82 0.89 1.07 30.00 1.30 1.32 1.39 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.51 0.66 0.83 0.61 0.75 0.92 0.79 0.94 1.11 30.00 1.40 1.47 1.56 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.64 0.79 0.50 0.66 0.82 0.57 0.73 0.89 0.75 0.91 1.07 30.00 1.30 1.32 1.39 1.58 Rev.1.01.10 2 - 739 TC200G SERIES DATA SHEET MUX81 MUX81 16/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D4->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.59 0.76 0.50 0.65 0.82 0.59 0.74 0.90 0.77 0.92 1.09 30.00 1.39 1.45 1.54 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D4->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.47 0.49 0.56 0.73 5.00 0.62 0.64 0.71 0.89 FUNCTION FALL 10.00 0.77 0.80 0.86 1.04 30.00 1.27 1.29 1.36 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION D5->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.58 0.75 0.50 0.64 0.81 0.59 0.73 0.90 0.76 0.91 1.08 30.00 1.38 1.44 1.53 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D5->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.62 0.77 0.48 0.64 0.79 0.55 0.71 0.86 0.72 0.88 1.04 30.00 1.26 1.29 1.36 1.54 Rev.1.01.10 2 - 740 TC200G SERIES DATA SHEET MUX81 MUX81 17/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D6->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.56 0.73 0.48 0.62 0.79 0.56 0.71 0.87 0.73 0.88 1.05 30.00 1.36 1.42 1.51 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D6->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.44 0.47 0.53 0.70 5.00 0.59 0.62 0.69 0.86 FUNCTION FALL 10.00 0.74 0.77 0.84 1.01 30.00 1.24 1.26 1.33 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0891 0.13 PATH CONDITION PATH CONDITION D7->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.56 0.73 0.48 0.62 0.79 0.56 0.71 0.87 0.73 0.88 1.05 30.00 1.36 1.42 1.51 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0391 0.14 PATH CONDITION PATH CONDITION D7->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.59 0.74 0.47 0.62 0.77 0.53 0.69 0.84 0.69 0.85 1.01 30.00 1.24 1.26 1.33 1.51 Rev.1.01.10 2 - 741 TC200G SERIES DATA SHEET MUX81P CELL NAME MUX81P FUNCTION 8 TO 1 MULTIPLEXER 15 LOGIC SYMBOL MUX81P D0 D0 D1 D1 D2 D2 D3 D3 D4 D4 D5 D5 D6 D6 D7 D7 A A BC BC ZZ MUX81P CELL COUNT GATE I/O 0 1/17 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT C B L L L L L H L H H L H L H H H H A L H L H L H L H OUTPUT Z D0 D1 D2 D3 D4 D5 D6 D7 Verilog-HDL DESCRIPTION MUX81P inst(Z,D0,D1,D2,D3,D4,D5, D6,D7,A,B,C); VHDL DESCRIPTION inst:MUX81P port map(Z,D0,D1,D2,D3,D4, D5,D6,D7,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME D0 D1,D7 D2 D3 D4 D5 D6 A B C (LU) LOAD 3.46 3.42 3.30 3.39 3.40 3.49 3.36 0.99 3.24 2.11 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 88.9 Rev.1.01.10 2 - 742 TC200G SERIES DATA SHEET MUX81P MUX81P 2/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (B&C)&(~D6&D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.83 0.91 1.00 0.86 0.94 1.03 0.93 1.02 1.11 1.10 1.18 1.27 30.00 1.33 1.36 1.44 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (B&C)&(~D6&D7) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.80 0.89 0.99 1.17 5.00 0.90 0.99 1.09 1.27 FUNCTION FALL 10.00 1.00 1.09 1.18 1.36 30.00 1.30 1.39 1.48 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION A->Z (B&C)&(D6&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.67 0.75 0.84 0.75 0.84 0.93 0.87 0.95 1.04 1.08 1.16 1.25 30.00 1.17 1.26 1.37 1.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (B&C)&(D6&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.84 0.94 0.77 0.87 0.97 0.85 0.95 1.05 1.04 1.13 1.23 30.00 1.24 1.27 1.35 1.53 Rev.1.01.10 2 - 743 TC200G SERIES DATA SHEET MUX81P MUX81P 3/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (B&~C)&(~D2&D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.88 0.96 1.05 0.91 0.99 1.08 0.98 1.07 1.16 1.15 1.23 1.32 30.00 1.39 1.42 1.50 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (B&~C)&(~D2&D3) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.87 0.95 1.05 1.23 5.00 0.97 1.05 1.15 1.33 FUNCTION FALL 10.00 1.07 1.15 1.25 1.43 30.00 1.37 1.46 1.56 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION A->Z (B&~C)&(D2&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.71 0.80 0.89 0.80 0.89 0.98 0.92 1.00 1.09 1.13 1.21 1.30 30.00 1.23 1.31 1.43 1.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (B&~C)&(D2&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.81 0.91 1.00 0.84 0.94 1.04 0.92 1.02 1.12 1.10 1.20 1.30 30.00 1.31 1.34 1.42 1.61 Rev.1.01.10 2 - 744 TC200G SERIES DATA SHEET MUX81P MUX81P 4/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (~B&C)&(~D4&D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.86 0.95 1.04 0.90 0.98 1.07 0.97 1.05 1.15 1.14 1.22 1.31 30.00 1.37 1.40 1.48 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (~B&C)&(~D4&D5) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.82 0.91 1.00 1.18 5.00 0.92 1.00 1.10 1.28 FUNCTION FALL 10.00 1.01 1.10 1.20 1.38 30.00 1.32 1.40 1.50 1.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION A->Z (~B&C)&(D4&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.70 0.78 0.87 0.79 0.87 0.96 0.90 0.98 1.07 1.11 1.19 1.28 30.00 1.21 1.30 1.41 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (~B&C)&(D4&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.77 0.87 0.96 0.80 0.90 1.00 0.88 0.98 1.08 1.07 1.17 1.26 30.00 1.27 1.30 1.38 1.57 Rev.1.01.10 2 - 745 TC200G SERIES DATA SHEET MUX81P MUX81P 5/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z (~B&~C)&(~D0&D1) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.88 0.96 1.05 0.91 0.99 1.09 0.99 1.07 1.16 1.15 1.23 1.33 30.00 1.39 1.42 1.50 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (~B&~C)&(~D0&D1) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.86 0.94 1.04 1.22 5.00 0.96 1.04 1.14 1.32 FUNCTION FALL 10.00 1.05 1.14 1.24 1.42 30.00 1.36 1.45 1.54 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION A->Z (~B&~C)&(D0&~D1) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.81 0.90 0.82 0.90 0.99 0.93 1.01 1.10 1.14 1.23 1.32 30.00 1.24 1.33 1.44 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION A->Z (~B&~C)&(D0&~D1) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.79 0.88 0.98 0.82 0.92 1.01 0.90 0.99 1.09 1.08 1.18 1.27 30.00 1.29 1.32 1.40 1.58 Rev.1.01.10 2 - 746 TC200G SERIES DATA SHEET MUX81P MUX81P 6/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (A&C)&(~D5&D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.55 0.64 0.49 0.58 0.67 0.56 0.65 0.74 0.71 0.79 0.88 30.00 0.97 1.00 1.07 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (A&C)&(~D5&D7) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.41 0.55 0.73 5.00 0.43 0.51 0.65 0.83 FUNCTION FALL 10.00 0.53 0.61 0.75 0.93 30.00 0.83 0.91 1.05 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION B->Z (A&C)&(D5&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.42 0.51 0.42 0.50 0.59 0.51 0.60 0.69 0.71 0.79 0.88 30.00 0.84 0.92 1.02 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (A&C)&(D5&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.46 0.56 0.40 0.49 0.59 0.46 0.56 0.66 0.62 0.73 0.82 30.00 0.86 0.89 0.96 1.13 Rev.1.01.10 2 - 747 TC200G SERIES DATA SHEET MUX81P MUX81P 7/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (A&~C)&(~D1&D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.54 0.64 0.49 0.57 0.67 0.56 0.64 0.73 0.70 0.79 0.88 30.00 0.97 1.00 1.07 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (A&~C)&(~D1&D3) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.40 0.55 0.74 5.00 0.43 0.50 0.65 0.84 FUNCTION FALL 10.00 0.52 0.60 0.74 0.93 30.00 0.83 0.91 1.05 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION B->Z (A&~C)&(D1&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.42 0.52 0.42 0.51 0.60 0.52 0.61 0.70 0.72 0.81 0.90 30.00 0.85 0.93 1.03 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (A&~C)&(D1&~D3) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.45 0.55 0.38 0.48 0.58 0.45 0.55 0.64 0.61 0.71 0.81 30.00 0.85 0.88 0.95 1.12 Rev.1.01.10 2 - 748 TC200G SERIES DATA SHEET MUX81P MUX81P 8/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (~A&C)&(~D4&D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.55 0.64 0.49 0.58 0.67 0.56 0.65 0.74 0.71 0.79 0.88 30.00 0.97 1.00 1.07 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (~A&C)&(~D4&D6) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.41 0.55 0.73 5.00 0.43 0.51 0.65 0.83 FUNCTION FALL 10.00 0.53 0.61 0.75 0.93 30.00 0.83 0.91 1.05 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION B->Z (~A&C)&(D4&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.42 0.51 0.42 0.50 0.59 0.51 0.60 0.69 0.71 0.79 0.88 30.00 0.84 0.92 1.02 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (~A&C)&(D4&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.46 0.56 0.40 0.49 0.59 0.46 0.56 0.66 0.62 0.73 0.82 30.00 0.86 0.89 0.96 1.13 Rev.1.01.10 2 - 749 TC200G SERIES DATA SHEET MUX81P MUX81P 9/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z (~A&~C)&(~D0&D2) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.54 0.64 0.49 0.57 0.67 0.56 0.64 0.73 0.70 0.79 0.88 30.00 0.97 1.00 1.07 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (~A&~C)&(~D0&D2) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.33 0.40 0.55 0.74 5.00 0.43 0.50 0.65 0.84 FUNCTION FALL 10.00 0.52 0.60 0.74 0.93 30.00 0.83 0.91 1.05 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION B->Z (~A&~C)&(D0&~D2) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.42 0.52 0.42 0.51 0.60 0.52 0.61 0.70 0.72 0.81 0.90 30.00 0.85 0.93 1.03 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION B->Z (~A&~C)&(D0&~D2) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.45 0.55 0.38 0.48 0.58 0.45 0.55 0.64 0.61 0.71 0.81 30.00 0.85 0.88 0.95 1.12 Rev.1.01.10 2 - 750 TC200G SERIES DATA SHEET MUX81P MUX81P 10/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (A&B)&(~D3&D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.41 0.50 0.36 0.44 0.54 0.42 0.50 0.59 0.53 0.62 0.71 30.00 0.84 0.87 0.93 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (A&B)&(~D3&D7) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.44 0.59 5.00 0.30 0.39 0.54 0.68 FUNCTION FALL 10.00 0.40 0.49 0.63 0.77 30.00 0.70 0.78 0.92 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION C->Z (A&B)&(D3&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.40 0.31 0.39 0.49 0.40 0.48 0.57 0.56 0.64 0.73 30.00 0.74 0.82 0.91 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (A&B)&(D3&~D7) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.42 0.28 0.37 0.46 0.34 0.43 0.52 0.50 0.59 0.69 30.00 0.72 0.75 0.82 0.99 Rev.1.01.10 2 - 751 TC200G SERIES DATA SHEET MUX81P MUX81P 11/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (A&~B)&(~D1&D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.50 0.35 0.44 0.53 0.41 0.49 0.58 0.53 0.61 0.70 30.00 0.83 0.86 0.92 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (A&~B)&(~D1&D5) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.45 0.60 5.00 0.31 0.39 0.54 0.69 FUNCTION FALL 10.00 0.40 0.49 0.63 0.77 30.00 0.70 0.79 0.92 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION C->Z (A&~B)&(D1&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.40 0.31 0.39 0.48 0.40 0.48 0.57 0.56 0.64 0.73 30.00 0.74 0.82 0.91 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (A&~B)&(D1&~D5) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.42 0.27 0.36 0.46 0.34 0.43 0.52 0.49 0.59 0.68 30.00 0.72 0.75 0.82 0.98 Rev.1.01.10 2 - 752 TC200G SERIES DATA SHEET MUX81P MUX81P 12/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (~A&B)&(~D2&D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.41 0.50 0.36 0.44 0.54 0.42 0.50 0.59 0.53 0.62 0.71 30.00 0.84 0.87 0.93 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (~A&B)&(~D2&D6) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.44 0.59 5.00 0.30 0.39 0.54 0.68 FUNCTION FALL 10.00 0.40 0.48 0.63 0.77 30.00 0.70 0.78 0.92 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION C->Z (~A&B)&(D2&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.31 0.40 0.31 0.39 0.49 0.40 0.48 0.57 0.56 0.64 0.73 30.00 0.74 0.82 0.91 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (~A&B)&(D2&~D6) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.42 0.28 0.37 0.46 0.34 0.43 0.52 0.50 0.59 0.69 30.00 0.72 0.75 0.82 0.99 Rev.1.01.10 2 - 753 TC200G SERIES DATA SHEET MUX81P MUX81P 13/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z (~A&~B)&(~D0&D4) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.50 0.35 0.44 0.53 0.41 0.49 0.58 0.53 0.61 0.70 30.00 0.83 0.86 0.92 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (~A&~B)&(~D0&D4) PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.21 0.30 0.45 0.60 5.00 0.31 0.39 0.54 0.69 FUNCTION FALL 10.00 0.40 0.49 0.63 0.77 30.00 0.70 0.79 0.92 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION C->Z (~A&~B)&(D0&~D4) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.31 0.40 0.31 0.39 0.48 0.40 0.48 0.57 0.56 0.64 0.73 30.00 0.74 0.82 0.91 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION C->Z (~A&~B)&(D0&~D4) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.33 0.42 0.27 0.36 0.46 0.34 0.43 0.52 0.49 0.59 0.68 30.00 0.72 0.75 0.82 0.98 Rev.1.01.10 2 - 754 TC200G SERIES DATA SHEET MUX81P MUX81P 14/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D0->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.55 0.64 0.53 0.62 0.71 0.63 0.71 0.80 0.82 0.91 1.00 30.00 0.98 1.04 1.13 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D0->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.48 0.50 0.57 0.76 5.00 0.58 0.60 0.67 0.86 FUNCTION FALL 10.00 0.68 0.70 0.77 0.96 30.00 0.99 1.01 1.08 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.56 0.65 0.54 0.62 0.71 0.63 0.71 0.81 0.83 0.91 1.01 30.00 0.98 1.05 1.14 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D1->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.59 0.69 0.51 0.61 0.71 0.58 0.68 0.78 0.76 0.86 0.97 30.00 0.99 1.01 1.08 1.28 Rev.1.01.10 2 - 755 TC200G SERIES DATA SHEET MUX81P MUX81P 15/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D2->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.56 0.65 0.54 0.62 0.71 0.63 0.71 0.81 0.83 0.91 1.00 30.00 0.98 1.05 1.14 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D2->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.51 0.58 0.76 5.00 0.59 0.61 0.68 0.86 FUNCTION FALL 10.00 0.69 0.71 0.78 0.97 30.00 1.00 1.02 1.09 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.55 0.65 0.53 0.62 0.71 0.63 0.71 0.80 0.83 0.91 1.00 30.00 0.98 1.05 1.14 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D3->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.59 0.69 0.51 0.61 0.71 0.58 0.68 0.78 0.76 0.86 0.96 30.00 1.00 1.02 1.09 1.28 Rev.1.01.10 2 - 756 TC200G SERIES DATA SHEET MUX81P MUX81P 16/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D4->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.54 0.63 0.52 0.60 0.70 0.61 0.69 0.79 0.80 0.88 0.98 30.00 0.97 1.03 1.12 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D4->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.47 0.50 0.57 0.74 5.00 0.57 0.59 0.66 0.84 FUNCTION FALL 10.00 0.67 0.69 0.76 0.94 30.00 0.97 1.00 1.06 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION D5->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.54 0.63 0.52 0.60 0.69 0.61 0.69 0.78 0.80 0.88 0.97 30.00 0.96 1.02 1.11 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D5->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.57 0.66 0.49 0.59 0.69 0.56 0.66 0.75 0.73 0.84 0.94 30.00 0.97 0.99 1.06 1.25 Rev.1.01.10 2 - 757 TC200G SERIES DATA SHEET MUX81P MUX81P 17/17 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION D6->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.52 0.61 0.50 0.58 0.67 0.58 0.66 0.76 0.76 0.85 0.94 30.00 0.94 1.00 1.09 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D6->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.45 0.47 0.54 0.71 5.00 0.54 0.57 0.64 0.81 FUNCTION FALL 10.00 0.64 0.67 0.73 0.91 30.00 0.94 0.97 1.04 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0444 0.13 PATH CONDITION PATH CONDITION D7->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.51 0.61 0.49 0.58 0.67 0.58 0.66 0.75 0.76 0.84 0.94 30.00 0.94 1.00 1.09 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0227 0.13 PATH CONDITION PATH CONDITION D7->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.54 0.64 0.47 0.57 0.66 0.54 0.64 0.73 0.71 0.81 0.91 30.00 0.94 0.97 1.04 1.22 Rev.1.01.10 2 - 758 TC200G SERIES DATA SHEET ND2 CELL NAME ND2 FUNCTION 2-INPUT NAND 1 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 ND2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z H H H L A B ND2 Z Verilog-HDL DESCRIPTION ND2 inst(Z,A,B); VHDL DESCRIPTION inst:ND2 port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 34.3 Rev.1.01.10 2 - 759 TC200G SERIES DATA SHEET ND2 ND2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0997 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.49 0.15 0.37 0.60 30.00 1.09 1.12 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0654 0.10 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.15 0.21 0.32 5.00 0.24 0.32 0.42 0.62 FUNCTION FALL 10.00 0.43 0.51 0.63 0.90 30.00 1.17 1.25 1.39 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0997 0.16 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.26 0.43 0.14 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.14 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0654 0.10 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.44 0.15 0.31 0.50 0.20 0.38 0.58 0.26 0.52 0.78 30.00 1.18 1.24 1.33 1.61 Rev.1.01.10 2 - 760 TC200G SERIES DATA SHEET ND2P CELL NAME ND2P FUNCTION 2-INPUT NAND 2 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 ND2P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z H H H L A B ND2P Z Verilog-HDL DESCRIPTION ND2P inst(Z,A,B); VHDL DESCRIPTION inst:ND2P port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 2.06 2.07 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 66.3 Rev.1.01.10 2 - 761 TC200G SERIES DATA SHEET ND2P ND2P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0492 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.15 0.23 0.09 0.17 0.26 0.11 0.20 0.30 0.11 0.24 0.37 30.00 0.57 0.60 0.66 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0316 0.12 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.07 0.13 0.18 0.27 5.00 0.15 0.22 0.30 0.45 FUNCTION FALL 10.00 0.24 0.32 0.42 0.62 30.00 0.61 0.69 0.83 1.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0492 0.17 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.17 0.25 0.11 0.19 0.28 0.14 0.23 0.33 0.20 0.31 0.43 30.00 0.60 0.62 0.68 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0316 0.12 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.16 0.25 0.13 0.21 0.31 0.16 0.27 0.38 0.22 0.37 0.52 30.00 0.62 0.68 0.77 1.00 Rev.1.01.10 2 - 762 TC200G SERIES DATA SHEET ND3 CELL NAME ND3 FUNCTION 3-INPUT NAND 2 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 ND3 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C ND3 Z C L H L H L H L H OUTPUT Z H H H H H H H L Verilog-HDL DESCRIPTION ND3 inst(Z,A,B,C); VHDL DESCRIPTION inst:ND3 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.07 1.03 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 29.1 Rev.1.01.10 2 - 763 TC200G SERIES DATA SHEET ND3 ND3 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.24 0.41 0.12 0.27 0.44 0.13 0.31 0.49 0.10 0.34 0.57 30.00 1.10 1.13 1.18 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0932 0.16 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.22 0.30 0.49 5.00 0.36 0.44 0.56 0.83 FUNCTION FALL 10.00 0.62 0.70 0.83 1.17 30.00 1.67 1.75 1.89 2.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.19 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.43 0.15 0.29 0.46 0.17 0.33 0.52 0.17 0.38 0.61 30.00 1.12 1.15 1.20 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0932 0.16 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.38 0.65 0.22 0.44 0.70 0.29 0.53 0.80 0.46 0.76 1.08 30.00 1.70 1.76 1.86 2.19 Rev.1.01.10 2 - 764 TC200G SERIES DATA SHEET ND3 ND3 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.19 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.27 0.44 0.16 0.30 0.46 0.19 0.34 0.51 0.22 0.42 0.62 30.00 1.07 1.10 1.15 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0932 0.16 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.19 0.22 0.26 0.34 5.00 0.40 0.43 0.48 0.60 FUNCTION FALL 10.00 0.66 0.70 0.74 0.88 30.00 1.71 1.75 1.79 1.95 Rev.1.01.10 2 - 765 TC200G SERIES DATA SHEET ND3P CELL NAME ND3P FUNCTION 3-INPUT NAND 3 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 ND3P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C ND3P Z C L H L H L H L H OUTPUT Z H H H H H H H L Verilog-HDL DESCRIPTION ND3P inst(Z,A,B,C); VHDL DESCRIPTION inst:ND3P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 2.10 2.02 1.96 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 51.7 Rev.1.01.10 2 - 766 TC200G SERIES DATA SHEET ND3P ND3P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0568 0.32 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.16 0.24 0.10 0.18 0.27 0.11 0.20 0.31 0.05 0.19 0.33 30.00 0.58 0.61 0.67 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0480 0.18 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.12 0.19 0.26 0.45 5.00 0.24 0.31 0.41 0.65 FUNCTION FALL 10.00 0.37 0.45 0.57 0.85 30.00 0.92 1.00 1.14 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0568 0.32 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.26 0.13 0.20 0.29 0.14 0.23 0.33 0.12 0.25 0.38 30.00 0.60 0.63 0.69 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0480 0.18 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.26 0.40 0.20 0.31 0.45 0.27 0.40 0.55 0.43 0.60 0.79 30.00 0.95 1.01 1.11 1.42 Rev.1.01.10 2 - 767 TC200G SERIES DATA SHEET ND3P ND3P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0568 0.32 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.24 0.34 0.17 0.26 0.36 0.21 0.30 0.41 0.26 0.38 0.51 30.00 0.73 0.75 0.80 0.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0480 0.18 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.17 0.20 0.24 0.30 5.00 0.28 0.31 0.36 0.45 FUNCTION FALL 10.00 0.41 0.45 0.50 0.62 30.00 0.96 1.00 1.05 1.20 Rev.1.01.10 2 - 768 TC200G SERIES DATA SHEET ND4 CELL NAME ND4 FUNCTION 4-INPUT NAND 2 LOGIC SYMBOL 0 ND4 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D H H H H ALL OTHER COMBINATIONS OUTPUT Z L H A B C D ND4 Z Verilog-HDL DESCRIPTION ND4 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:ND4 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.07 1.04 0.98 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 25.1 Rev.1.01.10 2 - 769 TC200G SERIES DATA SHEET ND4 ND4 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.35 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.24 0.41 0.13 0.27 0.45 0.13 0.31 0.50 0.06 0.30 0.55 30.00 1.10 1.13 1.18 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1205 0.22 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.19 0.26 0.35 0.59 5.00 0.46 0.53 0.66 0.97 FUNCTION FALL 10.00 0.80 0.87 1.01 1.38 30.00 2.15 2.22 2.36 2.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.35 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.44 0.15 0.29 0.47 0.16 0.33 0.52 0.12 0.35 0.58 30.00 1.12 1.15 1.20 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1205 0.22 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.49 0.83 0.27 0.55 0.89 0.36 0.65 0.99 0.58 0.93 1.31 30.00 2.18 2.24 2.35 2.70 Rev.1.01.10 2 - 770 TC200G SERIES DATA SHEET ND4 ND4 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.35 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.30 0.47 0.18 0.32 0.49 0.20 0.36 0.55 0.19 0.41 0.63 30.00 1.16 1.18 1.23 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1205 0.22 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.29 0.35 0.50 5.00 0.53 0.57 0.62 0.81 FUNCTION FALL 10.00 0.86 0.91 0.96 1.17 30.00 2.22 2.26 2.32 2.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0999 0.35 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.31 0.49 0.19 0.34 0.51 0.21 0.38 0.57 0.22 0.43 0.66 30.00 1.18 1.20 1.25 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1205 0.22 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.54 0.88 0.29 0.57 0.91 0.33 0.61 0.95 0.44 0.74 1.08 30.00 2.23 2.26 2.30 2.42 Rev.1.01.10 2 - 771 TC200G SERIES DATA SHEET ND4P CELL NAME ND4P FUNCTION 4-INPUT NAND 4 LOGIC SYMBOL 0 ND4P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D H H H H ALL OTHER COMBINATIONS OUTPUT Z L H A B C D ND4P Z Verilog-HDL DESCRIPTION ND4P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:ND4P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 2.15 2.12 2.05 1.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 47.9 Rev.1.01.10 2 - 772 TC200G SERIES DATA SHEET ND4P ND4P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0498 0.35 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.16 0.24 0.11 0.19 0.28 0.10 0.20 0.31 0.00 0.15 0.29 30.00 0.58 0.62 0.67 0.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0645 0.24 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.16 0.23 0.32 0.57 5.00 0.31 0.38 0.50 0.79 FUNCTION FALL 10.00 0.49 0.57 0.70 1.02 30.00 1.22 1.29 1.43 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0498 0.35 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.27 0.13 0.21 0.30 0.14 0.23 0.33 0.06 0.20 0.34 30.00 0.61 0.64 0.69 0.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0645 0.24 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.53 0.26 0.40 0.59 0.34 0.51 0.69 0.57 0.77 0.99 30.00 1.26 1.31 1.42 1.77 Rev.1.01.10 2 - 773 TC200G SERIES DATA SHEET ND4P ND4P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0498 0.35 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.21 0.30 0.16 0.23 0.32 0.17 0.26 0.36 0.14 0.26 0.40 30.00 0.64 0.67 0.72 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0645 0.24 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.24 0.27 0.32 0.47 5.00 0.38 0.42 0.47 0.64 FUNCTION FALL 10.00 0.56 0.60 0.65 0.83 30.00 1.29 1.33 1.38 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0498 0.35 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.22 0.31 0.17 0.25 0.34 0.18 0.28 0.38 0.17 0.29 0.42 30.00 0.66 0.68 0.74 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0645 0.24 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.39 0.57 0.27 0.42 0.61 0.31 0.46 0.64 0.41 0.58 0.76 30.00 1.30 1.33 1.36 1.48 Rev.1.01.10 2 - 774 TC200G SERIES DATA SHEET ND5 CELL NAME ND5 FUNCTION 5-INPUT NAND 4 LOGIC SYMBOL 0 ND5 CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D E H H H H H ALL OTHER COMBINATIONS OUTPUT Z L H A B C D E ND5 Z Verilog-HDL DESCRIPTION ND5 inst(Z,A,B,C,D,E); VHDL DESCRIPTION inst:ND5 port map(Z,A,B,C,D,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D E (LU) LOAD 1.04 0.99 0.98 1.05 1.09 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 44.4 Rev.1.01.10 2 - 775 TC200G SERIES DATA SHEET ND5 ND5 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0966 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.60 0.32 0.46 0.63 0.35 0.49 0.66 0.37 0.51 0.67 30.00 1.26 1.29 1.32 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0396 0.11 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.49 0.59 0.84 5.00 0.54 0.61 0.71 0.96 FUNCTION FALL 10.00 0.66 0.74 0.84 1.09 30.00 1.14 1.21 1.31 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0966 0.10 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.46 0.63 0.35 0.49 0.65 0.39 0.53 0.70 0.45 0.59 0.76 30.00 1.29 1.32 1.36 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0396 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.56 0.69 0.50 0.62 0.75 0.59 0.71 0.84 0.82 0.94 1.07 30.00 1.16 1.22 1.31 1.54 Rev.1.01.10 2 - 776 TC200G SERIES DATA SHEET ND5 ND5 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0966 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.51 0.68 0.39 0.53 0.70 0.45 0.59 0.76 0.58 0.72 0.89 30.00 1.35 1.37 1.43 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0396 0.11 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.46 0.50 0.55 0.69 5.00 0.58 0.62 0.67 0.81 FUNCTION FALL 10.00 0.71 0.75 0.80 0.94 30.00 1.18 1.22 1.27 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0966 0.10 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.42 0.59 0.31 0.45 0.62 0.35 0.49 0.66 0.42 0.56 0.73 30.00 1.26 1.29 1.33 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0396 0.11 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.48 0.61 0.42 0.54 0.67 0.49 0.61 0.73 0.63 0.75 0.88 30.00 1.08 1.14 1.21 1.36 Rev.1.01.10 2 - 777 TC200G SERIES DATA SHEET ND5 ND5 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0966 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.45 0.62 0.34 0.48 0.65 0.40 0.54 0.71 0.52 0.66 0.83 30.00 1.29 1.32 1.37 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0396 0.11 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.37 0.42 0.47 0.57 5.00 0.49 0.54 0.59 0.69 FUNCTION FALL 10.00 0.62 0.66 0.71 0.81 30.00 1.09 1.14 1.19 1.29 Rev.1.01.10 2 - 778 TC200G SERIES DATA SHEET ND5P CELL NAME ND5P FUNCTION 5-INPUT NAND 5 LOGIC SYMBOL 0 ND5P CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D E H H H H H ALL OTHER COMBINATIONS OUTPUT Z L H A B C D E ND5P Z Verilog-HDL DESCRIPTION ND5P inst(Z,A,B,C,D,E); VHDL DESCRIPTION inst:ND5P port map(Z,A,B,C,D,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,C B D E (LU) LOAD 0.99 1.04 1.02 1.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 81.4 Rev.1.01.10 2 - 779 TC200G SERIES DATA SHEET ND5P ND5P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0550 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.37 0.46 0.31 0.40 0.49 0.35 0.43 0.53 0.38 0.46 0.55 30.00 0.83 0.86 0.89 0.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0193 0.14 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.45 0.52 0.62 0.87 5.00 0.53 0.60 0.70 0.94 FUNCTION FALL 10.00 0.61 0.68 0.77 1.02 30.00 0.87 0.94 1.04 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0550 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.50 0.35 0.43 0.52 0.39 0.48 0.57 0.46 0.55 0.64 30.00 0.86 0.89 0.94 1.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0193 0.14 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.55 0.63 0.53 0.61 0.69 0.62 0.70 0.77 0.84 0.92 1.00 30.00 0.89 0.95 1.04 1.26 Rev.1.01.10 2 - 780 TC200G SERIES DATA SHEET ND5P ND5P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0550 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.43 0.52 0.37 0.45 0.55 0.43 0.51 0.61 0.55 0.63 0.73 30.00 0.89 0.92 0.98 1.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0193 0.14 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.53 0.58 0.72 5.00 0.57 0.60 0.66 0.80 FUNCTION FALL 10.00 0.65 0.68 0.73 0.88 30.00 0.91 0.94 1.00 1.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0550 0.07 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.46 0.31 0.40 0.49 0.36 0.44 0.54 0.45 0.53 0.63 30.00 0.83 0.86 0.91 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0193 0.14 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.48 0.56 0.46 0.54 0.62 0.53 0.60 0.68 0.66 0.74 0.82 30.00 0.82 0.88 0.94 1.08 Rev.1.01.10 2 - 781 TC200G SERIES DATA SHEET ND5P ND5P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0550 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.39 0.48 0.34 0.42 0.51 0.40 0.48 0.57 0.52 0.60 0.70 30.00 0.85 0.88 0.94 1.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0193 0.14 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.41 0.46 0.50 0.60 5.00 0.49 0.53 0.58 0.68 FUNCTION FALL 10.00 0.57 0.61 0.66 0.76 30.00 0.83 0.87 0.92 1.02 Rev.1.01.10 2 - 782 TC200G SERIES DATA SHEET ND6 CELL NAME ND6 FUNCTION 6-INPUT NAND 5 LOGIC SYMBOL TRUTH TABLE INPUT A B C D E F H H H H H H ALL OTHER COMBINATIONS OUTPUT Z L H 0 ND6 CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F ND6 Z Verilog-HDL DESCRIPTION ND6 inst(Z,A,B,C,D,E,F); VHDL DESCRIPTION inst:ND6 port map(Z,A,B,C,D,E,F); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B,D C,E,F (LU) LOAD 1.10 1.03 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 43.1 Rev.1.01.10 2 - 783 TC200G SERIES DATA SHEET ND6 ND6 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1005 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.60 0.32 0.46 0.63 0.35 0.49 0.67 0.37 0.52 0.69 30.00 1.29 1.32 1.35 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.11 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.41 0.48 0.58 0.82 5.00 0.53 0.60 0.70 0.94 FUNCTION FALL 10.00 0.66 0.73 0.82 1.07 30.00 1.13 1.20 1.30 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1005 0.10 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.46 0.63 0.35 0.49 0.66 0.39 0.54 0.71 0.46 0.60 0.77 30.00 1.32 1.35 1.39 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.43 0.55 0.68 0.49 0.61 0.74 0.57 0.69 0.82 0.79 0.91 1.04 30.00 1.15 1.21 1.30 1.52 Rev.1.01.10 2 - 784 TC200G SERIES DATA SHEET ND6 ND6 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1005 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.48 0.66 0.37 0.51 0.68 0.43 0.57 0.74 0.55 0.69 0.86 30.00 1.34 1.37 1.43 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.11 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.45 0.48 0.53 0.66 5.00 0.57 0.60 0.65 0.78 FUNCTION FALL 10.00 0.69 0.73 0.78 0.91 30.00 1.17 1.20 1.26 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1005 0.10 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.45 0.62 0.33 0.47 0.65 0.36 0.51 0.68 0.38 0.53 0.70 30.00 1.30 1.33 1.36 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.11 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.54 0.67 0.49 0.61 0.74 0.59 0.71 0.84 0.84 0.96 1.09 30.00 1.14 1.22 1.31 1.56 Rev.1.01.10 2 - 785 TC200G SERIES DATA SHEET ND6 ND6 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1005 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.48 0.65 0.36 0.50 0.68 0.41 0.55 0.72 0.47 0.61 0.78 30.00 1.34 1.36 1.41 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.11 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.45 0.50 0.59 0.81 5.00 0.57 0.62 0.71 0.93 FUNCTION FALL 10.00 0.69 0.75 0.84 1.06 30.00 1.17 1.23 1.31 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1005 0.10 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.52 0.70 0.40 0.55 0.72 0.46 0.61 0.79 0.60 0.74 0.92 30.00 1.38 1.41 1.47 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.11 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.58 0.71 0.50 0.62 0.75 0.55 0.67 0.80 0.68 0.80 0.93 30.00 1.19 1.23 1.28 1.40 Rev.1.01.10 2 - 786 TC200G SERIES DATA SHEET ND6P CELL NAME ND6P FUNCTION 6-INPUT NAND 5 LOGIC SYMBOL TRUTH TABLE INPUT A B C D E F H H H H H H ALL OTHER COMBINATIONS OUTPUT Z L H 0 ND6P CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F ND6P Z Verilog-HDL DESCRIPTION ND6P inst(Z,A,B,C,D,E,F); VHDL DESCRIPTION inst:ND6P port map(Z,A,B,C,D,E,F); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B,E,F C D (LU) LOAD 0.98 0.97 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 95.3 Rev.1.01.10 2 - 787 TC200G SERIES DATA SHEET ND6P ND6P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0452 0.06 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.32 0.40 0.28 0.35 0.43 0.32 0.39 0.47 0.34 0.41 0.49 30.00 0.72 0.75 0.78 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.13 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.43 0.50 0.60 0.85 5.00 0.50 0.58 0.68 0.93 FUNCTION FALL 10.00 0.58 0.65 0.75 1.00 30.00 0.83 0.90 1.00 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0452 0.06 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.37 0.45 0.33 0.39 0.48 0.38 0.45 0.53 0.46 0.53 0.61 30.00 0.76 0.79 0.84 0.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.13 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.53 0.60 0.51 0.58 0.66 0.59 0.67 0.74 0.80 0.88 0.95 30.00 0.85 0.91 0.99 1.20 Rev.1.01.10 2 - 788 TC200G SERIES DATA SHEET ND6P ND6P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0452 0.06 PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.40 0.48 0.36 0.43 0.51 0.43 0.50 0.58 0.57 0.64 0.72 30.00 0.80 0.82 0.89 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.13 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.47 0.51 0.56 0.68 5.00 0.54 0.58 0.63 0.76 FUNCTION FALL 10.00 0.62 0.65 0.71 0.83 30.00 0.86 0.90 0.95 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0452 0.06 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.34 0.42 0.30 0.37 0.45 0.34 0.40 0.49 0.37 0.44 0.52 30.00 0.74 0.77 0.80 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.13 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.51 0.58 0.51 0.58 0.66 0.60 0.67 0.75 0.83 0.90 0.98 30.00 0.83 0.91 1.00 1.23 Rev.1.01.10 2 - 789 TC200G SERIES DATA SHEET ND6P ND6P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0452 0.06 PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.37 0.45 0.33 0.40 0.48 0.38 0.45 0.53 0.46 0.53 0.61 30.00 0.77 0.80 0.85 0.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.13 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.46 0.51 0.59 0.79 5.00 0.53 0.59 0.67 0.87 FUNCTION FALL 10.00 0.61 0.66 0.74 0.94 30.00 0.86 0.91 0.99 1.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0452 0.06 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.41 0.49 0.37 0.44 0.52 0.43 0.50 0.58 0.58 0.65 0.73 30.00 0.81 0.83 0.90 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0185 0.13 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.55 0.62 0.51 0.58 0.66 0.56 0.63 0.70 0.66 0.73 0.81 30.00 0.87 0.91 0.95 1.06 Rev.1.01.10 2 - 790 TC200G SERIES DATA SHEET ND8 CELL NAME ND8 FUNCTION 8-INPUT NAND 6 LOGIC SYMBOL TRUTH TABLE A H INPUT B CD E F GH HHHHHHH ALL OTHER COMBINATIONS OUTPUT Z L H 0 ND8 CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F G H ND8 Z Verilog-HDL DESCRIPTION ND8 inst(Z,A,B,C,D,E,F,G,H); VHDL DESCRIPTION inst:ND8 port map(Z,A,B,C,D,E,F,G,H); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B,F,H C,G D E (LU) LOAD 1.09 1.03 0.98 1.07 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 45.4 Rev.1.01.10 2 - 791 TC200G SERIES DATA SHEET ND8 ND8 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.42 0.58 0.31 0.45 0.61 0.34 0.47 0.64 0.34 0.47 0.63 30.00 1.22 1.25 1.28 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.43 0.50 0.61 0.89 5.00 0.55 0.62 0.72 1.01 FUNCTION FALL 10.00 0.67 0.74 0.85 1.14 30.00 1.14 1.21 1.32 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.45 0.61 0.34 0.48 0.64 0.38 0.52 0.68 0.42 0.55 0.71 30.00 1.25 1.28 1.32 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.58 0.70 0.52 0.64 0.76 0.62 0.73 0.86 0.88 1.00 1.12 30.00 1.17 1.23 1.32 1.59 Rev.1.01.10 2 - 792 TC200G SERIES DATA SHEET ND8 ND8 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.49 0.65 0.38 0.51 0.67 0.43 0.57 0.73 0.53 0.66 0.82 30.00 1.29 1.31 1.37 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.53 0.60 0.79 5.00 0.61 0.65 0.71 0.91 FUNCTION FALL 10.00 0.73 0.77 0.84 1.03 30.00 1.20 1.24 1.30 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.51 0.67 0.39 0.53 0.69 0.46 0.59 0.75 0.59 0.72 0.88 30.00 1.31 1.33 1.39 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.62 0.74 0.53 0.65 0.77 0.58 0.69 0.82 0.71 0.83 0.95 30.00 1.21 1.24 1.29 1.42 Rev.1.01.10 2 - 793 TC200G SERIES DATA SHEET ND8 ND8 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.43 0.59 0.32 0.46 0.62 0.35 0.49 0.65 0.35 0.48 0.65 30.00 1.23 1.26 1.29 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.50 0.60 0.89 5.00 0.54 0.62 0.72 1.00 FUNCTION FALL 10.00 0.67 0.74 0.85 1.13 30.00 1.13 1.21 1.31 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.46 0.62 0.35 0.49 0.65 0.39 0.53 0.69 0.43 0.57 0.73 30.00 1.26 1.29 1.33 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.57 0.70 0.51 0.63 0.76 0.61 0.73 0.85 0.87 0.99 1.11 30.00 1.17 1.22 1.32 1.58 Rev.1.01.10 2 - 794 TC200G SERIES DATA SHEET ND8 ND8 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.50 0.66 0.39 0.52 0.68 0.45 0.58 0.74 0.55 0.68 0.84 30.00 1.30 1.32 1.38 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION G->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.49 0.53 0.59 0.77 5.00 0.60 0.64 0.70 0.89 FUNCTION FALL 10.00 0.73 0.77 0.83 1.01 30.00 1.19 1.23 1.30 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.50 0.66 0.39 0.52 0.68 0.45 0.58 0.74 0.57 0.70 0.86 30.00 1.30 1.32 1.38 1.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0392 0.10 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.61 0.74 0.53 0.64 0.77 0.57 0.69 0.81 0.70 0.82 0.94 30.00 1.20 1.23 1.28 1.41 Rev.1.01.10 2 - 795 TC200G SERIES DATA SHEET ND8P CELL NAME ND8P FUNCTION 8-INPUT NAND 6 LOGIC SYMBOL TRUTH TABLE A H INPUT B CD E F GH HHHHHHH ALL OTHER COMBINATIONS OUTPUT Z L H 0 ND8P CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F G H ND8P Z Verilog-HDL DESCRIPTION ND8P inst(Z,A,B,C,D,E,F,G,H); VHDL DESCRIPTION inst:ND8P port map(Z,A,B,C,D,E,F,G,H); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B,D,F C E G H (LU) LOAD 0.99 1.03 0.98 1.04 1.05 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 77.2 Rev.1.01.10 2 - 796 TC200G SERIES DATA SHEET ND8P ND8P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.46 0.32 0.40 0.49 0.35 0.43 0.52 0.35 0.43 0.53 30.00 0.83 0.86 0.89 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.48 0.55 0.66 0.95 5.00 0.56 0.63 0.74 1.03 FUNCTION FALL 10.00 0.65 0.72 0.83 1.12 30.00 0.94 1.02 1.13 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.49 0.35 0.43 0.52 0.39 0.47 0.57 0.43 0.51 0.61 30.00 0.86 0.89 0.94 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.59 0.68 0.57 0.65 0.74 0.67 0.75 0.84 0.93 1.02 1.10 30.00 0.98 1.04 1.13 1.40 Rev.1.01.10 2 - 797 TC200G SERIES DATA SHEET ND8P ND8P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.44 0.54 0.39 0.47 0.56 0.44 0.53 0.62 0.55 0.63 0.72 30.00 0.91 0.93 0.99 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.54 0.58 0.64 0.84 5.00 0.62 0.66 0.73 0.93 FUNCTION FALL 10.00 0.71 0.75 0.81 1.01 30.00 1.01 1.05 1.11 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.44 0.54 0.38 0.47 0.56 0.45 0.53 0.62 0.57 0.65 0.74 30.00 0.90 0.93 0.99 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.63 0.72 0.58 0.66 0.75 0.63 0.71 0.80 0.77 0.86 0.94 30.00 1.02 1.05 1.10 1.24 Rev.1.01.10 2 - 798 TC200G SERIES DATA SHEET ND8P ND8P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.46 0.31 0.39 0.49 0.34 0.42 0.52 0.32 0.40 0.50 30.00 0.83 0.86 0.88 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.47 0.54 0.65 0.95 5.00 0.55 0.63 0.74 1.03 FUNCTION FALL 10.00 0.64 0.71 0.82 1.12 30.00 0.94 1.01 1.12 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.41 0.50 0.36 0.44 0.53 0.40 0.48 0.57 0.44 0.52 0.61 30.00 0.87 0.90 0.94 0.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.50 0.59 0.67 0.56 0.64 0.73 0.66 0.74 0.83 0.92 1.01 1.09 30.00 0.97 1.03 1.13 1.39 Rev.1.01.10 2 - 799 TC200G SERIES DATA SHEET ND8P ND8P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.45 0.55 0.40 0.48 0.57 0.45 0.53 0.63 0.55 0.63 0.73 30.00 0.92 0.94 1.00 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION G->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.54 0.58 0.64 0.83 5.00 0.62 0.66 0.72 0.92 FUNCTION FALL 10.00 0.71 0.75 0.81 1.00 30.00 1.01 1.05 1.11 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.45 0.54 0.39 0.48 0.57 0.45 0.54 0.63 0.57 0.65 0.75 30.00 0.91 0.94 1.00 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0234 0.13 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.63 0.72 0.58 0.66 0.75 0.63 0.71 0.79 0.77 0.85 0.94 30.00 1.02 1.05 1.09 1.24 Rev.1.01.10 2 - 800 TC200G SERIES DATA SHEET NR2 CELL NAME NR2 FUNCTION 2-INPUT NOR 1 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 NR2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z H L L L A B NR2 Z Verilog-HDL DESCRIPTION NR2 inst(Z,A,B); VHDL DESCRIPTION inst:NR2 port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 24.8 Rev.1.01.10 2 - 801 TC200G SERIES DATA SHEET NR2 NR2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.18 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.41 0.72 0.18 0.43 0.74 0.24 0.49 0.80 0.40 0.70 1.02 30.00 1.96 1.97 2.02 2.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0411 0.09 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.14 0.13 5.00 0.16 0.24 0.32 0.41 FUNCTION FALL 10.00 0.28 0.37 0.48 0.66 30.00 0.76 0.85 0.99 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1782 0.18 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.19 0.44 0.75 0.18 0.43 0.74 0.21 0.46 0.76 0.31 0.58 0.88 30.00 1.98 1.98 1.98 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0411 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.17 0.29 0.13 0.25 0.38 0.17 0.33 0.49 0.18 0.45 0.68 30.00 0.77 0.86 1.00 1.36 Rev.1.01.10 2 - 802 TC200G SERIES DATA SHEET NR2P CELL NAME NR2P FUNCTION 2-INPUT NOR 2 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 NR2P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z H L L L A B NR2P Z Verilog-HDL DESCRIPTION NR2P inst(Z,A,B); VHDL DESCRIPTION inst:NR2P port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B (LU) LOAD 2.07 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 48.8 Rev.1.01.10 2 - 803 TC200G SERIES DATA SHEET NR2P NR2P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0888 0.18 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.42 0.15 0.27 0.43 0.21 0.34 0.49 0.36 0.52 0.70 30.00 1.04 1.04 1.10 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0193 0.11 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.05 0.10 0.11 0.08 5.00 0.10 0.17 0.22 0.25 FUNCTION FALL 10.00 0.16 0.24 0.32 0.41 30.00 0.40 0.49 0.61 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0888 0.18 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.43 0.14 0.27 0.43 0.17 0.30 0.45 0.27 0.41 0.57 30.00 1.05 1.05 1.06 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0193 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.11 0.17 0.11 0.18 0.25 0.13 0.23 0.33 0.14 0.29 0.44 30.00 0.41 0.49 0.62 0.88 Rev.1.01.10 2 - 804 TC200G SERIES DATA SHEET NR3 CELL NAME NR3 FUNCTION 3-INPUT NOR 2 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 NR3 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C NR3 Z C L H L H L H L H OUTPUT Z H L L L L L L L Verilog-HDL DESCRIPTION NR3 inst(Z,A,B,C); VHDL DESCRIPTION inst:NR3 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.07 1.03 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 16.8 Rev.1.01.10 2 - 805 TC200G SERIES DATA SHEET NR3 NR3 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2674 0.42 PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.67 1.14 0.29 0.66 1.14 0.37 0.73 1.19 0.61 1.00 1.45 30.00 3.03 3.03 3.06 3.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0413 0.11 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.07 0.13 0.16 0.13 5.00 0.17 0.25 0.33 0.41 FUNCTION FALL 10.00 0.29 0.38 0.49 0.66 30.00 0.77 0.86 1.00 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2674 0.42 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.72 1.19 0.32 0.70 1.17 0.36 0.73 1.19 0.55 0.92 1.37 30.00 3.07 3.07 3.07 3.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0413 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.18 0.30 0.15 0.26 0.38 0.18 0.34 0.50 0.17 0.44 0.68 30.00 0.78 0.87 1.01 1.36 Rev.1.01.10 2 - 806 TC200G SERIES DATA SHEET NR3 NR3 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.2674 0.42 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.73 1.21 0.33 0.71 1.19 0.34 0.70 1.16 0.47 0.82 1.25 30.00 3.09 3.08 3.04 3.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0413 0.11 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.14 0.18 0.18 5.00 0.18 0.25 0.34 0.43 FUNCTION FALL 10.00 0.29 0.37 0.48 0.66 30.00 0.74 0.83 0.97 1.31 Rev.1.01.10 2 - 807 TC200G SERIES DATA SHEET NR3P CELL NAME NR3P FUNCTION 3-INPUT NOR 3 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 NR3P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C NR3P Z C L H L H L H L H OUTPUT Z H L L L L L L L Verilog-HDL DESCRIPTION NR3P inst(Z,A,B,C); VHDL DESCRIPTION inst:NR3P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 2.10 2.02 1.96 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 32.4 Rev.1.01.10 2 - 808 TC200G SERIES DATA SHEET NR3P NR3P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1381 0.42 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.44 0.69 0.25 0.44 0.68 0.33 0.52 0.75 0.56 0.78 1.02 30.00 1.66 1.66 1.70 1.96 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0229 0.18 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.13 0.08 5.00 0.11 0.18 0.23 0.25 FUNCTION FALL 10.00 0.17 0.25 0.33 0.41 30.00 0.41 0.50 0.62 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1381 0.42 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.49 0.74 0.27 0.47 0.72 0.32 0.51 0.75 0.51 0.72 0.95 30.00 1.71 1.70 1.71 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0229 0.18 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.12 0.18 0.13 0.19 0.26 0.15 0.25 0.34 0.12 0.28 0.44 30.00 0.42 0.51 0.63 0.88 Rev.1.01.10 2 - 809 TC200G SERIES DATA SHEET NR3P NR3P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1381 0.42 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.52 0.76 0.29 0.49 0.74 0.30 0.48 0.72 0.40 0.60 0.82 30.00 1.74 1.72 1.69 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0229 0.18 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.15 0.19 0.20 5.00 0.15 0.22 0.29 0.36 FUNCTION FALL 10.00 0.22 0.30 0.39 0.52 30.00 0.50 0.58 0.71 0.98 Rev.1.01.10 2 - 810 TC200G SERIES DATA SHEET NR4 CELL NAME NR4 FUNCTION 4-INPUT NOR 2 LOGIC SYMBOL 0 NR4 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L L L L ALL OTHER COMBINATIONS OUTPUT Z H L A B C D NR4 Z Verilog-HDL DESCRIPTION NR4 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:NR4 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.07 1.04 0.98 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 12.6 Rev.1.01.10 2 - 811 TC200G SERIES DATA SHEET NR4 NR4 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.3546 0.60 PATH DELAY (ns) 1.00 5.00 10.00 0.37 0.87 1.50 0.36 0.86 1.49 0.45 0.93 1.54 0.73 1.22 1.82 30.00 4.00 4.00 4.03 4.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0416 0.17 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.07 0.14 0.17 0.12 5.00 0.17 0.25 0.33 0.40 FUNCTION FALL 10.00 0.29 0.38 0.49 0.65 30.00 0.76 0.85 1.00 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.3546 0.60 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.95 1.58 0.41 0.92 1.56 0.46 0.95 1.57 0.70 1.18 1.77 30.00 4.08 4.07 4.07 4.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0416 0.17 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.08 0.18 0.30 0.15 0.26 0.39 0.18 0.35 0.50 0.15 0.43 0.67 30.00 0.77 0.86 1.01 1.35 Rev.1.01.10 2 - 812 TC200G SERIES DATA SHEET NR4 NR4 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.3546 0.60 PATH DELAY (ns) 1.00 5.00 10.00 0.51 1.01 1.64 0.47 0.98 1.62 0.47 0.97 1.59 0.64 1.11 1.69 30.00 4.15 4.13 4.10 4.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0416 0.17 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.15 0.19 0.18 5.00 0.19 0.27 0.36 0.45 FUNCTION FALL 10.00 0.31 0.40 0.51 0.69 30.00 0.79 0.88 1.02 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.3546 0.60 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.52 1.03 1.66 0.48 1.00 1.63 0.46 0.96 1.58 0.61 1.07 1.64 30.00 4.16 4.15 4.09 4.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0416 0.17 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.19 0.32 0.15 0.27 0.40 0.20 0.36 0.52 0.19 0.46 0.70 30.00 0.80 0.89 1.03 1.38 Rev.1.01.10 2 - 813 TC200G SERIES DATA SHEET NR4P CELL NAME NR4P FUNCTION 4-INPUT NOR 4 LOGIC SYMBOL 0 NR4P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L L L L ALL OTHER COMBINATIONS OUTPUT Z H L A B C D NR4P Z Verilog-HDL DESCRIPTION NR4P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:NR4P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D (LU) LOAD 1.98 2.09 2.14 2.16 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 23.9 Rev.1.01.10 2 - 814 TC200G SERIES DATA SHEET NR4P NR4P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1872 0.64 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.58 0.91 0.32 0.57 0.90 0.41 0.66 0.97 0.68 0.95 1.27 30.00 2.22 2.22 2.26 2.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.12 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.14 0.07 5.00 0.11 0.18 0.23 0.24 FUNCTION FALL 10.00 0.16 0.25 0.33 0.40 30.00 0.39 0.48 0.61 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1872 0.64 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.68 1.01 0.37 0.64 0.98 0.42 0.69 1.01 0.67 0.92 1.24 30.00 2.32 2.30 2.31 2.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.12 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.12 0.17 0.13 0.19 0.26 0.16 0.25 0.34 0.11 0.27 0.42 30.00 0.41 0.50 0.62 0.86 Rev.1.01.10 2 - 815 TC200G SERIES DATA SHEET NR4P NR4P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1872 0.64 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.74 1.07 0.43 0.70 1.03 0.43 0.69 1.02 0.60 0.85 1.16 30.00 2.38 2.36 2.32 2.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.12 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.07 0.14 0.17 0.13 5.00 0.12 0.20 0.26 0.29 FUNCTION FALL 10.00 0.18 0.27 0.35 0.45 30.00 0.42 0.51 0.63 0.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.1872 0.64 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.49 0.76 1.08 0.44 0.71 1.05 0.42 0.69 1.01 0.59 0.83 1.13 30.00 2.40 2.37 2.32 2.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.12 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.11 0.17 0.12 0.19 0.25 0.15 0.24 0.33 0.11 0.27 0.42 30.00 0.39 0.47 0.59 0.83 Rev.1.01.10 2 - 816 TC200G SERIES DATA SHEET NR5 CELL NAME NR5 FUNCTION 5-INPUT NOR 4 LOGIC SYMBOL 0 NR5 CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D E L L L L L ALL OTHER COMBINATIONS OUTPUT Z H L A B C D E NR5 Z Verilog-HDL DESCRIPTION NR5 inst(Z,A,B,C,D,E); VHDL DESCRIPTION inst:NR5 port map(Z,A,B,C,D,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D E (LU) LOAD 1.04 0.99 0.98 1.05 1.07 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 44.5 Rev.1.01.10 2 - 817 TC200G SERIES DATA SHEET NR5 NR5 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.70 0.87 0.55 0.70 0.87 0.64 0.79 0.96 0.92 1.06 1.24 30.00 1.54 1.54 1.63 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0401 0.07 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.32 0.36 0.37 5.00 0.36 0.43 0.47 0.47 FUNCTION FALL 10.00 0.48 0.55 0.59 0.59 30.00 0.95 1.01 1.06 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.75 0.92 0.58 0.73 0.90 0.64 0.78 0.96 0.86 1.01 1.18 30.00 1.59 1.57 1.63 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0401 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.37 0.49 0.34 0.44 0.56 0.39 0.49 0.61 0.42 0.52 0.64 30.00 0.96 1.03 1.08 1.11 Rev.1.01.10 2 - 818 TC200G SERIES DATA SHEET NR5 NR5 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.77 0.95 0.60 0.75 0.92 0.61 0.76 0.93 0.78 0.93 1.10 30.00 1.62 1.59 1.60 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0401 0.07 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.35 0.41 0.46 5.00 0.38 0.46 0.52 0.57 FUNCTION FALL 10.00 0.51 0.58 0.64 0.70 30.00 0.97 1.04 1.10 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.38 0.53 0.70 0.40 0.54 0.72 0.48 0.62 0.79 0.68 0.82 0.99 30.00 1.37 1.38 1.46 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0401 0.07 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.38 0.50 0.33 0.44 0.56 0.37 0.48 0.60 0.39 0.50 0.63 30.00 0.96 1.03 1.07 1.09 Rev.1.01.10 2 - 819 TC200G SERIES DATA SHEET NR5 NR5 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.55 0.72 0.40 0.54 0.71 0.44 0.58 0.76 0.58 0.73 0.90 30.00 1.39 1.38 1.42 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0401 0.07 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.34 0.39 0.48 5.00 0.39 0.45 0.51 0.59 FUNCTION FALL 10.00 0.52 0.58 0.63 0.71 30.00 0.98 1.04 1.09 1.18 Rev.1.01.10 2 - 820 TC200G SERIES DATA SHEET NR5P CELL NAME NR5P FUNCTION 5-INPUT NOR 5 LOGIC SYMBOL 0 NR5P CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D E L L L L L ALL OTHER COMBINATIONS OUTPUT Z H L A B C D E NR5P Z Verilog-HDL DESCRIPTION NR5P inst(Z,A,B,C,D,E); VHDL DESCRIPTION inst:NR5P port map(Z,A,B,C,D,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C D E (LU) LOAD 1.07 1.04 0.99 1.01 1.02 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 86.2 Rev.1.01.10 2 - 821 TC200G SERIES DATA SHEET NR5P NR5P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0467 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.63 0.72 0.55 0.63 0.72 0.64 0.72 0.81 0.92 0.99 1.08 30.00 1.05 1.05 1.14 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.34 0.38 0.39 5.00 0.35 0.41 0.46 0.46 FUNCTION FALL 10.00 0.42 0.49 0.53 0.54 30.00 0.71 0.78 0.82 0.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0467 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.68 0.77 0.58 0.66 0.74 0.64 0.71 0.80 0.86 0.94 1.02 30.00 1.10 1.08 1.13 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.43 0.36 0.43 0.51 0.41 0.48 0.56 0.44 0.51 0.59 30.00 0.72 0.79 0.84 0.87 Rev.1.01.10 2 - 822 TC200G SERIES DATA SHEET NR5P NR5P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0467 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.70 0.79 0.59 0.67 0.76 0.61 0.69 0.78 0.79 0.86 0.95 30.00 1.12 1.09 1.11 1.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.36 0.41 0.46 5.00 0.36 0.43 0.48 0.53 FUNCTION FALL 10.00 0.44 0.51 0.56 0.61 30.00 0.72 0.79 0.84 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0467 0.09 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.47 0.56 0.41 0.48 0.57 0.48 0.56 0.65 0.69 0.76 0.85 30.00 0.89 0.90 0.98 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.36 0.44 0.35 0.42 0.50 0.38 0.46 0.54 0.41 0.49 0.57 30.00 0.72 0.79 0.83 0.85 Rev.1.01.10 2 - 823 TC200G SERIES DATA SHEET NR5P NR5P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0467 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.48 0.57 0.40 0.48 0.57 0.45 0.53 0.61 0.59 0.66 0.75 30.00 0.90 0.90 0.94 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.36 0.41 0.48 5.00 0.37 0.44 0.49 0.56 FUNCTION FALL 10.00 0.45 0.52 0.57 0.64 30.00 0.74 0.80 0.85 0.93 Rev.1.01.10 2 - 824 TC200G SERIES DATA SHEET NR6 CELL NAME NR6 FUNCTION 6-INPUT NOR 5 LOGIC SYMBOL TRUTH TABLE INPUT A B C D E F L L L L L L ALL OTHER COMBINATIONS OUTPUT Z H L 0 NR6 CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F NR6 Z Verilog-HDL DESCRIPTION NR6 inst(Z,A,B,C,D,E,F); VHDL DESCRIPTION inst:NR6 port map(Z,A,B,C,D,E,F); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B,F C D E (LU) LOAD 1.04 0.99 0.98 1.08 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 44.4 Rev.1.01.10 2 - 825 TC200G SERIES DATA SHEET NR6 NR6 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.69 0.86 0.54 0.69 0.86 0.64 0.78 0.95 0.91 1.06 1.23 30.00 1.53 1.53 1.62 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0402 0.07 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.24 0.31 0.35 0.36 5.00 0.35 0.42 0.46 0.46 FUNCTION FALL 10.00 0.47 0.53 0.58 0.58 30.00 0.93 1.00 1.04 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.59 0.74 0.91 0.57 0.72 0.89 0.63 0.78 0.95 0.86 1.00 1.17 30.00 1.58 1.56 1.62 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0402 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.36 0.48 0.33 0.43 0.55 0.38 0.48 0.60 0.41 0.51 0.63 30.00 0.94 1.01 1.06 1.09 Rev.1.01.10 2 - 826 TC200G SERIES DATA SHEET NR6 NR6 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.77 0.94 0.59 0.74 0.91 0.61 0.75 0.92 0.78 0.92 1.09 30.00 1.61 1.58 1.60 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0402 0.07 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.34 0.40 0.45 5.00 0.37 0.44 0.50 0.56 FUNCTION FALL 10.00 0.49 0.56 0.62 0.68 30.00 0.95 1.03 1.09 1.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.65 0.82 0.51 0.65 0.82 0.60 0.75 0.92 0.87 1.01 1.18 30.00 1.49 1.49 1.59 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0402 0.07 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.37 0.49 0.33 0.44 0.56 0.37 0.48 0.60 0.38 0.48 0.60 30.00 0.95 1.02 1.06 1.07 Rev.1.01.10 2 - 827 TC200G SERIES DATA SHEET NR6 NR6 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.70 0.87 0.54 0.68 0.85 0.59 0.74 0.91 0.81 0.95 1.13 30.00 1.54 1.52 1.58 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0402 0.07 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.34 0.39 0.43 5.00 0.38 0.45 0.50 0.54 FUNCTION FALL 10.00 0.50 0.57 0.62 0.66 30.00 0.96 1.03 1.09 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0964 0.11 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.58 0.72 0.89 0.55 0.69 0.86 0.57 0.71 0.88 0.73 0.88 1.05 30.00 1.56 1.53 1.55 1.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0402 0.07 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.38 0.50 0.34 0.45 0.57 0.40 0.51 0.63 0.45 0.56 0.68 30.00 0.96 1.03 1.09 1.14 Rev.1.01.10 2 - 828 TC200G SERIES DATA SHEET NR6P CELL NAME NR6P FUNCTION 6-INPUT NOR 5 LOGIC SYMBOL TRUTH TABLE INPUT A B C D E F L L L L L L ALL OTHER COMBINATIONS OUTPUT Z H L 0 NR6P CELL COUNT GATE I/O 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F NR6P Z Verilog-HDL DESCRIPTION NR6P inst(Z,A,B,C,D,E,F); VHDL DESCRIPTION inst:NR6P port map(Z,A,B,C,D,E,F); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,C B,D,E F (LU) LOAD 0.98 0.99 0.97 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 96.5 Rev.1.01.10 2 - 829 TC200G SERIES DATA SHEET NR6P NR6P 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.64 0.72 0.57 0.64 0.72 0.66 0.74 0.82 0.95 1.02 1.11 30.00 1.04 1.04 1.14 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.08 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.32 0.36 0.35 5.00 0.32 0.38 0.42 0.41 FUNCTION FALL 10.00 0.38 0.45 0.49 0.48 30.00 0.61 0.68 0.72 0.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.63 0.70 0.78 0.61 0.68 0.76 0.66 0.74 0.82 0.90 0.97 1.05 30.00 1.10 1.08 1.14 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.33 0.40 0.34 0.41 0.47 0.40 0.46 0.53 0.43 0.49 0.56 30.00 0.63 0.70 0.76 0.79 Rev.1.01.10 2 - 830 TC200G SERIES DATA SHEET NR6P NR6P 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.72 0.81 0.62 0.69 0.77 0.64 0.71 0.79 0.82 0.89 0.98 30.00 1.12 1.09 1.11 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.08 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.34 0.39 0.43 5.00 0.33 0.40 0.45 0.49 FUNCTION FALL 10.00 0.39 0.47 0.52 0.56 30.00 0.62 0.69 0.75 0.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.08 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.61 0.70 0.54 0.61 0.69 0.63 0.70 0.79 0.91 0.98 1.07 30.00 1.01 1.01 1.11 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.08 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.33 0.40 0.33 0.40 0.47 0.38 0.44 0.51 0.38 0.44 0.51 30.00 0.63 0.70 0.74 0.74 Rev.1.01.10 2 - 831 TC200G SERIES DATA SHEET NR6P NR6P 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.67 0.75 0.57 0.65 0.73 0.63 0.70 0.79 0.86 0.93 1.02 30.00 1.07 1.05 1.11 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.08 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.35 0.40 0.43 5.00 0.34 0.41 0.46 0.49 FUNCTION FALL 10.00 0.41 0.48 0.53 0.56 30.00 0.64 0.71 0.76 0.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0448 0.08 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.69 0.78 0.59 0.66 0.74 0.60 0.68 0.76 0.79 0.86 0.94 30.00 1.09 1.06 1.08 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0184 0.08 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.33 0.40 0.34 0.40 0.47 0.39 0.46 0.52 0.42 0.49 0.56 30.00 0.63 0.70 0.75 0.79 Rev.1.01.10 2 - 832 TC200G SERIES DATA SHEET NR8 CELL NAME NR8 FUNCTION 8-INPUT NOR 6 LOGIC SYMBOL TRUTH TABLE A L INPUT B CD E F GH L L L L L L L ALL OTHER COMBINATIONS OUTPUT Z H L 0 NR8 CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F G H NR8 Z Verilog-HDL DESCRIPTION NR8 inst(Z,A,B,C,D,E,F,G,H); VHDL DESCRIPTION inst:NR8 port map(Z,A,B,C,D,E,F,G,H); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B,F,H C,G D,E (LU) LOAD 1.12 1.03 0.98 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 47.6 Rev.1.01.10 2 - 833 TC200G SERIES DATA SHEET NR8 NR8 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.74 0.90 0.60 0.73 0.89 0.70 0.83 0.99 1.00 1.13 1.29 30.00 1.51 1.50 1.60 1.91 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.25 0.32 0.36 0.35 5.00 0.36 0.43 0.47 0.46 FUNCTION FALL 10.00 0.47 0.54 0.58 0.58 30.00 0.93 1.00 1.04 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.69 0.82 0.97 0.65 0.79 0.94 0.72 0.85 1.00 0.96 1.10 1.25 30.00 1.59 1.56 1.62 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.37 0.48 0.34 0.44 0.56 0.38 0.49 0.61 0.40 0.50 0.62 30.00 0.94 1.01 1.06 1.08 Rev.1.01.10 2 - 834 TC200G SERIES DATA SHEET NR8 NR8 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.88 1.04 0.71 0.84 1.00 0.72 0.85 1.01 0.91 1.04 1.20 30.00 1.65 1.61 1.62 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.35 0.40 0.44 5.00 0.38 0.45 0.51 0.54 FUNCTION FALL 10.00 0.49 0.57 0.62 0.66 30.00 0.95 1.02 1.08 1.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.89 1.05 0.71 0.85 1.00 0.70 0.84 0.99 0.87 1.01 1.16 30.00 1.66 1.62 1.61 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.38 0.49 0.35 0.45 0.57 0.40 0.51 0.63 0.44 0.55 0.67 30.00 0.95 1.02 1.08 1.13 Rev.1.01.10 2 - 835 TC200G SERIES DATA SHEET NR8 NR8 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.60 0.73 0.89 0.59 0.73 0.88 0.69 0.83 0.98 1.00 1.13 1.29 30.00 1.51 1.50 1.60 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.35 0.39 0.38 5.00 0.38 0.46 0.50 0.49 FUNCTION FALL 10.00 0.50 0.58 0.62 0.61 30.00 0.96 1.03 1.08 1.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.81 0.97 0.65 0.78 0.94 0.71 0.84 1.00 0.96 1.09 1.25 30.00 1.59 1.56 1.62 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.39 0.51 0.36 0.47 0.59 0.41 0.52 0.64 0.43 0.54 0.66 30.00 0.97 1.05 1.10 1.12 Rev.1.01.10 2 - 836 TC200G SERIES DATA SHEET NR8 NR8 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.87 1.03 0.70 0.83 0.99 0.71 0.85 1.00 0.90 1.03 1.19 30.00 1.65 1.61 1.62 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION G->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.30 0.37 0.43 0.47 5.00 0.41 0.48 0.54 0.58 FUNCTION FALL 10.00 0.53 0.60 0.66 0.70 30.00 0.98 1.06 1.12 1.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0877 0.12 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.89 1.04 0.71 0.84 1.00 0.70 0.83 0.99 0.88 1.01 1.17 30.00 1.66 1.62 1.61 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.07 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.40 0.52 0.36 0.47 0.59 0.41 0.52 0.64 0.44 0.55 0.67 30.00 0.97 1.05 1.10 1.13 Rev.1.01.10 2 - 837 TC200G SERIES DATA SHEET NR8P CELL NAME NR8P FUNCTION 8-INPUT NOR 6 LOGIC SYMBOL TRUTH TABLE A L INPUT B CD E F GH L L L L L L L ALL OTHER COMBINATIONS OUTPUT Z H L 0 NR8P CELL COUNT GATE I/O 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. A B C D E F G H NR8P Z Verilog-HDL DESCRIPTION NR8P inst(Z,A,B,C,D,E,F,G,H); VHDL DESCRIPTION inst:NR8P port map(Z,A,B,C,D,E,F,G,H); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C,G D E F,H (LU) LOAD 1.06 1.04 0.98 1.07 0.99 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 77.7 Rev.1.01.10 2 - 838 TC200G SERIES DATA SHEET NR8P NR8P 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.62 0.71 0.80 0.62 0.70 0.80 0.71 0.80 0.89 1.02 1.10 1.20 30.00 1.18 1.17 1.27 1.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.34 0.38 0.37 5.00 0.34 0.41 0.45 0.44 FUNCTION FALL 10.00 0.42 0.49 0.53 0.52 30.00 0.70 0.77 0.81 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.70 0.78 0.88 0.67 0.75 0.85 0.73 0.81 0.91 0.98 1.07 1.16 30.00 1.25 1.22 1.28 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.35 0.43 0.35 0.43 0.51 0.40 0.48 0.55 0.42 0.49 0.57 30.00 0.71 0.79 0.84 0.85 Rev.1.01.10 2 - 839 TC200G SERIES DATA SHEET NR8P NR8P 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.76 0.85 0.94 0.72 0.81 0.90 0.73 0.82 0.91 0.92 1.01 1.10 30.00 1.31 1.27 1.28 1.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.36 0.42 0.46 5.00 0.36 0.44 0.49 0.53 FUNCTION FALL 10.00 0.44 0.52 0.57 0.61 30.00 0.72 0.80 0.86 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.78 0.86 0.96 0.73 0.82 0.91 0.72 0.81 0.90 0.89 0.97 1.07 30.00 1.33 1.28 1.27 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.44 0.36 0.44 0.52 0.42 0.50 0.58 0.47 0.54 0.62 30.00 0.73 0.80 0.86 0.90 Rev.1.01.10 2 - 840 TC200G SERIES DATA SHEET NR8P NR8P 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.69 0.79 0.60 0.68 0.78 0.70 0.78 0.88 1.00 1.08 1.18 30.00 1.16 1.15 1.25 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.36 0.40 0.40 5.00 0.36 0.44 0.48 0.48 FUNCTION FALL 10.00 0.45 0.52 0.56 0.56 30.00 0.73 0.80 0.85 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.68 0.77 0.86 0.65 0.74 0.83 0.71 0.80 0.89 0.96 1.05 1.14 30.00 1.24 1.20 1.27 1.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION F->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.37 0.45 0.37 0.45 0.53 0.42 0.50 0.58 0.44 0.52 0.60 30.00 0.74 0.82 0.87 0.89 Rev.1.01.10 2 - 841 TC200G SERIES DATA SHEET NR8P NR8P 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION G->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.74 0.83 0.92 0.70 0.79 0.88 0.71 0.80 0.90 0.90 0.99 1.08 30.00 1.30 1.26 1.27 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION G->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.31 0.38 0.44 0.48 5.00 0.39 0.46 0.52 0.56 FUNCTION FALL 10.00 0.47 0.54 0.60 0.64 30.00 0.75 0.83 0.89 0.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0545 0.09 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.75 0.84 0.93 0.71 0.79 0.89 0.70 0.79 0.88 0.88 0.96 1.06 30.00 1.31 1.26 1.26 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0238 0.08 PATH CONDITION PATH CONDITION H->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.38 0.46 0.37 0.45 0.53 0.43 0.50 0.59 0.46 0.54 0.62 30.00 0.74 0.82 0.87 0.91 Rev.1.01.10 2 - 842 TC200G SERIES DATA SHEET OR2 CELL NAME OR2 FUNCTION 2-INPUT OR 2 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 OR2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L H H H A B OR2 Z Verilog-HDL DESCRIPTION OR2 inst(Z,A,B); VHDL DESCRIPTION inst:OR2 port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 1.08 1.09 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 45.4 Rev.1.01.10 2 - 843 TC200G SERIES DATA SHEET OR2 OR2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.28 0.44 0.21 0.34 0.50 0.24 0.38 0.54 0.26 0.40 0.57 30.00 1.08 1.14 1.18 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0393 0.10 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.26 0.27 0.35 0.55 5.00 0.37 0.39 0.47 0.67 FUNCTION FALL 10.00 0.50 0.51 0.59 0.80 30.00 0.96 0.98 1.06 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0942 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.29 0.45 0.22 0.35 0.52 0.27 0.41 0.57 0.34 0.48 0.64 30.00 1.09 1.16 1.21 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0393 0.10 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.39 0.52 0.27 0.39 0.51 0.31 0.43 0.56 0.44 0.57 0.70 30.00 0.98 0.98 1.02 1.18 Rev.1.01.10 2 - 844 TC200G SERIES DATA SHEET OR2P CELL NAME OR2P FUNCTION 2-INPUT OR 2 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 OR2P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L H H H A B OR2P Z Verilog-HDL DESCRIPTION OR2P inst(Z,A,B); VHDL DESCRIPTION inst:OR2P port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 1.08 1.04 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 77.5 Rev.1.01.10 2 - 845 TC200G SERIES DATA SHEET OR2P OR2P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.22 0.32 0.22 0.30 0.39 0.27 0.35 0.45 0.33 0.41 0.51 30.00 0.69 0.76 0.82 0.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0236 0.13 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.30 0.31 0.39 0.61 5.00 0.38 0.40 0.48 0.70 FUNCTION FALL 10.00 0.47 0.48 0.56 0.79 30.00 0.77 0.78 0.87 1.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0549 0.07 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.23 0.33 0.23 0.31 0.40 0.30 0.38 0.47 0.39 0.48 0.57 30.00 0.70 0.77 0.84 0.94 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0236 0.13 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.49 0.31 0.39 0.48 0.35 0.44 0.52 0.50 0.59 0.68 30.00 0.79 0.78 0.83 0.98 Rev.1.01.10 2 - 846 TC200G SERIES DATA SHEET OR3 CELL NAME OR3 FUNCTION 3-INPUT OR 2 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 OR3 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C OR3 Z C L H L H L H L H OUTPUT Z L H H H H H H H Verilog-HDL DESCRIPTION OR3 inst(Z,A,B,C); VHDL DESCRIPTION inst:OR3 port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.06 1.02 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 46.7 Rev.1.01.10 2 - 847 TC200G SERIES DATA SHEET OR3 OR3 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0888 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.22 0.35 0.51 0.26 0.39 0.55 0.26 0.40 0.55 30.00 1.05 1.12 1.16 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0394 0.17 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.39 0.39 0.48 0.75 5.00 0.53 0.53 0.62 0.89 FUNCTION FALL 10.00 0.67 0.67 0.76 1.04 30.00 1.17 1.17 1.26 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0888 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.29 0.45 0.23 0.36 0.52 0.29 0.42 0.57 0.31 0.45 0.60 30.00 1.06 1.13 1.19 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0394 0.17 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.58 0.72 0.42 0.56 0.70 0.47 0.61 0.76 0.69 0.83 0.98 30.00 1.22 1.20 1.26 1.48 Rev.1.01.10 2 - 848 TC200G SERIES DATA SHEET OR3 OR3 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0888 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.23 0.36 0.51 0.29 0.41 0.57 0.35 0.48 0.63 30.00 1.05 1.12 1.18 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0394 0.17 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.46 0.43 0.44 0.59 5.00 0.60 0.57 0.58 0.73 FUNCTION FALL 10.00 0.74 0.71 0.73 0.88 30.00 1.24 1.21 1.23 1.38 Rev.1.01.10 2 - 849 TC200G SERIES DATA SHEET OR3P CELL NAME OR3P FUNCTION 3-INPUT OR 3 LOGIC SYMBOL TRUTH TABLE INPUT A B L L L L L H L H H L H L H H H H 0 OR3P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. A B C OR3P Z C L H L H L H L H OUTPUT Z L H H H H H H H Verilog-HDL DESCRIPTION OR3P inst(Z,A,B,C); VHDL DESCRIPTION inst:OR3P port map(Z,A,B,C); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B C (LU) LOAD 1.07 1.04 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 84.3 Rev.1.01.10 2 - 850 TC200G SERIES DATA SHEET OR3P OR3P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0469 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.22 0.31 0.23 0.30 0.39 0.29 0.36 0.45 0.32 0.40 0.49 30.00 0.64 0.72 0.78 0.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0239 0.21 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.47 0.46 0.55 0.84 5.00 0.57 0.56 0.65 0.94 FUNCTION FALL 10.00 0.66 0.66 0.75 1.04 30.00 0.99 0.99 1.07 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0469 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.23 0.32 0.24 0.31 0.40 0.31 0.38 0.47 0.37 0.44 0.53 30.00 0.65 0.73 0.80 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0239 0.21 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.61 0.71 0.50 0.59 0.69 0.55 0.65 0.74 0.77 0.87 0.97 30.00 1.04 1.02 1.07 1.30 Rev.1.01.10 2 - 851 TC200G SERIES DATA SHEET OR3P OR3P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0469 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.24 0.32 0.24 0.31 0.40 0.31 0.38 0.47 0.38 0.46 0.55 30.00 0.65 0.73 0.80 0.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0239 0.21 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.54 0.51 0.52 0.68 5.00 0.63 0.61 0.62 0.78 FUNCTION FALL 10.00 0.73 0.70 0.72 0.88 30.00 1.06 1.03 1.04 1.21 Rev.1.01.10 2 - 852 TC200G SERIES DATA SHEET OR4 CELL NAME OR4 FUNCTION 4-INPUT OR 3 LOGIC SYMBOL 0 OR4 CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L L L L ALL OTHER COMBINATIONS OUTPUT Z L H A B C D OR4 Z Verilog-HDL DESCRIPTION OR4 inst(Z,A,B,C,D); VHDL DESCRIPTION inst:OR4 port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B,D C (LU) LOAD 1.04 1.03 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 45.5 Rev.1.01.10 2 - 853 TC200G SERIES DATA SHEET OR4 OR4 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0902 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.22 0.35 0.51 0.26 0.39 0.55 0.25 0.38 0.54 30.00 1.06 1.13 1.18 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.21 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.46 0.45 0.55 0.85 5.00 0.61 0.60 0.70 1.00 FUNCTION FALL 10.00 0.76 0.75 0.85 1.15 30.00 1.27 1.26 1.36 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0902 0.09 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.29 0.45 0.24 0.37 0.53 0.29 0.42 0.58 0.30 0.43 0.59 30.00 1.07 1.15 1.20 1.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.21 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.69 0.84 0.51 0.65 0.81 0.57 0.72 0.87 0.81 0.97 1.12 30.00 1.35 1.32 1.38 1.64 Rev.1.01.10 2 - 854 TC200G SERIES DATA SHEET OR4 OR4 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0902 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.31 0.47 0.25 0.38 0.54 0.30 0.44 0.59 0.34 0.47 0.63 30.00 1.09 1.16 1.22 1.26 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.21 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.60 0.56 0.57 0.75 5.00 0.75 0.71 0.72 0.91 FUNCTION FALL 10.00 0.90 0.86 0.87 1.06 30.00 1.41 1.37 1.38 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0902 0.09 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.30 0.46 0.23 0.37 0.53 0.29 0.42 0.58 0.31 0.45 0.61 30.00 1.09 1.16 1.21 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0398 0.21 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.76 0.91 0.57 0.71 0.87 0.56 0.71 0.86 0.73 0.88 1.04 30.00 1.42 1.38 1.37 1.56 Rev.1.01.10 2 - 855 TC200G SERIES DATA SHEET OR4P CELL NAME OR4P FUNCTION 4-INPUT OR 3 LOGIC SYMBOL 0 OR4P CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT A B C D L L L L ALL OTHER COMBINATIONS OUTPUT Z L H A B C D OR4P Z Verilog-HDL DESCRIPTION OR4P inst(Z,A,B,C,D); VHDL DESCRIPTION inst:OR4P port map(Z,A,B,C,D); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT LOAD PIN NAME A,B C D (LU) LOAD 1.06 0.98 1.00 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 82.8 Rev.1.01.10 2 - 856 TC200G SERIES DATA SHEET OR4P OR4P 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0470 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.22 0.31 0.23 0.30 0.38 0.28 0.36 0.44 0.31 0.38 0.47 30.00 0.63 0.71 0.77 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0244 0.27 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.57 0.56 0.65 0.97 5.00 0.68 0.67 0.76 1.08 FUNCTION FALL 10.00 0.78 0.77 0.86 1.18 30.00 1.13 1.12 1.21 1.53 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0470 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.23 0.32 0.24 0.31 0.40 0.31 0.38 0.47 0.35 0.43 0.51 30.00 0.65 0.73 0.79 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0244 0.27 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.65 0.76 0.87 0.62 0.73 0.84 0.68 0.78 0.89 0.93 1.04 1.15 30.00 1.22 1.18 1.24 1.50 Rev.1.01.10 2 - 857 TC200G SERIES DATA SHEET OR4P OR4P 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION C->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0470 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.24 0.33 0.25 0.32 0.41 0.32 0.39 0.48 0.39 0.46 0.55 30.00 0.66 0.74 0.81 0.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0244 0.27 PATH CONDITION PATH CONDITION C->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.72 0.68 0.68 0.87 5.00 0.82 0.79 0.79 0.97 FUNCTION FALL 10.00 0.93 0.89 0.90 1.08 30.00 1.28 1.24 1.24 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0470 0.08 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.23 0.32 0.23 0.31 0.39 0.30 0.38 0.46 0.36 0.43 0.52 30.00 0.65 0.73 0.79 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0244 0.27 PATH CONDITION PATH CONDITION D->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.73 0.84 0.94 0.69 0.80 0.90 0.67 0.78 0.89 0.84 0.95 1.06 30.00 1.29 1.25 1.23 1.41 Rev.1.01.10 2 - 858 TC200G SERIES DATA SHEET PDI CELL NAME PDI FUNCTION INTERNAL PULL-DOWN for PREVENTING BUS FLOATING TRUTH TABLE INPUT EN L H PDI CELL COUNT GATE 1 I/O 0 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z L HZ EN PDI Z Verilog-HDL DESCRIPTION PDI inst(Z,EN); VHDL DESCRIPTION inst:PDI port map(Z,EN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT CAPACITANCE PIN NAME Cin (LU) Z 0.39 INPUT LOAD PIN NAME EN (LU) TYPICAL 1.01 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 168.1 Rev.1.01.11 2 - 859 TC200G SERIES DATA SHEET PDI PDI 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION EN->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 0-Z SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 1.39 5.39 10.39 0.06 0.06 0.06 0.12 0.12 0.12 0.18 0.18 0.18 0.34 0.34 0.34 30.39 0.06 0.12 0.18 0.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0386 0.05 PATH CONDITION PATH CONDITION EN->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.39 0.11 0.14 0.18 0.27 5.39 0.21 0.24 0.29 0.40 FUNCTION Z-0 10.39 0.32 0.35 0.40 0.52 30.39 0.76 0.79 0.85 0.97 Rev.1.01.11 2 - 860 TC200G SERIES DATA SHEET PUI CELL NAME PUI FUNCTION INTERNAL PULL-UP for PREVENTING BUS FLOATING TRUTH TABLE INPUT E L H PUI CELL COUNT GATE 1 I/O 0 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z HZ H E PUI Z Verilog-HDL DESCRIPTION PUI inst(Z,E); VHDL DESCRIPTION inst:PUI port map(Z,E); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 6880.0 (LU*MHz) INPUT CAPACITANCE PIN NAME Cin (LU) Z 0.39 INPUT LOAD PIN NAME E (LU) TYPICAL 1.01 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 67.9 Rev.1.01.11 2 - 861 TC200G SERIES DATA SHEET PUI PUI 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION E->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION 1-Z SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 1.39 5.39 10.39 0.11 0.11 0.11 0.15 0.15 0.15 0.24 0.24 0.24 0.49 0.49 0.49 30.39 0.11 0.15 0.24 0.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0929 0.04 PATH CONDITION PATH CONDITION E->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.39 0.10 0.14 0.17 0.19 5.39 0.22 0.27 0.30 0.36 FUNCTION Z-1 10.39 0.37 0.42 0.46 0.53 30.39 0.98 1.04 1.08 1.17 Rev.1.01.11 2 - 862 TC200G SERIES DATA SHEET YCAN2 CELL NAME YCAN2 FUNCTION CLOCK BUFFER with 2-INPUT AND 4 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 YCAN2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L L L H A B YCAN2 Z Verilog-HDL DESCRIPTION YCAN2 inst(Z,A,B); VHDL DESCRIPTION inst:YCAN2 port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A,B (LU) LOAD 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 235.9 Rev.1.01.10 2 - 863 TC200G SERIES DATA SHEET YCAN2 YCAN2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0145 0.11 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.24 0.28 0.29 0.32 0.36 0.40 0.43 0.47 0.62 0.66 0.69 30.00 0.40 0.48 0.59 0.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0118 0.13 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.31 0.39 0.54 5.00 0.32 0.36 0.43 0.58 FUNCTION FALL 10.00 0.37 0.40 0.47 0.63 30.00 0.53 0.57 0.64 0.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0145 0.11 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.25 0.29 0.27 0.31 0.34 0.35 0.38 0.42 0.51 0.54 0.58 30.00 0.41 0.46 0.54 0.70 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0118 0.13 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.34 0.39 0.33 0.37 0.42 0.41 0.45 0.50 0.59 0.63 0.68 30.00 0.56 0.59 0.66 0.85 Rev.1.01.10 2 - 864 TC200G SERIES DATA SHEET YCAN2P CELL NAME YCAN2P FUNCTION CLOCK BUFFER with 2-INPUT AND 8 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 YCAN2P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L L L H A B YCAN2P Z Verilog-HDL DESCRIPTION YCAN2P inst(Z,A,B); VHDL DESCRIPTION inst:YCAN2P port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 1.97 2.05 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 458.8 Rev.1.01.10 2 - 865 TC200G SERIES DATA SHEET YCAN2P YCAN2P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0074 0.12 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.24 0.26 0.30 0.32 0.34 0.41 0.43 0.45 0.65 0.67 0.69 30.00 0.33 0.41 0.52 0.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0061 0.13 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.27 0.30 0.37 0.51 5.00 0.29 0.33 0.40 0.54 FUNCTION FALL 10.00 0.32 0.35 0.42 0.56 30.00 0.41 0.44 0.51 0.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0074 0.12 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.25 0.27 0.29 0.31 0.33 0.37 0.39 0.41 0.54 0.56 0.58 30.00 0.34 0.40 0.48 0.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0061 0.13 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.32 0.35 0.33 0.35 0.38 0.40 0.43 0.45 0.57 0.60 0.63 30.00 0.44 0.47 0.54 0.72 Rev.1.01.10 2 - 866 TC200G SERIES DATA SHEET YCBUF CELL NAME YCBUF FUNCTION CLOCK BUFFER 4 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YCBUF CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A YCBUF Z Verilog-HDL DESCRIPTION YCBUF inst(Z,A); VHDL DESCRIPTION inst:YCBUF port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.11 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 236.1 Rev.1.01.10 2 - 867 TC200G SERIES DATA SHEET YCBUF YCBUF 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0144 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.18 0.22 0.24 0.27 0.30 0.33 0.36 0.39 0.50 0.53 0.56 30.00 0.33 0.41 0.51 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0124 0.12 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.31 0.39 0.55 5.00 0.33 0.36 0.43 0.60 FUNCTION FALL 10.00 0.37 0.40 0.48 0.65 30.00 0.54 0.57 0.65 0.82 Rev.1.01.10 2 - 868 TC200G SERIES DATA SHEET YCBUFP CELL NAME YCBUFP FUNCTION CLOCK BUFFER 7 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YCBUFP CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A YCBUFP Z Verilog-HDL DESCRIPTION YCBUFP inst(Z,A); VHDL DESCRIPTION inst:YCBUFP port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 2.06 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 489.7 Rev.1.01.10 2 - 869 TC200G SERIES DATA SHEET YCBUFP YCBUFP 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0072 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.15 0.17 0.22 0.23 0.25 0.30 0.31 0.33 0.43 0.45 0.47 30.00 0.23 0.31 0.39 0.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0061 0.12 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.26 0.29 0.37 0.55 5.00 0.29 0.32 0.40 0.58 FUNCTION FALL 10.00 0.31 0.34 0.42 0.60 30.00 0.40 0.44 0.51 0.69 Rev.1.01.10 2 - 870 TC200G SERIES DATA SHEET YCOR2 CELL NAME YCOR2 FUNCTION CLOCK BUFFER with 2-INPUT OR 4 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 YCOR2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L H H H A B YCOR2 Z Verilog-HDL DESCRIPTION YCOR2 inst(Z,A,B); VHDL DESCRIPTION inst:YCOR2 port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A,B (LU) LOAD 0.98 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 233.5 Rev.1.01.10 2 - 871 TC200G SERIES DATA SHEET YCOR2 YCOR2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0145 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.17 0.21 0.23 0.26 0.29 0.31 0.34 0.37 0.40 0.44 0.47 30.00 0.32 0.40 0.49 0.59 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0118 0.22 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.50 0.51 0.59 0.86 5.00 0.54 0.56 0.64 0.91 FUNCTION FALL 10.00 0.60 0.61 0.69 0.96 30.00 0.78 0.79 0.87 1.14 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0145 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.18 0.21 0.23 0.26 0.29 0.32 0.35 0.38 0.44 0.47 0.51 30.00 0.32 0.41 0.50 0.63 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0118 0.22 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.56 0.61 0.50 0.55 0.61 0.55 0.60 0.65 0.72 0.77 0.82 30.00 0.79 0.78 0.82 1.00 Rev.1.01.10 2 - 872 TC200G SERIES DATA SHEET YCOR2P CELL NAME YCOR2P FUNCTION CLOCK BUFFER with 2-INPUT OR 8 LOGIC SYMBOL TRUTH TABLE INPUT A L L H H 0 YCOR2P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. B L H L H OUTPUT Z L H H H A B YCOR2P Z Verilog-HDL DESCRIPTION YCOR2P inst(Z,A,B); VHDL DESCRIPTION inst:YCOR2P port map(Z,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 1.97 2.05 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 449.5 Rev.1.01.10 2 - 873 TC200G SERIES DATA SHEET YCOR2P YCOR2P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0071 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.15 0.17 0.22 0.24 0.26 0.30 0.32 0.33 0.39 0.40 0.42 30.00 0.23 0.32 0.40 0.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 0.23 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.52 0.53 0.61 0.89 5.00 0.54 0.56 0.64 0.91 FUNCTION FALL 10.00 0.58 0.59 0.67 0.95 30.00 0.68 0.69 0.77 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0071 0.08 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.16 0.18 0.23 0.25 0.26 0.32 0.33 0.35 0.43 0.45 0.47 30.00 0.24 0.33 0.41 0.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 0.23 PATH CONDITION PATH CONDITION B->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.56 0.59 0.53 0.56 0.59 0.57 0.60 0.63 0.75 0.78 0.81 30.00 0.70 0.69 0.73 0.92 Rev.1.01.10 2 - 874 TC200G SERIES DATA SHEET YD24GH CELL NAME YD24GH FUNCTION 2 TO 4 DECODER ( GATED OUTPUTS ACTIVE HIGH ) TRUTH TABLE INPUT GN A H X L L L H L L L H YD24GH CELL COUNT GATE 7 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL YD24GH AA BB Z0 Z0 Z1 Z1 Z2 Z2 Z3 Z3 GN GN B X L L H H Z0 L H L L L OUTPUT Z1 Z2 L L L L H L L H L L Z3 L L L L H Verilog-HDL DESCRIPTION YD24GH inst(Z0,Z1,Z2,Z3,A,B,GN); VHDL DESCRIPTION inst:YD24GH port map(Z0,Z1,Z2,Z3,A,B,GN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B GN (LU) LOAD 3.44 3.46 4.21 OUTPUT DRIVE PIN NAME Z0 DRIVE 17.1 Z1 15.8 Z2 15.2 (LU) Z3 16.7 Rev.1.01.10 2 - 875 TC200G SERIES DATA SHEET YD24GH YD24GH 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.2629 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.70 1.17 0.31 0.69 1.16 0.35 0.72 1.18 0.54 0.91 1.35 30.00 3.02 3.02 3.02 3.13 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0412 0.10 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.15 0.18 0.17 5.00 0.18 0.26 0.35 0.44 FUNCTION FALL 10.00 0.30 0.39 0.50 0.68 30.00 0.78 0.87 1.01 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.2874 0.45 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.84 1.35 0.49 0.91 1.41 0.54 0.96 1.47 0.64 1.05 1.55 30.00 3.36 3.43 3.48 3.57 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0415 0.14 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.37 0.50 0.29 0.41 0.54 0.35 0.48 0.61 0.50 0.63 0.77 30.00 0.99 1.03 1.10 1.26 Rev.1.01.10 2 - 876 TC200G SERIES DATA SHEET YD24GH YD24GH 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.2971 0.47 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.78 1.30 0.34 0.76 1.29 0.39 0.79 1.30 0.60 1.00 1.49 30.00 3.38 3.37 3.37 3.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0419 0.11 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.08 0.15 0.18 0.16 5.00 0.18 0.26 0.35 0.43 FUNCTION FALL 10.00 0.30 0.39 0.50 0.67 30.00 0.78 0.87 1.01 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.2971 0.46 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.87 1.39 0.50 0.93 1.46 0.56 0.99 1.51 0.65 1.08 1.60 30.00 3.47 3.54 3.60 3.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0419 0.10 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.37 0.50 0.29 0.41 0.53 0.35 0.47 0.60 0.50 0.63 0.76 30.00 0.99 1.02 1.10 1.26 Rev.1.01.10 2 - 877 TC200G SERIES DATA SHEET YD24GH YD24GH 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.2629 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.65 1.11 0.28 0.65 1.12 0.36 0.72 1.17 0.60 0.98 1.43 30.00 2.97 2.97 3.01 3.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0412 0.10 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.07 0.14 0.16 0.13 5.00 0.17 0.25 0.33 0.41 FUNCTION FALL 10.00 0.29 0.38 0.49 0.66 30.00 0.77 0.86 1.00 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.2874 0.45 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.70 1.21 0.30 0.70 1.21 0.39 0.78 1.26 0.63 1.04 1.53 30.00 3.21 3.22 3.25 3.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0415 0.14 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.17 0.29 0.14 0.25 0.38 0.16 0.33 0.49 0.13 0.41 0.66 30.00 0.77 0.86 1.00 1.35 Rev.1.01.10 2 - 878 TC200G SERIES DATA SHEET YD24GH YD24GH 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.2971 0.47 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.79 1.32 0.43 0.86 1.38 0.49 0.91 1.44 0.59 1.01 1.53 30.00 3.40 3.47 3.52 3.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0419 0.11 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.23 0.27 0.33 0.47 5.00 0.35 0.38 0.45 0.60 FUNCTION FALL 10.00 0.48 0.51 0.58 0.73 30.00 0.97 1.00 1.07 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.2971 0.46 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.79 1.32 0.43 0.86 1.38 0.49 0.91 1.43 0.59 1.01 1.53 30.00 3.40 3.47 3.52 3.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0419 0.10 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.35 0.48 0.27 0.38 0.51 0.33 0.45 0.58 0.47 0.60 0.73 30.00 0.97 1.00 1.07 1.23 Rev.1.01.10 2 - 879 TC200G SERIES DATA SHEET YD24GH YD24GH 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.2629 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.74 1.20 0.33 0.72 1.19 0.34 0.70 1.16 0.45 0.81 1.23 30.00 3.05 3.05 3.01 2.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0412 0.10 PATH CONDITION PATH CONDITION GN->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.15 0.19 0.20 5.00 0.19 0.27 0.36 0.46 FUNCTION FALL 10.00 0.31 0.40 0.51 0.70 30.00 0.79 0.88 1.02 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.2874 0.45 PATH CONDITION PATH CONDITION GN->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.40 0.80 1.31 0.36 0.78 1.29 0.36 0.76 1.25 0.49 0.87 1.32 30.00 3.32 3.31 3.26 3.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0415 0.14 PATH CONDITION PATH CONDITION GN->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.19 0.31 0.15 0.27 0.40 0.19 0.36 0.51 0.20 0.46 0.69 30.00 0.79 0.88 1.02 1.37 Rev.1.01.10 2 - 880 TC200G SERIES DATA SHEET YD24GH YD24GH 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.2971 0.47 PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.84 1.36 0.38 0.81 1.34 0.38 0.79 1.31 0.51 0.90 1.38 30.00 3.44 3.43 3.38 3.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0419 0.11 PATH CONDITION PATH CONDITION GN->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.09 0.15 0.19 0.19 5.00 0.19 0.27 0.36 0.46 FUNCTION FALL 10.00 0.31 0.40 0.51 0.69 30.00 0.79 0.88 1.02 1.37 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.2971 0.46 PATH CONDITION PATH CONDITION GN->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.83 1.35 0.38 0.81 1.33 0.37 0.79 1.30 0.51 0.90 1.37 30.00 3.43 3.42 3.38 3.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0419 0.10 PATH CONDITION PATH CONDITION GN->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.19 0.31 0.15 0.27 0.40 0.19 0.36 0.51 0.19 0.46 0.69 30.00 0.79 0.88 1.02 1.36 Rev.1.01.10 2 - 881 TC200G SERIES DATA SHEET YD24GHP CELL NAME YD24GHP FUNCTION 2 TO 4 DECODER ( GATED OUTPUTS ACTIVE HIGH ) TRUTH TABLE INPUT GN A H X L L L H L L L H YD24GHP CELL COUNT GATE 13 I/O 0 1/7 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL YD24GHP AA BB Z0 Z0 Z1 Z1 Z2 Z2 Z3 Z3 GN GN B X L L H H Z0 L H L L L OUTPUT Z1 Z2 L L L L H L L H L L Z3 L L L L H Verilog-HDL DESCRIPTION YD24GHP inst(Z0,Z1,Z2,Z3,A,B,GN); VHDL DESCRIPTION inst:YD24GHP port map(Z0,Z1,Z2,Z3,A,B,GN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B GN (LU) LOAD 5.79 5.57 8.76 OUTPUT DRIVE PIN NAME Z0 DRIVE 30.7 Z1 30.3 Z2 30.2 (LU) Z3 32.4 Rev.1.01.10 2 - 882 TC200G SERIES DATA SHEET YD24GHP YD24GHP 2/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1454 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.51 0.76 0.28 0.49 0.74 0.31 0.51 0.76 0.48 0.69 0.93 30.00 1.76 1.75 1.74 1.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0218 0.12 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.14 0.10 5.00 0.11 0.18 0.24 0.26 FUNCTION FALL 10.00 0.17 0.25 0.33 0.41 30.00 0.39 0.48 0.60 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1475 0.41 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.41 0.62 0.88 0.49 0.70 0.96 0.57 0.78 1.04 0.71 0.92 1.17 30.00 1.91 1.99 2.06 2.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0218 0.12 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.39 0.46 0.34 0.42 0.49 0.42 0.49 0.57 0.59 0.67 0.75 30.00 0.72 0.75 0.82 1.02 Rev.1.01.10 2 - 883 TC200G SERIES DATA SHEET YD24GHP YD24GHP 3/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1505 0.41 PATH DELAY (ns) 1.00 5.00 10.00 0.31 0.52 0.77 0.29 0.50 0.75 0.32 0.52 0.77 0.50 0.71 0.95 30.00 1.80 1.79 1.79 1.92 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0231 0.15 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.14 0.10 5.00 0.11 0.18 0.24 0.26 FUNCTION FALL 10.00 0.17 0.25 0.33 0.41 30.00 0.39 0.48 0.60 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.1501 0.43 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.42 0.64 0.90 0.50 0.71 0.98 0.57 0.79 1.06 0.72 0.93 1.19 30.00 1.94 2.02 2.10 2.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0241 0.15 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.40 0.48 0.35 0.43 0.51 0.43 0.50 0.58 0.59 0.68 0.77 30.00 0.75 0.78 0.86 1.05 Rev.1.01.10 2 - 884 TC200G SERIES DATA SHEET YD24GHP YD24GHP 4/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1454 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.44 0.69 0.24 0.44 0.69 0.32 0.52 0.76 0.54 0.77 1.02 30.00 1.69 1.70 1.74 1.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0218 0.12 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.14 0.09 5.00 0.12 0.19 0.25 0.28 FUNCTION FALL 10.00 0.18 0.27 0.36 0.45 30.00 0.45 0.54 0.67 0.93 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1475 0.41 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.44 0.70 0.24 0.44 0.70 0.32 0.52 0.77 0.55 0.78 1.03 30.00 1.71 1.72 1.76 2.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0218 0.12 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.12 0.18 0.12 0.19 0.27 0.14 0.25 0.36 0.09 0.27 0.45 30.00 0.45 0.54 0.67 0.93 Rev.1.01.10 2 - 885 TC200G SERIES DATA SHEET YD24GHP YD24GHP 5/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1505 0.41 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.56 0.82 0.42 0.63 0.90 0.51 0.72 0.98 0.66 0.86 1.12 30.00 1.86 1.94 2.02 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0231 0.15 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.32 0.39 0.55 5.00 0.37 0.40 0.47 0.64 FUNCTION FALL 10.00 0.46 0.49 0.56 0.74 30.00 0.75 0.78 0.86 1.04 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.1501 0.43 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.56 0.82 0.42 0.64 0.90 0.51 0.72 0.98 0.66 0.86 1.12 30.00 1.86 1.94 2.02 2.15 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0241 0.15 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.38 0.46 0.32 0.41 0.49 0.40 0.48 0.57 0.56 0.65 0.74 30.00 0.77 0.80 0.87 1.06 Rev.1.01.10 2 - 886 TC200G SERIES DATA SHEET YD24GHP YD24GHP 6/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1454 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.32 0.53 0.78 0.29 0.50 0.75 0.30 0.49 0.74 0.43 0.62 0.86 30.00 1.78 1.76 1.73 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0218 0.12 PATH CONDITION PATH CONDITION GN->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.15 0.12 5.00 0.11 0.19 0.24 0.28 FUNCTION FALL 10.00 0.17 0.25 0.34 0.43 30.00 0.40 0.49 0.61 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1475 0.41 PATH CONDITION PATH CONDITION GN->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.33 0.54 0.79 0.30 0.51 0.76 0.30 0.50 0.75 0.44 0.64 0.87 30.00 1.81 1.79 1.75 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0218 0.12 PATH CONDITION PATH CONDITION GN->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.11 0.17 0.12 0.18 0.25 0.14 0.24 0.33 0.12 0.28 0.42 30.00 0.39 0.48 0.60 0.84 Rev.1.01.10 2 - 887 TC200G SERIES DATA SHEET YD24GHP YD24GHP 7/7 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION GN->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1505 0.41 PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.55 0.81 0.31 0.52 0.79 0.31 0.51 0.77 0.45 0.65 0.89 30.00 1.85 1.83 1.79 1.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0231 0.15 PATH CONDITION PATH CONDITION GN->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.15 0.12 5.00 0.11 0.19 0.25 0.28 FUNCTION FALL 10.00 0.17 0.25 0.34 0.43 30.00 0.40 0.49 0.61 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.1501 0.43 PATH CONDITION PATH CONDITION GN->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.56 0.81 0.31 0.52 0.79 0.31 0.51 0.77 0.44 0.64 0.88 30.00 1.85 1.83 1.80 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0241 0.15 PATH CONDITION PATH CONDITION GN->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.07 0.12 0.19 0.13 0.20 0.27 0.16 0.26 0.35 0.14 0.30 0.45 30.00 0.43 0.52 0.64 0.89 Rev.1.01.10 2 - 888 TC200G SERIES DATA SHEET YD24H CELL NAME YD24H FUNCTION 2 TO 4 DECODER ( OUTPUTS ACTIVE HIGH ) TRUTH TABLE INPUT A B L L H L L H H H YD24H CELL COUNT GATE 5 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL YD24H AA BB Z0 Z0 Z1 Z1 Z2 Z2 Z3 Z3 Z0 H L L L OUTPUT Z1 Z2 L L H L L H L L Z3 L L L H Verilog-HDL DESCRIPTION YD24H inst(Z0,Z1,Z2,Z3,A,B); VHDL DESCRIPTION inst:YD24H port map(Z0,Z1,Z2,Z3,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 3.19 3.22 OUTPUT DRIVE PIN NAME Z0 DRIVE 24.8 Z1 25.7 Z2 25.5 (LU) Z3 27.1 Rev.1.01.10 2 - 889 TC200G SERIES DATA SHEET YD24H YD24H 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1783 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.43 0.74 0.18 0.43 0.74 0.21 0.45 0.76 0.31 0.57 0.88 30.00 1.98 1.98 1.98 2.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0411 0.09 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.07 0.13 0.16 0.18 5.00 0.17 0.25 0.33 0.45 FUNCTION FALL 10.00 0.29 0.37 0.49 0.68 30.00 0.77 0.86 1.00 1.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1784 0.17 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.51 0.82 0.32 0.58 0.89 0.38 0.63 0.95 0.48 0.72 1.03 30.00 2.06 2.13 2.19 2.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0334 0.11 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.33 0.44 0.26 0.36 0.47 0.32 0.43 0.54 0.46 0.58 0.70 30.00 0.85 0.88 0.95 1.12 Rev.1.01.10 2 - 890 TC200G SERIES DATA SHEET YD24H YD24H 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1784 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.43 0.74 0.18 0.43 0.73 0.21 0.45 0.76 0.32 0.59 0.89 30.00 1.97 1.97 1.98 2.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0338 0.08 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.15 0.15 5.00 0.14 0.22 0.30 0.40 FUNCTION FALL 10.00 0.25 0.33 0.45 0.63 30.00 0.66 0.75 0.89 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.1784 0.17 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.52 0.83 0.33 0.58 0.90 0.38 0.64 0.95 0.48 0.73 1.04 30.00 2.07 2.14 2.19 2.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0420 0.08 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.36 0.49 0.27 0.39 0.52 0.34 0.46 0.59 0.48 0.61 0.75 30.00 0.98 1.01 1.08 1.25 Rev.1.01.10 2 - 891 TC200G SERIES DATA SHEET YD24H YD24H 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.1783 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.41 0.72 0.18 0.43 0.74 0.24 0.49 0.80 0.40 0.70 1.02 30.00 1.96 1.97 2.02 2.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0411 0.09 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.12 0.14 0.13 5.00 0.16 0.24 0.32 0.41 FUNCTION FALL 10.00 0.28 0.36 0.48 0.66 30.00 0.76 0.85 0.99 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.1784 0.17 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.16 0.41 0.72 0.18 0.42 0.73 0.25 0.50 0.80 0.42 0.72 1.04 30.00 1.96 1.97 2.02 2.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0334 0.11 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.05 0.13 0.23 0.11 0.21 0.32 0.12 0.29 0.43 0.09 0.36 0.59 30.00 0.63 0.72 0.86 1.21 Rev.1.01.10 2 - 892 TC200G SERIES DATA SHEET YD24H YD24H 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.1784 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.48 0.79 0.30 0.55 0.86 0.35 0.61 0.92 0.45 0.70 1.01 30.00 2.03 2.10 2.16 2.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0338 0.08 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.23 0.29 0.43 5.00 0.30 0.34 0.40 0.55 FUNCTION FALL 10.00 0.41 0.45 0.51 0.66 30.00 0.82 0.85 0.92 1.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.1784 0.17 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.49 0.80 0.30 0.55 0.87 0.36 0.61 0.92 0.45 0.70 1.01 30.00 2.04 2.10 2.16 2.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0420 0.08 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.33 0.46 0.25 0.36 0.49 0.31 0.43 0.56 0.44 0.58 0.71 30.00 0.95 0.98 1.05 1.21 Rev.1.01.10 2 - 893 TC200G SERIES DATA SHEET YD24HP CELL NAME YD24HP FUNCTION 2 TO 4 DECODER ( OUTPUTS ACTIVE HIGH ) TRUTH TABLE INPUT A B L L H L L H H H YD24HP CELL COUNT GATE 9 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL YD24HP AA BB Z0 Z0 Z1 Z1 Z2 Z2 Z3 Z3 Z0 H L L L OUTPUT Z1 Z2 L L H L L H L L Z3 L L L H Verilog-HDL DESCRIPTION YD24HP inst(Z0,Z1,Z2,Z3,A,B); VHDL DESCRIPTION inst:YD24HP port map(Z0,Z1,Z2,Z3,A,B); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z0,Z1,Z2,Z3 6880.0 (LU*MHz) INPUT LOAD PIN NAME A B (LU) LOAD 5.35 5.40 OUTPUT DRIVE PIN NAME Z0,Z2 DRIVE 48.8 Z1 51.6 (LU) Z3 54.3 Rev.1.01.10 2 - 894 TC200G SERIES DATA SHEET YD24HP YD24HP 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0889 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.15 0.27 0.42 0.20 0.34 0.49 0.36 0.52 0.70 30.00 1.03 1.04 1.10 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0193 0.10 PATH CONDITION PATH CONDITION A->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.05 0.10 0.11 0.07 5.00 0.10 0.17 0.22 0.25 FUNCTION FALL 10.00 0.16 0.24 0.32 0.41 30.00 0.40 0.49 0.61 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0834 0.17 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.36 0.51 0.32 0.44 0.59 0.40 0.52 0.67 0.55 0.67 0.82 30.00 1.10 1.18 1.26 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0208 0.12 PATH CONDITION PATH CONDITION A->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.34 0.42 0.30 0.37 0.45 0.37 0.45 0.53 0.53 0.62 0.70 30.00 0.69 0.72 0.80 0.98 Rev.1.01.10 2 - 895 TC200G SERIES DATA SHEET YD24HP YD24HP 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0889 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.15 0.27 0.42 0.20 0.34 0.49 0.36 0.52 0.70 30.00 1.03 1.04 1.10 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0202 0.17 PATH CONDITION PATH CONDITION A->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.05 0.10 0.11 0.07 5.00 0.10 0.17 0.22 0.25 FUNCTION FALL 10.00 0.16 0.24 0.32 0.41 30.00 0.40 0.49 0.61 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0890 0.18 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.53 0.32 0.45 0.61 0.41 0.54 0.69 0.55 0.68 0.84 30.00 1.15 1.23 1.32 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0207 0.12 PATH CONDITION PATH CONDITION A->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.27 0.35 0.42 0.30 0.37 0.45 0.37 0.45 0.53 0.53 0.62 0.70 30.00 0.69 0.72 0.80 0.98 Rev.1.01.10 2 - 896 TC200G SERIES DATA SHEET YD24HP YD24HP 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z0 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0889 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.28 0.44 0.14 0.27 0.43 0.18 0.30 0.45 0.27 0.41 0.58 30.00 1.05 1.05 1.06 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z0 0.0193 0.10 PATH CONDITION PATH CONDITION B->Z0 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.06 0.11 0.14 0.14 5.00 0.11 0.18 0.24 0.30 FUNCTION FALL 10.00 0.17 0.25 0.33 0.45 30.00 0.41 0.50 0.62 0.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0834 0.17 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.27 0.41 0.14 0.26 0.41 0.17 0.29 0.43 0.25 0.39 0.55 30.00 0.99 0.99 1.00 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0208 0.12 PATH CONDITION PATH CONDITION B->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.06 0.11 0.17 0.11 0.18 0.25 0.14 0.24 0.33 0.15 0.30 0.45 30.00 0.41 0.50 0.62 0.88 Rev.1.01.10 2 - 897 TC200G SERIES DATA SHEET YD24HP YD24HP 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0889 0.17 PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.39 0.55 0.34 0.47 0.63 0.42 0.55 0.71 0.57 0.69 0.85 30.00 1.17 1.25 1.33 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0202 0.17 PATH CONDITION PATH CONDITION B->Z2 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.30 0.33 0.40 0.57 5.00 0.38 0.40 0.48 0.65 FUNCTION FALL 10.00 0.46 0.48 0.56 0.74 30.00 0.73 0.76 0.83 1.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0890 0.18 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.26 0.39 0.56 0.34 0.48 0.64 0.42 0.55 0.71 0.57 0.69 0.85 30.00 1.18 1.26 1.34 1.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0207 0.12 PATH CONDITION PATH CONDITION B->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.30 0.38 0.46 0.33 0.41 0.49 0.40 0.48 0.56 0.57 0.65 0.74 30.00 0.73 0.76 0.83 1.02 Rev.1.01.10 2 - 898 TC200G SERIES DATA SHEET YDLY1 CELL NAME YDLY1 FUNCTION DELAY BUFFER 4 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YDLY1 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H YDLY1 AA ZZ Verilog-HDL DESCRIPTION YDLY1 inst(Z,A); VHDL DESCRIPTION inst:YDLY1 port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.94 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 78.6 Rev.1.01.10 2 - 899 TC200G SERIES DATA SHEET YDLY1 YDLY1 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0436 0.08 PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.64 0.72 0.66 0.74 0.82 0.76 0.83 0.91 0.92 0.99 1.07 30.00 1.03 1.13 1.22 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0335 0.11 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.74 0.76 0.84 1.03 5.00 0.84 0.87 0.95 1.14 FUNCTION FALL 10.00 0.96 0.98 1.06 1.25 30.00 1.37 1.39 1.47 1.66 Rev.1.01.10 2 - 900 TC200G SERIES DATA SHEET YDLY1P CELL NAME YDLY1P FUNCTION DELAY BUFFER 5 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YDLY1P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H YDLY1P AA Z Z Verilog-HDL DESCRIPTION YDLY1P inst(Z,A); VHDL DESCRIPTION inst:YDLY1P port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.94 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 150.9 Rev.1.01.10 2 - 901 TC200G SERIES DATA SHEET YDLY1P YDLY1P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0216 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.61 0.66 0.71 0.71 0.75 0.80 0.80 0.84 0.89 0.96 1.01 1.05 30.00 0.87 0.97 1.06 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0182 0.16 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.84 0.86 0.94 1.13 5.00 0.91 0.93 1.01 1.20 FUNCTION FALL 10.00 0.98 1.00 1.08 1.27 30.00 1.22 1.25 1.33 1.52 Rev.1.01.10 2 - 902 TC200G SERIES DATA SHEET YDLY2 CELL NAME YDLY2 FUNCTION DELAY BUFFER 8 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YDLY2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT B L H YDLY2 AA ZZ Verilog-HDL DESCRIPTION YDLY2 inst(Z,A); VHDL DESCRIPTION inst:YDLY2 port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.94 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 78.6 Rev.1.01.10 2 - 903 TC200G SERIES DATA SHEET YDLY2 YDLY2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0436 0.08 PATH DELAY (ns) 1.00 5.00 10.00 1.43 1.51 1.59 1.53 1.60 1.68 1.62 1.69 1.77 1.78 1.85 1.94 30.00 1.90 1.99 2.08 2.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0335 0.11 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.60 1.63 1.71 1.90 5.00 1.71 1.73 1.81 2.00 FUNCTION FALL 10.00 1.82 1.85 1.93 2.12 30.00 2.24 2.26 2.34 2.53 Rev.1.01.10 2 - 904 TC200G SERIES DATA SHEET YDLY2P CELL NAME YDLY2P FUNCTION DELAY BUFFER 9 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YDLY2P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT B L H YDLY2P AA Z Z Verilog-HDL DESCRIPTION YDLY2P inst(Z,A); VHDL DESCRIPTION inst:YDLY2P port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.94 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 150.9 Rev.1.01.10 2 - 905 TC200G SERIES DATA SHEET YDLY2P YDLY2P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0216 0.10 PATH DELAY (ns) 1.00 5.00 10.00 1.48 1.52 1.57 1.57 1.61 1.66 1.66 1.71 1.76 1.83 1.87 1.92 30.00 1.74 1.83 1.92 2.08 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0181 0.16 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 1.71 1.73 1.81 2.00 5.00 1.77 1.80 1.88 2.07 FUNCTION FALL 10.00 1.84 1.87 1.95 2.14 30.00 2.09 2.11 2.19 2.38 Rev.1.01.10 2 - 906 TC200G SERIES DATA SHEET YDLY3 CELL NAME YDLY3 FUNCTION DELAY BUFFER 16 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YDLY3 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H YDLY3 AA ZZ Verilog-HDL DESCRIPTION YDLY3 inst(Z,A); VHDL DESCRIPTION inst:YDLY3 port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.94 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 78.6 Rev.1.01.10 2 - 907 TC200G SERIES DATA SHEET YDLY3 YDLY3 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0436 0.08 PATH DELAY (ns) 1.00 5.00 10.00 3.16 3.23 3.31 3.25 3.32 3.41 3.34 3.42 3.50 3.51 3.58 3.66 30.00 3.62 3.72 3.81 3.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0335 0.11 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 3.33 3.36 3.44 3.63 5.00 3.44 3.46 3.54 3.73 FUNCTION FALL 10.00 3.55 3.58 3.66 3.85 30.00 3.97 3.99 4.07 4.26 Rev.1.01.10 2 - 908 TC200G SERIES DATA SHEET YDLY3P CELL NAME YDLY3P FUNCTION DELAY BUFFER 17 LOGIC SYMBOL TRUTH TABLE INPUT A L H 0 YDLY3P CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H YDLY3P AA Z Z Verilog-HDL DESCRIPTION YDLY3P inst(Z,A); VHDL DESCRIPTION inst:YDLY3P port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12880.0 (LU*MHz) INPUT LOAD PIN NAME A (LU) LOAD 1.94 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 150.8 Rev.1.01.10 2 - 909 TC200G SERIES DATA SHEET YDLY3P YDLY3P 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A->Z --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0216 0.10 PATH DELAY (ns) 1.00 5.00 10.00 3.20 3.25 3.29 3.30 3.34 3.39 3.39 3.43 3.48 3.55 3.60 3.64 30.00 3.46 3.56 3.65 3.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0182 0.16 PATH CONDITION PATH CONDITION A->Z --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 3.44 3.46 3.54 3.73 5.00 3.50 3.53 3.61 3.80 FUNCTION FALL 10.00 3.58 3.60 3.68 3.87 30.00 3.82 3.85 3.93 4.12 Rev.1.01.10 2 - 910 TC200G SERIES DATA SHEET YFD1 CELL NAME YFD1 FUNCTION D-TYPE FLIP FLOP 5 LOGIC SYMBOL TRUTH TABLE INPUT D CP L Up H Up X Dn YFD1 DD CP CK QQ QN QN YFD1 CELL COUNT GATE I/O 0 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. Qn+1 L H Qn OUTPUT QNn+1 H L QNn Verilog-HDL DESCRIPTION YFD1 inst(Q,QN,D,CP); VHDL DESCRIPTION inst:YFD1 port map(Q,QN,D,CP); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D CP (LU) LOAD 3.36 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 40.5 QN 39.0 Rev.1.01.10 2 - 911 TC200G SERIES DATA SHEET YFD1 YFD1 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1006 0.25 PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.60 0.78 0.54 0.68 0.86 0.61 0.76 0.94 0.75 0.90 1.07 30.00 1.47 1.55 1.63 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0436 0.16 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.39 0.47 0.55 0.70 5.00 0.52 0.60 0.68 0.83 FUNCTION FALL 10.00 0.66 0.74 0.82 0.97 30.00 1.18 1.26 1.34 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0974 0.39 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.39 0.58 0.31 0.47 0.65 0.46 0.66 0.86 30.00 1.25 1.28 1.35 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0397 0.22 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.25 0.37 0.24 0.35 0.47 0.34 0.48 0.62 0.55 0.76 0.97 30.00 0.85 0.95 1.12 1.60 Rev.1.01.10 2 - 912 TC200G SERIES DATA SHEET YFD1 YFD1 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.166 0.129 0.38 0.207 0.172 1.00 0.277 0.244 3.00 0.501 0.478 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.067 0.113 0.190 0.439 3.00 -0.133 -0.078 0.014 0.312 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.414 0.436 0.38 0.386 0.408 1.00 0.339 0.361 3.00 0.188 0.210 1.00 0.472 0.444 0.398 0.248 3.00 0.589 0.562 0.516 0.370 CONDITION --WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.492 0.529 0.38 0.450 0.486 1.00 0.381 0.413 3.00 0.157 0.180 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.242 0.220 0.38 0.270 0.249 1.00 0.317 0.295 3.00 0.469 0.447 1.00 0.184 0.212 0.259 0.409 3.00 0.068 0.095 0.141 0.288 1.00 0.591 0.545 0.468 0.220 3.00 0.792 0.737 0.644 0.346 Rev.1.01.10 2 - 913 TC200G SERIES DATA SHEET YFD1 YFD1 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION D WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION ~D WAVE_FORM D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 Rev.1.01.10 2 - 914 TC200G SERIES DATA SHEET YFD2 CELL NAME YFD2 FUNCTION D-TYPE FLIP FLOP with CLEAR 6 LOGIC SYMBOL 0 YFD2 CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. YFD2 DD CP CK CL CD QQ QN QN TRUTH TABLE INPUT OUTPUT CD D CP Qn+1 QNn+1 L X X* L H H L Up L H H H Up H L H X Dn Qn QNn *:Consider the HOLD Time of CLEAR Verilog-HDL DESCRIPTION YFD2 inst(Q,QN,D,CP,CD); VHDL DESCRIPTION inst:YFD2 port map(Q,QN,D,CP,CD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D CP CD (LU) LOAD 3.34 0.99 2.21 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 45.5 QN 35.5 Rev.1.01.10 2 - 915 TC200G SERIES DATA SHEET YFD2 YFD2 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0431 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.15 0.26 0.38 0.21 0.32 0.45 0.26 0.42 0.57 0.34 0.57 0.79 30.00 0.87 0.94 1.09 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0845 0.40 PATH CONDITION PATH CONDITION CD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.22 0.26 0.33 5.00 0.32 0.35 0.40 0.50 FUNCTION RISE 10.00 0.47 0.50 0.55 0.68 30.00 1.06 1.09 1.14 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0853 0.25 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.60 0.76 0.54 0.68 0.84 0.62 0.76 0.92 0.77 0.91 1.07 30.00 1.36 1.44 1.52 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0431 0.16 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.39 0.51 0.65 0.47 0.59 0.73 0.55 0.67 0.81 0.70 0.83 0.96 30.00 1.16 1.24 1.32 1.47 Rev.1.01.10 2 - 916 TC200G SERIES DATA SHEET YFD2 YFD2 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0845 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.32 0.47 0.22 0.35 0.50 0.26 0.40 0.55 0.33 0.50 0.68 30.00 1.06 1.09 1.14 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0652 0.33 PATH CONDITION PATH CONDITION Q->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.23 0.28 0.35 0.49 5.00 0.38 0.44 0.52 0.70 FUNCTION FALL 10.00 0.57 0.62 0.71 0.93 30.00 1.31 1.37 1.46 1.74 Rev.1.01.10 2 - 917 TC200G SERIES DATA SHEET YFD2 YFD2 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.090 0.053 0.38 0.143 0.106 1.00 0.230 0.194 3.00 0.512 0.478 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.010 0.043 0.133 0.421 3.00 -0.213 -0.157 -0.064 0.237 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.564 0.602 0.38 0.512 0.550 1.00 0.425 0.461 3.00 0.143 0.177 CONDITION D WAVE_FORM 1.00 0.666 0.612 0.523 0.234 3.00 0.870 0.814 0.721 0.418 Rev.1.01.10 2 - 918 TC200G SERIES DATA SHEET YFD2 YFD2 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.185 0.147 0.38 0.234 0.198 1.00 0.317 0.282 3.00 0.583 0.555 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.084 0.136 0.225 0.509 3.00 -0.121 -0.061 0.039 0.360 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.402 0.426 0.38 0.375 0.400 1.00 0.330 0.354 3.00 0.184 0.209 1.00 0.468 0.441 0.396 0.250 3.00 0.602 0.575 0.529 0.384 CONDITION CD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.471 0.508 0.38 0.421 0.458 1.00 0.339 0.373 3.00 0.073 0.101 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.255 0.230 0.38 0.282 0.257 1.00 0.327 0.302 3.00 0.471 0.447 1.00 0.189 0.216 0.261 0.405 3.00 0.056 0.083 0.128 0.273 1.00 0.571 0.519 0.431 0.147 3.00 0.775 0.715 0.616 0.295 Rev.1.01.10 2 - 919 TC200G SERIES DATA SHEET YFD2 YFD2 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&~D WAVE_FORM D tw(H) CP NEGLIMIT tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&D WAVE_FORM 0.01 to 3.00 0.690 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 Rev.1.01.10 2 - 920 TC200G SERIES DATA SHEET YFD3 CELL NAME YFD3 FUNCTION D-TYPE FLIP FLOP with CLEAR and PRESET YFD3 CELL COUNT GATE 7 I/O 0 1/9 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL PR DD SD YFD3 QQ TRUTH TABLE INPUT CD SD D CP L H X X* H L X X* L L X X H H L Up H H H Up H H X Dn *:Consider the HOLD Time of CLEAR or PRESET OUTPUT Qn+1 QNn+1 L H H L H H L H H L Qn QNn CP CK CL QN QN CD Verilog-HDL DESCRIPTION YFD3 inst(Q,QN,D,CP,CD,SD); VHDL DESCRIPTION inst:YFD3 port map(Q,QN,D,CP,CD,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D CP CD SD (LU) LOAD 3.31 0.99 2.27 2.16 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 34.6 QN 36.5 Rev.1.01.10 2 - 921 TC200G SERIES DATA SHEET YFD3 YFD3 2/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0662 0.20 PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.27 0.46 0.19 0.35 0.54 0.26 0.46 0.66 0.39 0.67 0.94 30.00 1.20 1.28 1.42 1.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0985 0.35 PATH CONDITION PATH CONDITION SD->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.13 0.15 0.18 0.22 5.00 0.26 0.29 0.34 0.41 FUNCTION RISE 10.00 0.42 0.45 0.50 0.61 30.00 1.00 1.03 1.09 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0662 0.20 PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.35 0.54 0.25 0.41 0.60 0.30 0.48 0.68 0.38 0.63 0.88 30.00 1.29 1.34 1.44 1.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0845 0.35 PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.29 0.42 0.21 0.32 0.44 0.25 0.37 0.50 0.33 0.48 0.64 30.00 0.91 0.93 0.99 1.18 Rev.1.01.10 2 - 922 TC200G SERIES DATA SHEET YFD3 YFD3 3/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CD->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0599 0.32 PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.35 0.52 0.26 0.40 0.58 0.32 0.48 0.66 0.44 0.65 0.86 30.00 1.21 1.26 1.35 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0985 0.35 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.59 0.67 0.82 5.00 0.66 0.74 0.82 0.97 FUNCTION RISE 10.00 0.84 0.92 1.00 1.15 30.00 1.53 1.61 1.69 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0662 0.20 PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.44 0.61 0.81 0.52 0.69 0.88 0.61 0.77 0.97 0.76 0.93 1.12 30.00 1.56 1.63 1.72 1.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0845 0.35 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.30 0.45 0.20 0.33 0.48 0.24 0.38 0.54 0.29 0.47 0.66 30.00 1.04 1.07 1.13 1.31 Rev.1.01.10 2 - 923 TC200G SERIES DATA SHEET YFD3 YFD3 4/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0599 0.32 PATH DELAY (ns) 1.00 5.00 10.00 0.20 0.34 0.51 0.27 0.42 0.59 0.36 0.53 0.72 0.55 0.77 1.01 30.00 1.19 1.27 1.42 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0599 0.32 PATH CONDITION PATH CONDITION SD->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.20 0.27 0.36 0.55 5.00 0.34 0.42 0.53 0.77 FUNCTION FALL 10.00 0.51 0.59 0.72 1.01 30.00 1.19 1.27 1.42 1.81 Rev.1.01.10 2 - 924 TC200G SERIES DATA SHEET YFD3 YFD3 5/9 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA CD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH CD CP Q CONDITION SD&D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.080 0.041 0.38 0.130 0.092 1.00 0.215 0.178 3.00 0.489 0.455 TIMING CONDITION DATA CD ITEM HOLD CLOCK POSEDGE 1.00 -0.024 0.029 0.116 0.398 3.00 -0.232 -0.177 -0.084 0.214 CLOCK CP DATA CD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.577 0.616 0.38 0.527 0.564 1.00 0.441 0.478 3.00 0.167 0.201 CONDITION SD&D WAVE_FORM 1.00 0.680 0.627 0.540 0.258 3.00 0.886 0.831 0.739 0.442 Rev.1.01.10 2 - 925 TC200G SERIES DATA SHEET YFD3 YFD3 6/9 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION CD&SD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.179 0.141 0.38 0.227 0.190 1.00 0.307 0.272 3.00 0.565 0.537 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.076 0.128 0.214 0.491 3.00 -0.132 -0.073 0.025 0.343 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.395 0.421 0.38 0.367 0.393 1.00 0.319 0.345 3.00 0.167 0.192 1.00 0.465 0.436 0.389 0.235 3.00 0.606 0.577 0.528 0.372 CONDITION CD&SD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.478 0.516 0.38 0.430 0.467 1.00 0.350 0.384 3.00 0.091 0.118 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.259 0.233 0.38 0.288 0.262 1.00 0.336 0.310 3.00 0.489 0.464 1.00 0.190 0.218 0.266 0.422 3.00 0.048 0.078 0.127 0.285 1.00 0.580 0.529 0.442 0.164 3.00 0.787 0.728 0.630 0.313 Rev.1.01.10 2 - 926 TC200G SERIES DATA SHEET YFD3 YFD3 7/9 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION CD&~D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.080 -0.122 0.38 -0.074 -0.116 1.00 -0.064 -0.106 3.00 -0.032 -0.074 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 -0.192 -0.186 -0.176 -0.145 3.00 -0.419 -0.413 -0.404 -0.372 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.734 0.777 0.38 0.728 0.771 1.00 0.719 0.761 3.00 0.688 0.730 CONDITION CD&~D WAVE_FORM 1.00 0.849 0.843 0.833 0.801 3.00 1.081 1.075 1.064 1.028 Rev.1.01.10 2 - 927 TC200G SERIES DATA SHEET YFD3 YFD3 8/9 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CD ITEM NEGLIMIT CD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD&~D WAVE_FORM D tw(H) CP NEGLIMIT tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION CD&SD&D WAVE_FORM 0.01 to 3.00 0.690 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 Rev.1.01.10 2 - 928 TC200G SERIES DATA SHEET YFD3 YFD3 9/9 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT SD Q CONDITION --WAVE_FORM NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.690 Rev.1.01.10 2 - 929 TC200G SERIES DATA SHEET YFD4 CELL NAME YFD4 FUNCTION D-TYPE FLIP FLOP with PRESET 6 LOGIC SYMBOL 0 YFD4 CELL COUNT GATE I/O 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. DD SD YFD4 PR QQ TRUTH TABLE INPUT OUTPUT SD D CP Qn+1 QNn+1 L X X* H L H L Up L H H H Up H L H X Dn Qn QNn *:Consider the HOLD Time of PRESET CP CK QN QN Verilog-HDL DESCRIPTION YFD4 inst(Q,QN,D,CP,SD); VHDL DESCRIPTION inst:YFD4 port map(Q,QN,D,CP,SD); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D CP SD (LU) LOAD 3.36 0.99 2.17 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 35.6 QN 36.1 Rev.1.01.10 2 - 930 TC200G SERIES DATA SHEET YFD4 YFD4 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION CP->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0947 0.32 PATH DELAY (ns) 1.00 5.00 10.00 0.48 0.62 0.79 0.56 0.70 0.87 0.64 0.78 0.95 0.79 0.93 1.10 30.00 1.46 1.54 1.62 1.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0666 0.19 PATH CONDITION PATH CONDITION CP->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.44 0.52 0.60 0.76 5.00 0.60 0.68 0.77 0.92 FUNCTION FALL 10.00 0.80 0.88 0.96 1.12 30.00 1.55 1.63 1.72 1.88 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.1006 0.42 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.21 0.35 0.52 0.23 0.37 0.55 0.27 0.43 0.61 0.38 0.56 0.76 30.00 1.21 1.23 1.29 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0417 0.24 PATH CONDITION PATH CONDITION Q->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.24 0.36 0.21 0.32 0.45 0.29 0.43 0.57 0.40 0.60 0.81 30.00 0.84 0.93 1.08 1.45 Rev.1.01.10 2 - 931 TC200G SERIES DATA SHEET YFD4 YFD4 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION SD->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0947 0.32 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.25 0.40 0.15 0.28 0.42 0.18 0.33 0.48 0.21 0.40 0.60 30.00 0.95 0.98 1.03 1.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0417 0.24 PATH CONDITION PATH CONDITION Q->QN --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.14 0.21 0.29 0.40 5.00 0.24 0.32 0.43 0.60 FUNCTION FALL 10.00 0.36 0.45 0.57 0.81 30.00 0.84 0.93 1.08 1.45 Rev.1.01.10 2 - 932 TC200G SERIES DATA SHEET YFD4 YFD4 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH D CP Q D CP Q CONDITION SD WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.168 0.130 0.38 0.211 0.174 1.00 0.282 0.248 3.00 0.512 0.487 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.065 0.112 0.191 0.444 3.00 -0.143 -0.087 0.006 0.307 CLOCK CP DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.413 0.437 0.38 0.384 0.409 1.00 0.335 0.360 3.00 0.179 0.204 1.00 0.479 0.450 0.402 0.247 3.00 0.613 0.585 0.537 0.384 CONDITION SD WAVE_FORM D CP Q D CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.489 0.528 0.38 0.447 0.483 1.00 0.375 0.409 3.00 0.143 0.169 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.242 0.218 0.38 0.271 0.247 1.00 0.320 0.295 3.00 0.478 0.452 1.00 0.177 0.205 0.254 0.410 3.00 0.044 0.073 0.120 0.273 1.00 0.592 0.545 0.466 0.211 3.00 0.800 0.744 0.650 0.348 Rev.1.01.10 2 - 933 TC200G SERIES DATA SHEET YFD4 YFD4 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA SD ITEM SETUP CLOCK POSEDGE CLOCK CP DATA HIGH SD CP Q CONDITION ~D WAVE_FORM SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.027 -0.068 0.38 -0.030 -0.071 1.00 -0.034 -0.076 3.00 -0.050 -0.092 TIMING CONDITION DATA SD ITEM HOLD CLOCK POSEDGE 1.00 -0.137 -0.140 -0.146 -0.162 3.00 -0.361 -0.364 -0.370 -0.390 CLOCK CP DATA SD LOW CP Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.681 0.723 0.38 0.684 0.726 1.00 0.689 0.731 3.00 0.706 0.748 CONDITION ~D WAVE_FORM 1.00 0.792 0.795 0.801 0.818 3.00 1.015 1.019 1.025 1.045 Rev.1.01.10 2 - 934 TC200G SERIES DATA SHEET YFD4 YFD4 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT D CONDITION SD&D WAVE_FORM tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION SD&~D WAVE_FORM D tw(H) CP tw(L) Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 CONDITION --WAVE_FORM SD Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 MINIMUM PULSE WIDTH CONDITION CLOCK CP ITEM POSLIMIT NEGLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 0.01 to 3.00 0.710 MINIMUM PULSE WIDTH CONDITION CLOCK SD ITEM NEGLIMIT 0.01 to 3.00 0.690 Rev.1.01.10 2 - 935 TC200G SERIES DATA SHEET YLD1 CELL NAME YLD1 FUNCTION D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) TRUTH TABLE INPUT G D H L H H L X YLD1 DD GG QQ QN QN YLD1 CELL COUNT GATE 3 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L Verilog-HDL DESCRIPTION YLD1 inst(Q,QN,D,G); VHDL DESCRIPTION inst:YLD1 port map(Q,QN,D,G); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D G (LU) LOAD 3.27 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 36.2 QN 42.8 Rev.1.01.10 2 - 936 TC200G SERIES DATA SHEET YLD1 YLD1 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1033 0.41 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.38 0.56 0.25 0.40 0.59 0.31 0.47 0.66 0.45 0.66 0.87 30.00 1.29 1.33 1.39 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0435 0.23 PATH CONDITION PATH CONDITION QN->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.25 0.35 0.55 5.00 0.26 0.36 0.50 0.76 FUNCTION FALL 10.00 0.39 0.49 0.64 0.98 30.00 0.90 1.00 1.18 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0976 0.22 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.33 0.50 0.24 0.38 0.56 0.32 0.51 0.72 30.00 1.16 1.17 1.22 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0410 0.11 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.24 0.36 0.19 0.31 0.43 0.24 0.40 0.55 0.31 0.54 0.77 30.00 0.83 0.91 1.05 1.42 Rev.1.01.10 2 - 937 TC200G SERIES DATA SHEET YLD1 YLD1 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1033 0.41 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.38 0.56 0.25 0.40 0.59 0.31 0.47 0.66 0.45 0.66 0.87 30.00 1.29 1.33 1.39 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0435 0.23 PATH CONDITION PATH CONDITION QN->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.25 0.35 0.55 5.00 0.26 0.36 0.50 0.76 FUNCTION FALL 10.00 0.39 0.49 0.64 0.98 30.00 0.90 1.00 1.18 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0976 0.22 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.48 0.65 0.42 0.56 0.72 0.48 0.62 0.79 0.60 0.74 0.91 30.00 1.32 1.40 1.46 1.58 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0410 0.11 PATH CONDITION PATH CONDITION G->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.39 0.52 0.37 0.47 0.59 0.44 0.54 0.66 0.56 0.67 0.79 30.00 0.99 1.06 1.13 1.26 Rev.1.01.10 2 - 938 TC200G SERIES DATA SHEET YLD1 YLD1 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION --WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.181 0.166 0.38 0.204 0.188 1.00 0.241 0.225 3.00 0.362 0.344 TIMING CONDITION DATA D ITEM SETUP CLOCK NEGEDGE 1.00 0.141 0.163 0.198 0.313 3.00 0.060 0.079 0.110 0.212 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.522 0.548 0.38 0.495 0.522 1.00 0.450 0.477 3.00 0.305 0.334 1.00 0.593 0.567 0.523 0.382 3.00 0.738 0.713 0.672 0.538 CONDITION --WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.463 0.478 0.38 0.441 0.456 1.00 0.403 0.419 3.00 0.282 0.301 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.121 0.094 0.38 0.148 0.121 1.00 0.193 0.166 3.00 0.339 0.310 1.00 0.050 0.076 0.120 0.262 3.00 -0.094 -0.070 -0.028 0.106 1.00 0.503 0.482 0.447 0.332 3.00 0.585 0.566 0.535 0.433 Rev.1.01.10 2 - 939 TC200G SERIES DATA SHEET YLD1 YLD1 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT CONDITION D WAVE_FORM tw(H) G Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION ~D WAVE_FORM D tw(H) G Q MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 940 TC200G SERIES DATA SHEET YLD14B CELL NAME YLD14B FUNCTION QUAD D-TYPE TRANSPARENT LATCH ( HIGH ENABLE ) TRUTH TABLE INPUT G D H L H H L X YLD14B CELL COUNT GATE 9 I/O 0 1/16 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L YLD14B DA DA QA QA QANQAN DB DB DC DC QB QB QBNQBN QC QC QCNQCN DD DD QD QD QDNQDN GG Verilog-HDL DESCRIPTION YLD14B inst(QA,QAN,QB,QBN,QC,QCN, QD,QDN,DA,DB,DC,DD,G) ; VHDL DESCRIPTION inst:YLD14B port map(QA,QAN,QB,QBN,QC, QCN,QD,QDN,DA,DB, DC,DD,G); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE (LU*MHz) QA,QAN,QB,QBN,QC,QCN,QD,QDN 6880.0 INPUT LOAD PIN NAME DA DB,DC,DD G (LU) LOAD 3.29 3.30 0.99 OUTPUT DRIVE (LU) PIN NAME QA,QB,QC,QD QAN,QBN,QCN,QDN DRIVE 38.0 40.8 Rev.1.01.10 2 - 941 TC200G SERIES DATA SHEET YLD14B YLD14B 2/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QAN->QA --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0408 0.22 PATH CONDITION PATH CONDITION QAN->QA --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.1014 0.23 PATH CONDITION PATH CONDITION DA->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.34 0.51 0.23 0.39 0.57 0.32 0.51 0.72 30.00 1.18 1.19 1.25 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.0436 0.11 PATH CONDITION PATH CONDITION DA->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.44 0.24 0.40 0.56 0.31 0.54 0.77 30.00 0.87 0.94 1.08 1.44 Rev.1.01.10 2 - 942 TC200G SERIES DATA SHEET YLD14B YLD14B 3/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QBN->QB --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0408 0.22 PATH CONDITION PATH CONDITION QBN->QB --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.1013 0.23 PATH CONDITION PATH CONDITION DB->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.34 0.51 0.23 0.39 0.57 0.32 0.51 0.72 30.00 1.18 1.19 1.25 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.0436 0.11 PATH CONDITION PATH CONDITION DB->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.44 0.24 0.40 0.56 0.31 0.54 0.77 30.00 0.87 0.94 1.08 1.44 Rev.1.01.10 2 - 943 TC200G SERIES DATA SHEET YLD14B YLD14B 4/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QCN->QC --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0408 0.22 PATH CONDITION PATH CONDITION QCN->QC --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.1013 0.23 PATH CONDITION PATH CONDITION DC->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.34 0.51 0.23 0.39 0.57 0.32 0.51 0.72 30.00 1.18 1.19 1.25 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.0436 0.11 PATH CONDITION PATH CONDITION DC->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.44 0.24 0.40 0.56 0.31 0.54 0.77 30.00 0.87 0.94 1.08 1.44 Rev.1.01.10 2 - 944 TC200G SERIES DATA SHEET YLD14B YLD14B 5/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QDN->QD --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0408 0.22 PATH CONDITION PATH CONDITION QDN->QD --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.1013 0.23 PATH CONDITION PATH CONDITION DD->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.34 0.51 0.23 0.39 0.57 0.32 0.51 0.72 30.00 1.18 1.19 1.25 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.0436 0.11 PATH CONDITION PATH CONDITION DD->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.44 0.24 0.40 0.56 0.31 0.54 0.77 30.00 0.87 0.94 1.08 1.44 Rev.1.01.10 2 - 945 TC200G SERIES DATA SHEET YLD14B YLD14B 6/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QAN->QA --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0408 0.22 PATH CONDITION PATH CONDITION QAN->QA --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.1014 0.23 PATH CONDITION PATH CONDITION G->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.83 0.60 0.74 0.92 0.71 0.85 1.02 0.90 1.04 1.21 30.00 1.52 1.61 1.71 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.0436 0.11 PATH CONDITION PATH CONDITION G->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.47 0.60 0.45 0.56 0.68 0.55 0.66 0.79 0.74 0.85 0.98 30.00 1.09 1.18 1.28 1.47 Rev.1.01.10 2 - 946 TC200G SERIES DATA SHEET YLD14B YLD14B 7/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QBN->QB --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0408 0.22 PATH CONDITION PATH CONDITION QBN->QB --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.1013 0.23 PATH CONDITION PATH CONDITION G->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.83 0.60 0.74 0.92 0.71 0.85 1.02 0.90 1.04 1.21 30.00 1.52 1.61 1.71 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.0436 0.11 PATH CONDITION PATH CONDITION G->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.47 0.60 0.45 0.56 0.69 0.55 0.66 0.79 0.74 0.85 0.98 30.00 1.09 1.18 1.28 1.47 Rev.1.01.10 2 - 947 TC200G SERIES DATA SHEET YLD14B YLD14B 8/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QCN->QC --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0408 0.22 PATH CONDITION PATH CONDITION QCN->QC --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.1013 0.23 PATH CONDITION PATH CONDITION G->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.83 0.60 0.74 0.92 0.71 0.85 1.02 0.90 1.04 1.21 30.00 1.52 1.61 1.71 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.0436 0.11 PATH CONDITION PATH CONDITION G->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.47 0.60 0.45 0.56 0.69 0.55 0.66 0.79 0.74 0.85 0.98 30.00 1.09 1.18 1.28 1.47 Rev.1.01.10 2 - 948 TC200G SERIES DATA SHEET YLD14B YLD14B 9/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QDN->QD --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0408 0.22 PATH CONDITION PATH CONDITION QDN->QD --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.1013 0.23 PATH CONDITION PATH CONDITION G->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.83 0.60 0.74 0.92 0.71 0.85 1.02 0.90 1.04 1.21 30.00 1.52 1.61 1.71 1.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.0436 0.11 PATH CONDITION PATH CONDITION G->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.47 0.60 0.45 0.56 0.69 0.55 0.66 0.79 0.74 0.85 0.98 30.00 1.09 1.18 1.28 1.47 Rev.1.01.10 2 - 949 TC200G SERIES DATA SHEET YLD14B YLD14B 10/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DA ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION --WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.100 0.072 0.38 0.120 0.092 1.00 0.154 0.126 3.00 0.262 0.237 TIMING CONDITION DATA DA ITEM SETUP CLOCK NEGEDGE 1.00 0.025 0.046 0.081 0.193 3.00 -0.127 -0.105 -0.067 0.054 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.688 0.721 0.38 0.662 0.696 1.00 0.619 0.654 3.00 0.481 0.519 1.00 0.778 0.754 0.713 0.583 3.00 0.959 0.938 0.903 0.790 CONDITION --WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.546 0.574 0.38 0.526 0.553 1.00 0.491 0.519 3.00 0.381 0.407 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.042 -0.076 0.38 -0.016 -0.051 1.00 0.026 -0.009 3.00 0.163 0.125 1.00 -0.133 -0.109 -0.069 0.061 3.00 -0.317 -0.296 -0.260 -0.145 1.00 0.621 0.600 0.565 0.451 3.00 0.773 0.750 0.713 0.591 Rev.1.01.10 2 - 950 TC200G SERIES DATA SHEET YLD14B YLD14B 11/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DB ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION --WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.100 0.072 0.38 0.120 0.092 1.00 0.154 0.126 3.00 0.262 0.237 TIMING CONDITION DATA DB ITEM SETUP CLOCK NEGEDGE 1.00 0.025 0.046 0.081 0.193 3.00 -0.127 -0.105 -0.067 0.054 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.688 0.721 0.38 0.662 0.696 1.00 0.619 0.654 3.00 0.481 0.519 1.00 0.778 0.754 0.713 0.583 3.00 0.959 0.938 0.903 0.790 CONDITION --WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.546 0.574 0.38 0.526 0.553 1.00 0.491 0.519 3.00 0.381 0.407 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.042 -0.076 0.38 -0.016 -0.051 1.00 0.026 -0.009 3.00 0.163 0.125 1.00 -0.133 -0.109 -0.069 0.061 3.00 -0.317 -0.296 -0.260 -0.145 1.00 0.621 0.600 0.565 0.451 3.00 0.773 0.750 0.713 0.591 Rev.1.01.10 2 - 951 TC200G SERIES DATA SHEET YLD14B YLD14B 12/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DC ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION --WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.100 0.072 0.38 0.120 0.092 1.00 0.154 0.126 3.00 0.262 0.237 TIMING CONDITION DATA DC ITEM SETUP CLOCK NEGEDGE 1.00 0.025 0.046 0.081 0.193 3.00 -0.127 -0.105 -0.067 0.054 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.688 0.721 0.38 0.662 0.696 1.00 0.619 0.654 3.00 0.481 0.519 1.00 0.778 0.754 0.713 0.583 3.00 0.959 0.938 0.903 0.790 CONDITION --WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.546 0.574 0.38 0.526 0.553 1.00 0.491 0.519 3.00 0.381 0.407 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.042 -0.076 0.38 -0.016 -0.051 1.00 0.026 -0.009 3.00 0.163 0.125 1.00 -0.133 -0.109 -0.069 0.061 3.00 -0.317 -0.296 -0.260 -0.145 1.00 0.621 0.600 0.565 0.451 3.00 0.773 0.750 0.713 0.591 Rev.1.01.10 2 - 952 TC200G SERIES DATA SHEET YLD14B YLD14B 13/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DD ITEM SETUP CLOCK NEGEDGE CLOCK G DATA HIGH D G Q D G Q CONDITION --WAVE_FORM HOLD NEGEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.100 0.072 0.38 0.120 0.092 1.00 0.154 0.126 3.00 0.262 0.237 TIMING CONDITION DATA DD ITEM SETUP CLOCK NEGEDGE 1.00 0.025 0.046 0.081 0.193 3.00 -0.127 -0.105 -0.067 0.054 CLOCK G DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.688 0.721 0.38 0.662 0.696 1.00 0.619 0.654 3.00 0.481 0.519 1.00 0.778 0.754 0.713 0.583 3.00 0.959 0.938 0.903 0.790 CONDITION --WAVE_FORM D G Q D G Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.546 0.574 0.38 0.526 0.553 1.00 0.491 0.519 3.00 0.381 0.407 HOLD NEGEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 -0.042 -0.076 0.38 -0.016 -0.051 1.00 0.026 -0.009 3.00 0.163 0.125 1.00 -0.133 -0.109 -0.069 0.061 3.00 -0.317 -0.296 -0.260 -0.145 1.00 0.621 0.600 0.565 0.451 3.00 0.773 0.750 0.713 0.591 Rev.1.01.10 2 - 953 TC200G SERIES DATA SHEET YLD14B YLD14B 14/16 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT CONDITION DA WAVE_FORM tw(H) G Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION ~DA WAVE_FORM D tw(H) G Q MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION DB WAVE_FORM D tw(H) G Q MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 954 TC200G SERIES DATA SHEET YLD14B YLD14B 15/16 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT CONDITION ~DB WAVE_FORM tw(H) G Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION DC WAVE_FORM D tw(H) G Q MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION ~DC WAVE_FORM D tw(H) G Q MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 955 TC200G SERIES DATA SHEET YLD14B YLD14B 16/16 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM D POSLIMIT CONDITION DD WAVE_FORM tw(H) G Q POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 CONDITION ~DD WAVE_FORM D tw(H) G Q MINIMUM PULSE WIDTH CONDITION CLOCK G ITEM POSLIMIT POSLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.870 Rev.1.01.10 2 - 956 TC200G SERIES DATA SHEET YLD2 CELL NAME YLD2 FUNCTION D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) TRUTH TABLE INPUT GN D L L L H H X YLD2 DD GN GN QQ QN QN YLD2 CELL COUNT GATE 3 I/O 0 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L Verilog-HDL DESCRIPTION YLD2 inst(Q,QN,D,GN); VHDL DESCRIPTION inst:YLD2 port map(Q,QN,D,GN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Q,QN 6880.0 (LU*MHz) INPUT LOAD PIN NAME D GN (LU) LOAD 3.26 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Q 36.2 QN 42.8 Rev.1.01.10 2 - 957 TC200G SERIES DATA SHEET YLD2 YLD2 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1033 0.41 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.38 0.56 0.25 0.40 0.59 0.31 0.47 0.66 0.45 0.66 0.87 30.00 1.29 1.33 1.39 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0435 0.23 PATH CONDITION PATH CONDITION QN->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.25 0.35 0.55 5.00 0.26 0.36 0.50 0.76 FUNCTION FALL 10.00 0.39 0.49 0.64 0.98 30.00 0.90 1.00 1.18 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0976 0.22 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.33 0.50 0.24 0.38 0.56 0.32 0.51 0.72 30.00 1.16 1.17 1.22 1.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0410 0.11 PATH CONDITION PATH CONDITION D->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.24 0.36 0.19 0.31 0.43 0.24 0.40 0.55 0.31 0.54 0.77 30.00 0.83 0.91 1.05 1.42 Rev.1.01.10 2 - 958 TC200G SERIES DATA SHEET YLD2 YLD2 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QN->Q --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.1033 0.41 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.38 0.56 0.25 0.40 0.59 0.31 0.47 0.66 0.45 0.66 0.87 30.00 1.29 1.33 1.39 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Q 0.0435 0.23 PATH CONDITION PATH CONDITION QN->Q --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.25 0.35 0.55 5.00 0.26 0.36 0.50 0.76 FUNCTION FALL 10.00 0.39 0.49 0.64 0.98 30.00 0.90 1.00 1.18 1.65 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0976 0.22 PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.48 0.65 0.38 0.52 0.69 0.44 0.58 0.75 0.56 0.69 0.86 30.00 1.32 1.36 1.42 1.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QN 0.0410 0.11 PATH CONDITION PATH CONDITION GN->QN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.44 0.56 0.37 0.48 0.60 0.43 0.54 0.66 0.55 0.65 0.77 30.00 1.03 1.07 1.13 1.24 Rev.1.01.10 2 - 959 TC200G SERIES DATA SHEET YLD2 YLD2 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.172 0.140 0.38 0.205 0.174 1.00 0.260 0.232 3.00 0.437 0.418 TIMING CONDITION DATA D ITEM SETUP CLOCK POSEDGE 1.00 0.085 0.122 0.185 0.386 3.00 -0.091 -0.045 0.033 0.285 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.424 0.440 0.38 0.405 0.421 1.00 0.372 0.388 3.00 0.266 0.282 1.00 0.467 0.447 0.415 0.309 3.00 0.554 0.534 0.501 0.395 CONDITION --WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.471 0.503 0.38 0.438 0.469 1.00 0.384 0.412 3.00 0.208 0.227 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.219 0.203 0.38 0.238 0.222 1.00 0.271 0.255 3.00 0.378 0.362 1.00 0.176 0.196 0.229 0.335 3.00 0.090 0.109 0.143 0.249 1.00 0.558 0.521 0.459 0.258 3.00 0.734 0.687 0.610 0.360 Rev.1.01.10 2 - 960 TC200G SERIES DATA SHEET YLD2 YLD2 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION D WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.690 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION ~D WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.690 Rev.1.01.10 2 - 961 TC200G SERIES DATA SHEET YLD24B CELL NAME YLD24B FUNCTION QUAD D-TYPE TRANSPARENT LATCH ( LOW ENABLE ) TRUTH TABLE INPUT GN D L L L H H X YLD24B CELL COUNT GATE 9 I/O 0 1/16 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Q L H HOLD QN H L YLD24B DA DA QA QA QANQAN DB DB DC DC QB QB QBNQBN QC QC QCNQCN DD DD QD QD QDNQDN GN GN Verilog-HDL DESCRIPTION YLD24B inst(QA,QAN,QB,QBN,QC,QCN, QD,QDN,DA,DB,DC,DD, GN); VHDL DESCRIPTION inst:YLD24B port map(QA,QAN,QB,QBN,QC, QCN,QD,QDN,DA,DB, DC,DD,GN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE (LU*MHz) QA,QAN,QB,QBN,QC,QCN,QD,QDN 6880.0 INPUT LOAD PIN NAME DA DB,DC,DD GN (LU) LOAD 3.29 3.30 0.99 OUTPUT DRIVE PIN NAME QA,QB,QC,QDAN,QBN,QDN Q DRIVE 38.0 40.8 (LU) QCN 36.8 Rev.1.01.10 2 - 962 TC200G SERIES DATA SHEET YLD24B YLD24B 2/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QAN->QA --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0408 0.22 PATH CONDITION PATH CONDITION QAN->QA --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.1014 0.23 PATH CONDITION PATH CONDITION DA->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.34 0.51 0.23 0.39 0.57 0.32 0.51 0.72 30.00 1.18 1.19 1.25 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.0433 0.12 PATH CONDITION PATH CONDITION DA->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.44 0.24 0.40 0.56 0.31 0.54 0.77 30.00 0.87 0.94 1.08 1.44 Rev.1.01.10 2 - 963 TC200G SERIES DATA SHEET YLD24B YLD24B 3/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QBN->QB --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0408 0.22 PATH CONDITION PATH CONDITION QBN->QB --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.1014 0.23 PATH CONDITION PATH CONDITION DB->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.34 0.51 0.23 0.39 0.57 0.32 0.51 0.72 30.00 1.18 1.19 1.25 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.0433 0.12 PATH CONDITION PATH CONDITION DB->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.44 0.24 0.40 0.56 0.31 0.54 0.77 30.00 0.87 0.94 1.08 1.44 Rev.1.01.10 2 - 964 TC200G SERIES DATA SHEET YLD24B YLD24B 4/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QCN->QC --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0408 0.22 PATH CONDITION PATH CONDITION QCN->QC --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.1025 0.21 PATH CONDITION PATH CONDITION DC->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.17 0.32 0.50 0.19 0.34 0.51 0.23 0.39 0.57 0.30 0.51 0.73 30.00 1.22 1.24 1.29 1.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.0433 0.12 PATH CONDITION PATH CONDITION DC->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.45 0.24 0.40 0.56 0.30 0.54 0.78 30.00 0.88 0.95 1.10 1.49 Rev.1.01.10 2 - 965 TC200G SERIES DATA SHEET YLD24B YLD24B 5/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QDN->QD --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0408 0.22 PATH CONDITION PATH CONDITION QDN->QD --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.1014 0.23 PATH CONDITION PATH CONDITION DD->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.18 0.32 0.49 0.20 0.34 0.51 0.23 0.39 0.57 0.32 0.51 0.72 30.00 1.18 1.19 1.25 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.0433 0.12 PATH CONDITION PATH CONDITION DD->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.14 0.25 0.38 0.19 0.31 0.44 0.24 0.40 0.56 0.31 0.54 0.77 30.00 0.87 0.94 1.08 1.44 Rev.1.01.10 2 - 966 TC200G SERIES DATA SHEET YLD24B YLD24B 6/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QAN->QA --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QA 0.0408 0.22 PATH CONDITION PATH CONDITION QAN->QA --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.1014 0.23 PATH CONDITION PATH CONDITION GN->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.49 0.63 0.80 0.56 0.70 0.88 0.72 0.86 1.04 30.00 1.46 1.49 1.57 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QAN 0.0433 0.12 PATH CONDITION PATH CONDITION GN->QAN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.65 0.78 0.57 0.68 0.81 0.65 0.76 0.89 0.82 0.93 1.06 30.00 1.27 1.30 1.38 1.55 Rev.1.01.10 2 - 967 TC200G SERIES DATA SHEET YLD24B YLD24B 7/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QBN->QB --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QB 0.0408 0.22 PATH CONDITION PATH CONDITION QBN->QB --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.1014 0.23 PATH CONDITION PATH CONDITION GN->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.48 0.63 0.80 0.56 0.70 0.88 0.72 0.86 1.04 30.00 1.46 1.49 1.57 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QBN 0.0433 0.12 PATH CONDITION PATH CONDITION GN->QBN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.65 0.78 0.57 0.68 0.81 0.65 0.76 0.89 0.82 0.93 1.06 30.00 1.27 1.30 1.38 1.55 Rev.1.01.10 2 - 968 TC200G SERIES DATA SHEET YLD24B YLD24B 8/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QCN->QC --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QC 0.0408 0.22 PATH CONDITION PATH CONDITION QCN->QC --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.1025 0.21 PATH CONDITION PATH CONDITION GN->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.48 0.63 0.80 0.56 0.70 0.88 0.72 0.86 1.04 30.00 1.46 1.49 1.57 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QCN 0.0433 0.12 PATH CONDITION PATH CONDITION GN->QCN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.65 0.78 0.57 0.68 0.81 0.65 0.76 0.89 0.82 0.93 1.06 30.00 1.27 1.30 1.38 1.55 Rev.1.01.10 2 - 969 TC200G SERIES DATA SHEET YLD24B YLD24B 9/16 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION QDN->QD --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0995 0.40 PATH DELAY (ns) 1.00 5.00 10.00 0.22 0.37 0.55 0.25 0.40 0.58 0.31 0.47 0.65 0.46 0.65 0.86 30.00 1.26 1.30 1.36 1.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QD 0.0408 0.22 PATH CONDITION PATH CONDITION QDN->QD --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.15 0.24 0.34 0.54 5.00 0.25 0.35 0.48 0.75 FUNCTION FALL 10.00 0.37 0.47 0.63 0.97 30.00 0.86 0.96 1.13 1.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.1014 0.23 PATH CONDITION PATH CONDITION GN->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.60 0.77 0.48 0.63 0.80 0.56 0.70 0.88 0.72 0.86 1.04 30.00 1.46 1.49 1.57 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) QDN 0.0433 0.12 PATH CONDITION PATH CONDITION GN->QDN --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.54 0.65 0.78 0.57 0.68 0.81 0.65 0.76 0.89 0.82 0.93 1.06 30.00 1.27 1.30 1.38 1.55 Rev.1.01.10 2 - 970 TC200G SERIES DATA SHEET YLD24B YLD24B 10/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DA ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.073 0.025 0.38 0.111 0.065 1.00 0.176 0.133 3.00 0.384 0.351 TIMING CONDITION DATA DA ITEM SETUP CLOCK POSEDGE 1.00 -0.055 -0.012 0.061 0.295 3.00 -0.313 -0.260 -0.171 0.115 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.472 0.506 0.38 0.455 0.488 1.00 0.427 0.458 3.00 0.337 0.362 1.00 0.563 0.543 0.510 0.403 3.00 0.746 0.720 0.676 0.535 CONDITION --WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.570 0.618 0.38 0.532 0.578 1.00 0.468 0.511 3.00 0.261 0.294 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.172 0.138 0.38 0.189 0.156 1.00 0.218 0.187 3.00 0.313 0.288 1.00 0.080 0.101 0.135 0.245 3.00 -0.103 -0.077 -0.033 0.108 1.00 0.698 0.655 0.583 0.350 3.00 0.957 0.904 0.816 0.530 Rev.1.01.10 2 - 971 TC200G SERIES DATA SHEET YLD24B YLD24B 11/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DB ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.073 0.025 0.38 0.111 0.065 1.00 0.176 0.133 3.00 0.384 0.351 TIMING CONDITION DATA DB ITEM SETUP CLOCK POSEDGE 1.00 -0.055 -0.012 0.061 0.295 3.00 -0.313 -0.260 -0.171 0.115 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.472 0.506 0.38 0.455 0.488 1.00 0.427 0.458 3.00 0.337 0.362 1.00 0.563 0.543 0.510 0.403 3.00 0.746 0.720 0.676 0.535 CONDITION --WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.570 0.618 0.38 0.532 0.578 1.00 0.468 0.511 3.00 0.261 0.294 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.172 0.138 0.38 0.189 0.156 1.00 0.218 0.187 3.00 0.313 0.288 1.00 0.080 0.101 0.135 0.245 3.00 -0.103 -0.077 -0.033 0.108 1.00 0.698 0.655 0.583 0.350 3.00 0.957 0.904 0.816 0.530 Rev.1.01.10 2 - 972 TC200G SERIES DATA SHEET YLD24B YLD24B 12/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DC ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.073 0.025 0.38 0.111 0.065 1.00 0.176 0.133 3.00 0.384 0.351 TIMING CONDITION DATA DC ITEM SETUP CLOCK POSEDGE 1.00 -0.055 -0.012 0.061 0.295 3.00 -0.313 -0.260 -0.171 0.115 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.472 0.506 0.38 0.455 0.488 1.00 0.427 0.458 3.00 0.337 0.362 1.00 0.563 0.543 0.510 0.403 3.00 0.746 0.720 0.676 0.535 CONDITION --WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.570 0.618 0.38 0.532 0.578 1.00 0.468 0.511 3.00 0.261 0.294 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.172 0.138 0.38 0.189 0.156 1.00 0.218 0.187 3.00 0.313 0.288 1.00 0.080 0.101 0.135 0.245 3.00 -0.103 -0.077 -0.033 0.108 1.00 0.698 0.655 0.583 0.350 3.00 0.957 0.904 0.816 0.530 Rev.1.01.10 2 - 973 TC200G SERIES DATA SHEET YLD24B YLD24B 13/16 CONDITION:VDD=3.3V, Ta=25C, Typ. TIMING CONDITION DATA DD ITEM SETUP CLOCK POSEDGE CLOCK GN DATA HIGH D GN Q D GN Q CONDITION --WAVE_FORM HOLD POSEDGE HIGH SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.073 0.025 0.38 0.111 0.065 1.00 0.176 0.133 3.00 0.384 0.351 TIMING CONDITION DATA DD ITEM SETUP CLOCK POSEDGE 1.00 -0.055 -0.012 0.061 0.295 3.00 -0.313 -0.260 -0.171 0.115 CLOCK GN DATA LOW HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.472 0.506 0.38 0.455 0.488 1.00 0.427 0.458 3.00 0.337 0.362 1.00 0.563 0.543 0.510 0.403 3.00 0.746 0.720 0.676 0.535 CONDITION --WAVE_FORM D GN Q D GN Q HOLD (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.570 0.618 0.38 0.532 0.578 1.00 0.468 0.511 3.00 0.261 0.294 HOLD POSEDGE LOW SETUP (ns) CLOCK SLEW (ns) 0.01 0.38 DATA SLEW (ns) 0.01 0.172 0.138 0.38 0.189 0.156 1.00 0.218 0.187 3.00 0.313 0.288 1.00 0.080 0.101 0.135 0.245 3.00 -0.103 -0.077 -0.033 0.108 1.00 0.698 0.655 0.583 0.350 3.00 0.957 0.904 0.816 0.530 Rev.1.01.10 2 - 974 TC200G SERIES DATA SHEET YLD24B YLD24B 14/16 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION DA WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.760 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION ~DA WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.720 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION DB WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.760 Rev.1.01.10 2 - 975 TC200G SERIES DATA SHEET YLD24B YLD24B 15/16 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION ~DB WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.720 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION DC WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.760 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION ~DC WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.720 Rev.1.01.10 2 - 976 TC200G SERIES DATA SHEET YLD24B YLD24B 16/16 CONDITION:VDD=3.3V, Ta=25C, Typ. MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION DD WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.760 MINIMUM PULSE WIDTH CONDITION CLOCK GN ITEM D NEGLIMIT CONDITION ~DD WAVE_FORM tw(L) GN Q NEGLIMIT (ns) RISE SLEW (ns) FALL SLEW (ns) 0.01 to 3.00 0.01 to 3.00 0.720 Rev.1.01.10 2 - 977 TC200G SERIES DATA SHEET YMUX24H CELL NAME YMUX24H FUNCTION QUAD 2 TO 1 MULTIPLEXER 11 LOGIC SYMBOL YMUX24H A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 A4A4 B4B4 Z4 Z4 Z3 Z3 Z2 Z2 Z1 Z1 YMUX24H CELL COUNT GATE I/O 0 1/9 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT S A L L L H H X H X B X X L H OUTPUT Z L H L H SS Verilog-HDL DESCRIPTION YMUX24H inst(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4,S) ; VHDL DESCRIPTION inst:YMUX24H port map(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4, S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1,Z2,Z3,Z4 12880.0 (LU*MHz) INPUT LOAD PIN NAME A1,A2,A3 B1,B2,B3 A4 B4,S (LU) LOAD 1.03 1.01 1.00 0.99 OUTPUT DRIVE PIN NAME DRIVE Z1,Z4 49.8 (LU) Z2,Z3 49.7 Rev.1.01.10 2 - 978 TC200G SERIES DATA SHEET YMUX24H YMUX24H 2/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0863 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.38 0.54 0.32 0.45 0.61 0.40 0.53 0.69 0.54 0.68 0.83 30.00 1.14 1.22 1.30 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0352 0.11 PATH CONDITION PATH CONDITION A1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.31 0.38 0.52 5.00 0.41 0.44 0.51 0.66 FUNCTION FALL 10.00 0.53 0.57 0.64 0.79 30.00 0.98 1.01 1.08 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0862 0.10 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.38 0.54 0.32 0.45 0.61 0.40 0.53 0.69 0.54 0.67 0.83 30.00 1.14 1.22 1.30 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0352 0.11 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.41 0.53 0.31 0.44 0.57 0.38 0.51 0.64 0.52 0.66 0.79 30.00 0.98 1.01 1.08 1.24 Rev.1.01.10 2 - 979 TC200G SERIES DATA SHEET YMUX24H YMUX24H 3/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0862 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.38 0.54 0.32 0.45 0.61 0.40 0.53 0.69 0.54 0.68 0.83 30.00 1.14 1.22 1.30 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0352 0.11 PATH CONDITION PATH CONDITION A3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.32 0.38 0.52 5.00 0.41 0.44 0.51 0.66 FUNCTION FALL 10.00 0.53 0.57 0.64 0.79 30.00 0.98 1.01 1.08 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0862 0.10 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.38 0.54 0.32 0.45 0.61 0.40 0.53 0.69 0.54 0.67 0.83 30.00 1.14 1.22 1.30 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0351 0.11 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.41 0.53 0.31 0.44 0.57 0.38 0.51 0.64 0.52 0.66 0.79 30.00 0.98 1.01 1.08 1.24 Rev.1.01.10 2 - 980 TC200G SERIES DATA SHEET YMUX24H YMUX24H 4/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0863 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.23 0.37 0.52 0.31 0.44 0.60 0.39 0.52 0.68 0.54 0.67 0.83 30.00 1.13 1.21 1.29 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0352 0.11 PATH CONDITION PATH CONDITION B1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.31 0.38 0.53 5.00 0.40 0.44 0.51 0.66 FUNCTION FALL 10.00 0.53 0.56 0.63 0.80 30.00 0.97 1.00 1.07 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0862 0.10 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.53 0.32 0.45 0.61 0.40 0.53 0.69 0.54 0.68 0.84 30.00 1.14 1.21 1.30 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0352 0.11 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.41 0.53 0.31 0.44 0.56 0.38 0.51 0.64 0.53 0.67 0.80 30.00 0.97 1.00 1.08 1.25 Rev.1.01.10 2 - 981 TC200G SERIES DATA SHEET YMUX24H YMUX24H 5/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0862 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.53 0.31 0.45 0.60 0.40 0.53 0.69 0.54 0.68 0.84 30.00 1.13 1.21 1.29 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0352 0.11 PATH CONDITION PATH CONDITION B3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.28 0.32 0.38 0.53 5.00 0.41 0.44 0.51 0.67 FUNCTION FALL 10.00 0.53 0.57 0.64 0.80 30.00 0.97 1.01 1.08 1.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0862 0.10 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.37 0.53 0.31 0.45 0.60 0.39 0.53 0.68 0.54 0.68 0.83 30.00 1.13 1.21 1.29 1.45 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0351 0.11 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.28 0.40 0.53 0.31 0.44 0.56 0.38 0.51 0.63 0.53 0.66 0.79 30.00 0.96 1.00 1.07 1.24 Rev.1.01.10 2 - 982 TC200G SERIES DATA SHEET YMUX24H YMUX24H 6/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z1 A1&~B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0863 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.82 0.55 0.69 0.84 0.63 0.77 0.92 0.83 0.97 1.13 30.00 1.43 1.45 1.53 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0352 0.11 PATH CONDITION PATH CONDITION S->Z1 A1&~B1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.50 0.61 0.81 5.00 0.53 0.62 0.72 0.92 FUNCTION FALL 10.00 0.65 0.74 0.84 1.04 30.00 1.08 1.17 1.28 1.47 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0863 0.10 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.68 0.84 0.64 0.77 0.93 0.73 0.87 1.02 0.90 1.03 1.19 30.00 1.45 1.53 1.63 1.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0352 0.11 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.70 0.82 0.60 0.73 0.85 0.68 0.80 0.93 0.86 0.99 1.11 30.00 1.26 1.29 1.37 1.55 Rev.1.01.10 2 - 983 TC200G SERIES DATA SHEET YMUX24H YMUX24H 7/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z2 A2&~B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0862 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.66 0.82 0.56 0.69 0.85 0.64 0.77 0.93 0.84 0.98 1.13 30.00 1.43 1.46 1.54 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0352 0.11 PATH CONDITION PATH CONDITION S->Z2 A2&~B2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.43 0.51 0.62 0.82 5.00 0.54 0.63 0.74 0.93 FUNCTION FALL 10.00 0.66 0.75 0.86 1.05 30.00 1.10 1.18 1.29 1.49 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0862 0.10 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.69 0.84 0.64 0.77 0.93 0.73 0.87 1.03 0.90 1.04 1.19 30.00 1.45 1.54 1.63 1.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0352 0.11 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.69 0.82 0.59 0.72 0.85 0.67 0.80 0.92 0.86 0.98 1.11 30.00 1.26 1.29 1.36 1.55 Rev.1.01.10 2 - 984 TC200G SERIES DATA SHEET YMUX24H YMUX24H 8/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z3 A3&~B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0862 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.66 0.81 0.55 0.68 0.84 0.63 0.76 0.92 0.83 0.97 1.12 30.00 1.43 1.45 1.53 1.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0352 0.11 PATH CONDITION PATH CONDITION S->Z3 A3&~B3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.51 0.61 0.81 5.00 0.53 0.62 0.73 0.93 FUNCTION FALL 10.00 0.65 0.74 0.85 1.05 30.00 1.09 1.17 1.28 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0862 0.10 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.69 0.84 0.64 0.77 0.93 0.73 0.87 1.03 0.90 1.04 1.19 30.00 1.45 1.54 1.63 1.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0352 0.11 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.69 0.82 0.60 0.72 0.85 0.68 0.80 0.93 0.86 0.99 1.11 30.00 1.26 1.29 1.37 1.55 Rev.1.01.10 2 - 985 TC200G SERIES DATA SHEET YMUX24H YMUX24H 9/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z4 A4&~B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0862 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.53 0.67 0.82 0.56 0.69 0.85 0.64 0.77 0.93 0.84 0.98 1.14 30.00 1.44 1.46 1.54 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0351 0.11 PATH CONDITION PATH CONDITION S->Z4 A4&~B4 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.42 0.51 0.62 0.82 5.00 0.54 0.63 0.73 0.93 FUNCTION FALL 10.00 0.66 0.74 0.85 1.05 30.00 1.09 1.18 1.28 1.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0862 0.10 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.68 0.84 0.64 0.77 0.93 0.73 0.87 1.02 0.90 1.03 1.19 30.00 1.45 1.53 1.63 1.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0351 0.11 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.69 0.82 0.60 0.72 0.85 0.67 0.80 0.93 0.86 0.98 1.11 30.00 1.26 1.29 1.37 1.55 Rev.1.01.10 2 - 986 TC200G SERIES DATA SHEET YMUX24HP CELL NAME YMUX24HP FUNCTION QUAD 2 TO 1 MULTIPLEXER 13 LOGIC SYMBOL YMUX24HP A1 A1 B1B1 A2 A2 B2B2 A3 A3 B3B3 A4 A4 B4B4 Z4 Z4 Z3 Z3 Z2 Z2 Z1 Z1 YMUX24HP CELL COUNT GATE I/O 0 1/9 CONDITION VDD=3.3V, Ta=25C, Typ. TRUTH TABLE INPUT S A L L L H H X H X B X X L H OUTPUT Z L H L H SS Verilog-HDL DESCRIPTION YMUX24HP inst(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4, S); VHDL DESCRIPTION inst:YMUX24HP port map(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4, S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1,Z2,Z3,Z4 12880.0 (LU*MHz) INPUT LOAD PIN NAME A1,A2,A3 B1,B2,B3 A4 B4,S (LU) LOAD 1.03 1.01 1.00 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z1,Z2,Z3,Z4 94.7 Rev.1.01.10 2 - 987 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 2/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0434 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.41 0.33 0.40 0.49 0.41 0.49 0.57 0.57 0.65 0.74 30.00 0.73 0.80 0.89 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0204 0.13 PATH CONDITION PATH CONDITION A1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.32 0.39 0.55 5.00 0.37 0.41 0.48 0.63 FUNCTION FALL 10.00 0.46 0.49 0.56 0.72 30.00 0.73 0.76 0.83 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0434 0.10 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.41 0.33 0.40 0.49 0.41 0.49 0.57 0.57 0.65 0.74 30.00 0.73 0.81 0.89 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0204 0.13 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.46 0.32 0.41 0.49 0.39 0.48 0.56 0.55 0.63 0.72 30.00 0.73 0.76 0.83 1.00 Rev.1.01.10 2 - 988 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 3/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0434 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.41 0.33 0.40 0.49 0.41 0.49 0.57 0.57 0.65 0.74 30.00 0.73 0.80 0.89 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0204 0.13 PATH CONDITION PATH CONDITION A3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.32 0.39 0.55 5.00 0.37 0.41 0.48 0.63 FUNCTION FALL 10.00 0.46 0.49 0.56 0.72 30.00 0.73 0.76 0.83 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0434 0.10 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.25 0.33 0.41 0.33 0.40 0.49 0.41 0.49 0.57 0.57 0.65 0.74 30.00 0.73 0.81 0.89 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0204 0.13 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.46 0.32 0.41 0.49 0.39 0.48 0.56 0.55 0.63 0.72 30.00 0.73 0.76 0.83 1.00 Rev.1.01.10 2 - 989 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 4/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0434 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.31 0.40 0.31 0.39 0.47 0.40 0.48 0.56 0.57 0.65 0.73 30.00 0.71 0.79 0.88 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0204 0.13 PATH CONDITION PATH CONDITION B1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.32 0.39 0.55 5.00 0.37 0.40 0.47 0.64 FUNCTION FALL 10.00 0.45 0.48 0.56 0.73 30.00 0.72 0.75 0.82 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0434 0.10 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.31 0.40 0.32 0.39 0.48 0.41 0.48 0.57 0.57 0.65 0.74 30.00 0.71 0.79 0.88 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0204 0.13 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.45 0.32 0.40 0.48 0.39 0.47 0.55 0.55 0.64 0.72 30.00 0.72 0.75 0.82 1.00 Rev.1.01.10 2 - 990 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 5/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0434 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.31 0.40 0.31 0.39 0.47 0.40 0.48 0.56 0.57 0.65 0.73 30.00 0.71 0.79 0.88 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0204 0.13 PATH CONDITION PATH CONDITION B3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.29 0.32 0.39 0.55 5.00 0.37 0.40 0.47 0.64 FUNCTION FALL 10.00 0.45 0.48 0.56 0.73 30.00 0.72 0.75 0.82 1.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0434 0.10 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.24 0.31 0.40 0.32 0.39 0.48 0.41 0.48 0.57 0.57 0.65 0.74 30.00 0.71 0.79 0.88 1.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0204 0.13 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.29 0.37 0.45 0.32 0.40 0.48 0.39 0.47 0.55 0.55 0.64 0.72 30.00 0.71 0.75 0.82 1.00 Rev.1.01.10 2 - 991 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 6/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z1 A1&~B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0434 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.63 0.71 0.58 0.65 0.74 0.66 0.73 0.82 0.86 0.94 1.02 30.00 1.03 1.06 1.14 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z1 A1&~B1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.46 0.54 0.65 0.85 5.00 0.54 0.62 0.73 0.93 FUNCTION FALL 10.00 0.61 0.70 0.81 1.01 30.00 0.87 0.96 1.07 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0434 0.09 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.64 0.72 0.65 0.73 0.81 0.75 0.82 0.91 0.92 1.00 1.08 30.00 1.04 1.12 1.22 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.66 0.74 0.60 0.69 0.77 0.68 0.77 0.85 0.87 0.95 1.04 30.00 1.01 1.04 1.12 1.31 Rev.1.01.10 2 - 992 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 7/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z2 A2&~B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0434 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.63 0.72 0.59 0.66 0.75 0.67 0.74 0.83 0.87 0.95 1.03 30.00 1.04 1.07 1.15 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z2 A2&~B2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.47 0.55 0.66 0.86 5.00 0.55 0.63 0.74 0.94 FUNCTION FALL 10.00 0.62 0.71 0.82 1.01 30.00 0.88 0.97 1.08 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0434 0.10 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.64 0.72 0.65 0.73 0.81 0.75 0.83 0.91 0.92 1.00 1.08 30.00 1.04 1.12 1.22 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.65 0.74 0.60 0.68 0.77 0.68 0.76 0.85 0.87 0.95 1.03 30.00 1.01 1.04 1.12 1.30 Rev.1.01.10 2 - 993 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 8/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z3 A3&~B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0434 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.55 0.63 0.71 0.58 0.65 0.74 0.66 0.73 0.82 0.86 0.94 1.02 30.00 1.03 1.06 1.14 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z3 A3&~B3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.46 0.54 0.65 0.85 5.00 0.54 0.62 0.73 0.93 FUNCTION FALL 10.00 0.61 0.70 0.81 1.01 30.00 0.87 0.96 1.07 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0434 0.09 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.64 0.72 0.65 0.73 0.81 0.75 0.82 0.91 0.92 1.00 1.08 30.00 1.04 1.12 1.22 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.66 0.74 0.60 0.69 0.77 0.68 0.77 0.85 0.87 0.95 1.04 30.00 1.01 1.04 1.12 1.31 Rev.1.01.10 2 - 994 TC200G SERIES DATA SHEET YMUX24HP YMUX24HP 9/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z4 A4&~B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0434 0.10 PATH DELAY (ns) 1.00 5.00 10.00 0.56 0.63 0.72 0.59 0.66 0.75 0.67 0.74 0.83 0.87 0.95 1.03 30.00 1.04 1.07 1.15 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z4 A4&~B4 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.47 0.55 0.66 0.86 5.00 0.54 0.63 0.74 0.94 FUNCTION FALL 10.00 0.62 0.71 0.82 1.01 30.00 0.88 0.97 1.08 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0434 0.10 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.64 0.72 0.65 0.73 0.81 0.75 0.83 0.91 0.92 1.00 1.08 30.00 1.04 1.12 1.22 1.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0204 0.13 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.57 0.65 0.74 0.60 0.68 0.77 0.68 0.76 0.85 0.87 0.95 1.03 30.00 1.01 1.04 1.12 1.30 Rev.1.01.10 2 - 995 TC200G SERIES DATA SHEET YMUX24L CELL NAME YMUX24L FUNCTION QUAD 2 TO 1 MULTIPLEXER ( INVERTED OUTPUT ) YMUX24L CELL COUNT GATE 7 I/O 0 1/9 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL YMUX24L A1A1 B1B1 A2A2 B2B2 A3A3 B3B3 A4A4 B4B4 Z4 Z4 Z3 Z3 Z2 Z2 Z1 Z1 TRUTH TABLE INPUT S A L L L H H X H X B X X L H OUTPUT Z H L H L SS Verilog-HDL DESCRIPTION YMUX24L inst(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4,S) ; VHDL DESCRIPTION inst:YMUX24L port map(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4, S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1,Z2,Z3,Z4 12880.0 (LU*MHz) INPUT LOAD PIN NAME A1,A2,B4 B1,B2,A3 B3 A4 S (LU) LOAD 3.34 3.35 3.36 3.33 0.99 OUTPUT DRIVE PIN NAME DRIVE Z1,Z3 44.2 (LU) Z2,Z4 45.2 Rev.1.01.10 2 - 996 TC200G SERIES DATA SHEET YMUX24L YMUX24L 2/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0887 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.14 0.27 0.43 0.18 0.32 0.49 0.25 0.44 0.64 30.00 1.02 1.04 1.10 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0363 0.06 PATH CONDITION PATH CONDITION A1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.15 0.18 0.23 5.00 0.20 0.26 0.34 0.47 FUNCTION FALL 10.00 0.31 0.38 0.49 0.68 30.00 0.74 0.81 0.95 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0865 0.09 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.25 0.41 0.14 0.27 0.42 0.18 0.32 0.48 0.25 0.44 0.64 30.00 1.01 1.03 1.08 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0353 0.07 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.20 0.31 0.15 0.26 0.38 0.18 0.34 0.49 0.23 0.47 0.68 30.00 0.72 0.80 0.94 1.30 Rev.1.01.10 2 - 997 TC200G SERIES DATA SHEET YMUX24L YMUX24L 3/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0887 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.14 0.27 0.43 0.18 0.32 0.49 0.25 0.44 0.64 30.00 1.02 1.04 1.10 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0363 0.06 PATH CONDITION PATH CONDITION A3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.15 0.18 0.23 5.00 0.20 0.26 0.34 0.47 FUNCTION FALL 10.00 0.31 0.38 0.49 0.68 30.00 0.74 0.81 0.95 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0865 0.09 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.25 0.40 0.14 0.27 0.42 0.18 0.32 0.48 0.25 0.44 0.64 30.00 1.01 1.03 1.08 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0353 0.07 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.20 0.31 0.15 0.26 0.38 0.18 0.34 0.49 0.23 0.47 0.68 30.00 0.72 0.80 0.94 1.29 Rev.1.01.10 2 - 998 TC200G SERIES DATA SHEET YMUX24L YMUX24L 4/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0887 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.15 0.28 0.43 0.18 0.33 0.49 0.25 0.44 0.64 30.00 1.03 1.04 1.10 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0363 0.06 PATH CONDITION PATH CONDITION B1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.15 0.18 0.23 5.00 0.20 0.26 0.34 0.47 FUNCTION FALL 10.00 0.31 0.38 0.49 0.68 30.00 0.74 0.81 0.95 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0865 0.09 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.15 0.27 0.43 0.18 0.32 0.48 0.25 0.44 0.64 30.00 1.01 1.03 1.09 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0353 0.07 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.20 0.31 0.15 0.26 0.38 0.19 0.34 0.49 0.23 0.47 0.68 30.00 0.72 0.80 0.94 1.30 Rev.1.01.10 2 - 999 TC200G SERIES DATA SHEET YMUX24L YMUX24L 5/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0887 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.15 0.28 0.43 0.18 0.33 0.49 0.25 0.44 0.64 30.00 1.03 1.04 1.10 1.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0363 0.06 PATH CONDITION PATH CONDITION B3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.11 0.15 0.19 0.23 5.00 0.20 0.27 0.34 0.47 FUNCTION FALL 10.00 0.31 0.38 0.49 0.68 30.00 0.74 0.81 0.95 1.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0865 0.09 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.13 0.26 0.41 0.15 0.27 0.42 0.18 0.32 0.48 0.25 0.44 0.64 30.00 1.01 1.03 1.09 1.29 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0353 0.07 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.20 0.31 0.15 0.26 0.38 0.19 0.34 0.49 0.23 0.47 0.68 30.00 0.72 0.80 0.94 1.30 Rev.1.01.10 2 - 1000 TC200G SERIES DATA SHEET YMUX24L YMUX24L 6/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z1 A1&~B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0887 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.64 0.80 0.60 0.73 0.89 0.70 0.83 0.98 0.86 0.99 1.15 30.00 1.41 1.50 1.60 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0363 0.06 PATH CONDITION PATH CONDITION S->Z1 A1&~B1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.54 0.62 0.80 5.00 0.62 0.65 0.73 0.90 FUNCTION FALL 10.00 0.73 0.76 0.84 1.01 30.00 1.15 1.18 1.26 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0887 0.09 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.58 0.74 0.48 0.61 0.77 0.56 0.69 0.85 0.76 0.89 1.05 30.00 1.36 1.38 1.47 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0363 0.06 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.44 0.55 0.43 0.53 0.64 0.54 0.64 0.75 0.74 0.84 0.95 30.00 0.97 1.06 1.17 1.38 Rev.1.01.10 2 - 1001 TC200G SERIES DATA SHEET YMUX24L YMUX24L 7/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z2 A2&~B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0865 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.64 0.79 0.60 0.73 0.88 0.69 0.82 0.98 0.86 0.99 1.14 30.00 1.40 1.48 1.58 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0353 0.07 PATH CONDITION PATH CONDITION S->Z2 A2&~B2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.54 0.62 0.80 5.00 0.61 0.64 0.72 0.90 FUNCTION FALL 10.00 0.72 0.75 0.83 1.01 30.00 1.14 1.17 1.25 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0865 0.09 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.59 0.74 0.49 0.62 0.77 0.57 0.70 0.85 0.77 0.90 1.05 30.00 1.35 1.38 1.46 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0353 0.07 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.44 0.55 0.43 0.53 0.64 0.55 0.64 0.75 0.75 0.84 0.95 30.00 0.97 1.05 1.17 1.37 Rev.1.01.10 2 - 1002 TC200G SERIES DATA SHEET YMUX24L YMUX24L 8/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z3 A3&~B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0887 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.64 0.80 0.60 0.73 0.89 0.70 0.83 0.98 0.86 0.99 1.15 30.00 1.41 1.50 1.60 1.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0363 0.06 PATH CONDITION PATH CONDITION S->Z3 A3&~B3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.52 0.55 0.62 0.80 5.00 0.62 0.65 0.73 0.90 FUNCTION FALL 10.00 0.73 0.76 0.84 1.01 30.00 1.16 1.19 1.26 1.44 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0887 0.09 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.45 0.58 0.74 0.48 0.61 0.77 0.56 0.70 0.85 0.76 0.90 1.05 30.00 1.36 1.38 1.47 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0363 0.06 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.34 0.44 0.55 0.43 0.53 0.64 0.54 0.64 0.75 0.74 0.84 0.95 30.00 0.97 1.06 1.17 1.38 Rev.1.01.10 2 - 1003 TC200G SERIES DATA SHEET YMUX24L YMUX24L 9/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z4 A4&~B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0865 0.09 PATH DELAY (ns) 1.00 5.00 10.00 0.51 0.64 0.79 0.60 0.73 0.88 0.69 0.82 0.97 0.86 0.99 1.14 30.00 1.40 1.48 1.58 1.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0353 0.07 PATH CONDITION PATH CONDITION S->Z4 A4&~B4 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.54 0.62 0.80 5.00 0.61 0.64 0.72 0.90 FUNCTION FALL 10.00 0.72 0.75 0.83 1.01 30.00 1.14 1.17 1.25 1.42 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0865 0.09 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.59 0.74 0.49 0.62 0.77 0.57 0.70 0.85 0.77 0.90 1.05 30.00 1.35 1.38 1.46 1.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0353 0.07 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.35 0.44 0.55 0.43 0.53 0.64 0.54 0.64 0.75 0.75 0.84 0.95 30.00 0.97 1.05 1.16 1.37 Rev.1.01.10 2 - 1004 TC200G SERIES DATA SHEET YMUX24LP CELL NAME YMUX24LP FUNCTION QUAD 2 TO 1 MULTIPLEXER ( INVERTED OUTPUT ) YMUX24LP CELL COUNT GATE 9 I/O 0 1/9 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL YMUX24LP A1 A1 B1B1 A2 A2 B2B2 A3 A3 B3B3 A4 A4 B4B4 Z4 Z4 Z3 Z3 Z2 Z2 Z1 Z1 TRUTH TABLE INPUT S A L L L H H X H X B X X L H OUTPUT Z H L H L SS Verilog-HDL DESCRIPTION YMUX24LP inst(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4, S); VHDL DESCRIPTION inst:YMUX24LP port map(Z1,Z2,Z3,Z4,A1,B1, A2,B2,A3,B3,A4,B4, S); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z1,Z2,Z3,Z4 12880.0 (LU*MHz) INPUT LOAD PIN NAME A1,A2,A3,A4 B1,B2,B3,B4 S (LU) LOAD 4.30 4.31 0.99 OUTPUT DRIVE PIN NAME DRIVE (LU) Z1,Z2,Z3,Z4 84.1 Rev.1.01.10 2 - 1005 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 2/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.26 0.13 0.20 0.28 0.15 0.24 0.32 0.21 0.32 0.43 30.00 0.57 0.58 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0188 0.08 PATH CONDITION PATH CONDITION A1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.13 0.15 0.17 5.00 0.16 0.21 0.25 0.32 FUNCTION FALL 10.00 0.22 0.28 0.35 0.47 30.00 0.46 0.52 0.63 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0437 0.07 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.26 0.13 0.20 0.28 0.15 0.24 0.32 0.21 0.32 0.43 30.00 0.57 0.58 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0188 0.08 PATH CONDITION PATH CONDITION A2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.16 0.22 0.13 0.21 0.28 0.15 0.25 0.35 0.17 0.32 0.47 30.00 0.45 0.52 0.63 0.87 Rev.1.01.10 2 - 1006 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 3/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION A3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.26 0.13 0.20 0.28 0.15 0.24 0.32 0.21 0.32 0.43 30.00 0.57 0.58 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0188 0.08 PATH CONDITION PATH CONDITION A3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.13 0.15 0.17 5.00 0.16 0.21 0.25 0.32 FUNCTION FALL 10.00 0.22 0.28 0.35 0.47 30.00 0.46 0.52 0.63 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0437 0.07 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.18 0.26 0.13 0.20 0.28 0.15 0.24 0.32 0.21 0.32 0.43 30.00 0.57 0.58 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0188 0.08 PATH CONDITION PATH CONDITION A4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.16 0.22 0.13 0.21 0.28 0.15 0.25 0.35 0.17 0.32 0.47 30.00 0.45 0.52 0.63 0.87 Rev.1.01.10 2 - 1007 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 4/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B1->Z1 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.19 0.27 0.13 0.20 0.28 0.16 0.24 0.33 0.21 0.32 0.43 30.00 0.57 0.59 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0188 0.08 PATH CONDITION PATH CONDITION B1->Z1 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.13 0.16 0.18 5.00 0.16 0.21 0.26 0.33 FUNCTION FALL 10.00 0.22 0.28 0.35 0.47 30.00 0.45 0.52 0.64 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0437 0.07 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.19 0.27 0.13 0.20 0.28 0.16 0.24 0.33 0.21 0.32 0.43 30.00 0.57 0.59 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0188 0.08 PATH CONDITION PATH CONDITION B2->Z2 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.16 0.22 0.13 0.21 0.28 0.16 0.26 0.35 0.18 0.33 0.47 30.00 0.45 0.52 0.64 0.87 Rev.1.01.10 2 - 1008 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 5/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION B3->Z3 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.19 0.27 0.13 0.20 0.28 0.16 0.24 0.33 0.21 0.32 0.43 30.00 0.57 0.59 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0188 0.08 PATH CONDITION PATH CONDITION B3->Z3 --PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.10 0.13 0.16 0.18 5.00 0.16 0.21 0.26 0.33 FUNCTION FALL 10.00 0.22 0.28 0.35 0.47 30.00 0.45 0.52 0.64 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0437 0.07 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.12 0.19 0.27 0.13 0.20 0.28 0.16 0.24 0.33 0.21 0.32 0.43 30.00 0.57 0.59 0.64 0.80 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0188 0.08 PATH CONDITION PATH CONDITION B4->Z4 --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.16 0.22 0.13 0.21 0.28 0.16 0.26 0.35 0.18 0.33 0.47 30.00 0.45 0.52 0.64 0.87 Rev.1.01.10 2 - 1009 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 6/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z1 A1&~B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.59 0.66 0.60 0.67 0.75 0.70 0.77 0.85 0.87 0.94 1.02 30.00 0.97 1.06 1.16 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z1 A1&~B1 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.54 0.62 0.80 5.00 0.58 0.61 0.69 0.87 FUNCTION FALL 10.00 0.65 0.68 0.76 0.94 30.00 0.88 0.91 0.99 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0437 0.07 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.53 0.61 0.49 0.56 0.64 0.57 0.64 0.72 0.78 0.84 0.92 30.00 0.92 0.94 1.02 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z1 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z1 ~A1&B1 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.42 0.48 0.44 0.51 0.57 0.56 0.62 0.68 0.76 0.82 0.89 30.00 0.72 0.80 0.92 1.12 Rev.1.01.10 2 - 1010 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 7/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z2 A2&~B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.58 0.66 0.60 0.67 0.75 0.70 0.77 0.85 0.87 0.94 1.02 30.00 0.97 1.06 1.15 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z2 A2&~B2 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.54 0.62 0.80 5.00 0.58 0.61 0.69 0.87 FUNCTION FALL 10.00 0.64 0.67 0.75 0.93 30.00 0.88 0.91 0.99 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0437 0.07 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.53 0.61 0.49 0.56 0.64 0.58 0.64 0.72 0.78 0.85 0.93 30.00 0.92 0.95 1.03 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z2 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z2 ~A2&B2 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.42 0.49 0.45 0.51 0.58 0.56 0.62 0.69 0.77 0.83 0.90 30.00 0.72 0.81 0.92 1.13 Rev.1.01.10 2 - 1011 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 8/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z3 A3&~B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.59 0.66 0.60 0.67 0.75 0.70 0.77 0.85 0.87 0.94 1.02 30.00 0.97 1.06 1.16 1.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z3 A3&~B3 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.54 0.62 0.80 5.00 0.58 0.61 0.69 0.87 FUNCTION FALL 10.00 0.65 0.68 0.76 0.94 30.00 0.88 0.91 0.99 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0437 0.07 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.46 0.53 0.61 0.49 0.56 0.64 0.57 0.64 0.72 0.78 0.84 0.92 30.00 0.92 0.94 1.02 1.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z3 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z3 ~A3&B3 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.42 0.48 0.44 0.51 0.57 0.56 0.62 0.68 0.76 0.82 0.89 30.00 0.72 0.80 0.92 1.12 Rev.1.01.10 2 - 1012 TC200G SERIES DATA SHEET YMUX24LP YMUX24LP 9/9 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION S->Z4 A4&~B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0437 0.07 PATH DELAY (ns) 1.00 5.00 10.00 0.52 0.58 0.66 0.60 0.67 0.75 0.70 0.77 0.85 0.87 0.94 1.02 30.00 0.97 1.06 1.15 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z4 A4&~B4 PATH DELAY (ns) LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 1.00 0.51 0.54 0.62 0.80 5.00 0.58 0.61 0.69 0.87 FUNCTION FALL 10.00 0.64 0.67 0.75 0.93 30.00 0.88 0.91 0.99 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0437 0.07 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION RISE PATH DELAY (ns) 1.00 5.00 10.00 0.47 0.53 0.61 0.49 0.56 0.64 0.58 0.64 0.72 0.78 0.85 0.93 30.00 0.92 0.95 1.03 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z4 0.0188 0.08 PATH CONDITION PATH CONDITION S->Z4 ~A4&B4 LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 FUNCTION FALL PATH DELAY (ns) 1.00 5.00 10.00 0.36 0.42 0.49 0.45 0.51 0.58 0.56 0.62 0.69 0.77 0.83 0.90 30.00 0.72 0.81 0.92 1.13 Rev.1.01.10 2 - 1013 TOSHIBA Chapter 3 I/O Macrocells TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 1 TOSHIBA 2 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index Alphanumeric Index CELL NAME BD2x BD2xODFS BD4x BD4Hx BD4Rx BD4xODFS BD8x BD8Hx BD8Rx BD8xODFS BD16x BD16Hx BD16Rx BD16xODFS BD24x BD24Hx BD24Rx BD24xODFS FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 2mA OPEN DRAIN with FAILSAFE 4mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 8mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 16mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 24mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE PAGE 3-1 6 10 15 20 25 29 34 39 44 48 53 58 63 67 72 77 82 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 3 Alphanumeric Index TOSHIBA CELL NAME BDPCIx BT2 BT2ODFS BT4 BT4H BT4R BT4ODFS BT8 BT8H BT8R BT8ODFS BT16 BT16H BT16R BT16ODFS BT24 BT24H BT24R BT24ODFS BTPCI B2 B4 B4H B4R B8 B8H B8R B16 B16H FUNCTION PCI ( Peripheral Component Interconnect ) BUS BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) OPEN DRAIN with FAILSAFE 4mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 8mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 16mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE 24mA HIGH-SPEED SLEW RATE CONTROL OPEN DRAIN with FAILSAFE PCI ( Peripheral Component Interconnect ) BUS TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) OUTPUT BUFFER ( 2mA DRIVE ) 4mA HIGH-SPEED SLEW RATE CONTROL 8mA HIGH-SPEED SLEW RATE CONTROL 16mA HIGH-SPEED 2mA PAGE 3 - 86 89 95 98 104 110 116 119 125 131 137 140 146 152 158 161 167 173 179 182 185 187 189 191 193 195 197 199 201 4 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index CELL NAME B16R B24 B24H B24R BPCI DRVC4x DRVC4xFS DRVC8x DRVC8xFS DRVC16x DRVC16xFS DRVSC4x DRVSC8x DRVSC16x DRVT4x DRVT4xFS DRVT8x DRVT8xFS DRVT16x DRVT16xFS IBUFx IBUFxFS IBUFNx IBUFNxFS IBUFNHx IBUFNHxFS IPCIx SMTCx FUNCTION SLEW RATE CONTROL 24mA HIGH-SPEED SLEW RATE CONTROL PCI ( Peripheral Component Interconnect ) BUS OUTPUT BUFFER CLOCK DRIVER with CMOS LEVEL INPUT BUFFER ( equal 4mA DRIVER ) with FAILSAFE ( equal 8mA DRIVER ) with FAILSAFE ( equal 16mA DRIVER ) with FAILSAFE CLOCK DRIVER with CMOS LEVEL SCHMITT INPUT BUFFER ( equal 4mA DRIVER ) ( equal 8mA DRIVER ) ( equal 16mA DRIVER ) CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER ( equal 4mA DRIVER ) with FAILSAFE ( equal 8mA DRIVER ) with FAILSAFE ( equal 16mA DRIVER ) with FAILSAFE CMOS LEVEL INPUT BUFFER with FAILSAFE CMOS LEVEL INVERTED INPUT BUFFER with FAILSAFE CMOS LEVEL INVERTED INPUT BUFFER HIGH-SPEED with FAILSAFE PCI ( Peripheral Component Interconnect ) BUS RECEIVER SCHMITT TRIGGER CMOS LEVEL INPUT BUFFER PAGE 3 - 203 205 207 209 211 213 216 219 222 225 228 231 234 237 240 243 246 249 252 255 258 261 264 267 270 273 276 278 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 5 Alphanumeric Index TOSHIBA CELL NAME SMTCxFS SMTTx SMTTxFS TLCHNx TLCHNxFS TLCHNHx TLCHNHxFS TLCHTHx TLCHTHxFS FUNCTION with FAILSAFE SCHMITT TRIGGER LVTTL LEVEL INPUT BUFFER with FAILSAFE LVTTL LEVEL INVERTED INPUT BUFFER with FAILSAFE LVTTL LEVEL INVERTED INPUT BUFFER HIGH-SPEED with FAILSAFE LVTTL LEVEL INPUT BUFFER with FAILSAFE PAGE 3 - 281 284 287 290 293 296 299 302 305 6 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TOSHIBA Alphanumeric Index I/O Macrocell Data Sheets ver. 1.10.5 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) 7 Alphanumeric Index TOSHIBA 8 TC200G/E SERIES MACROCELLS (Non-linear Delay Models) TC200G SERIES DATA SHEET BD2x CELL NAME BD2x FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 2mA BD2x CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD2C BD2CN BD2TH BD2TN BD2CNH BD2TNH BD2SC BD2ST PULL-DOWN BD2CD BD2CND BD2THD BD2TND BD2CNHD BD2TNHD BD2SCD BD2STD PULL-UP BD2CU BD2CNU BD2THU BD2TNU BD2CNHU BD2TNHU BD2SCU BD2STU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD2x IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD2x inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD2x port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 6.31 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3-1 TC200G SERIES DATA SHEET BD2x BD2x 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3-2 TC200G SERIES DATA SHEET BD2x BD2x 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 1.63 2.09 2.98 1.71 2.18 3.06 1.87 2.34 3.23 2.38 2.85 3.75 40.00 4.71 4.79 4.96 5.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 1.84 2.53 3.89 1.84 2.53 3.88 1.88 2.57 3.92 2.05 2.74 4.10 40.00 6.58 6.58 6.62 6.79 Rev.1.01.10 3-3 TC200G SERIES DATA SHEET BD2x BD2x 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 0.83 0.83 0.83 0.92 0.92 0.92 1.02 1.02 1.02 1.17 1.17 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0003 0.96 40.00 0.83 0.92 1.02 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 0.40 0.40 0.40 0.49 0.49 0.49 0.59 0.59 0.59 0.74 0.74 0.74 40.00 0.40 0.49 0.59 0.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 2.14 2.62 3.51 2.15 2.63 3.52 2.23 2.70 3.60 2.50 2.97 3.87 40.00 5.24 5.25 5.33 5.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 2.43 3.11 4.47 2.44 3.13 4.48 2.51 3.20 4.56 2.78 3.47 4.82 40.00 7.16 7.17 7.25 7.52 Rev.1.01.10 3-4 TC200G SERIES DATA SHEET BD2x BD2x 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 0.97 0.97 0.97 1.00 1.00 1.00 1.05 1.05 1.05 1.18 1.18 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0003 0.96 40.00 0.97 1.00 1.05 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 0.53 0.53 0.53 0.56 0.56 0.56 0.62 0.62 0.62 0.74 0.74 0.74 40.00 0.53 0.56 0.62 0.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 2.21 2.69 3.58 2.26 2.74 3.63 2.30 2.78 3.67 2.37 2.85 3.74 40.00 5.31 5.37 5.41 5.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 2.50 3.18 4.54 2.55 3.24 4.59 2.59 3.28 4.63 2.66 3.35 4.70 40.00 7.23 7.29 7.33 7.39 Rev.1.01.10 3-5 TC200G SERIES DATA SHEET BD2xODFS CELL NAME BD2xODFS FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 2mA OPEN DRAIN with FAILSAFE BD2xODFS CELL COUNT GATE 4 I/O 1 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL LVTTL LEVEL HIGH-SPEED CMOS LEVEL HIGH-SPEED LVTTL LEVEL CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER INVERT INVERT INVERT INVERT BD2CODFS BD2CNODFS BD2THODFS BD2TNODFS BD2CNHODFS BD2TNHODFS BD2SCODFS BD2STODFS LOGIC SYMBOL TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN TN IO L H L H X Hz X L Hz Note : IO is input when EN=H or TN=L EN BD2xODFS IO TN ZI PO PI Verilog-HDL DESCRIPTION BD2xODFS inst(IO,ZI,PO,EN,TN,PI); VHDL DESCRIPTION inst:BD2xODFS port map(IO,ZI,PO,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME EN TN PI (LU) LOAD 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3-6 TC200G SERIES DATA SHEET BD2xODFS BD2xODFS 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3-7 TC200G SERIES DATA SHEET BD2xODFS BD2xODFS 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 0.34 0.34 0.34 0.43 0.43 0.43 0.52 0.52 0.52 0.64 0.64 0.64 40.00 0.34 0.43 0.52 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0098 0.63 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 2.11 2.81 4.17 2.13 2.82 4.18 2.21 2.90 4.26 2.46 3.16 4.51 40.00 6.86 6.87 6.95 7.21 Rev.1.01.10 3-8 TC200G SERIES DATA SHEET BD2xODFS BD2xODFS 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 0.47 0.47 0.47 0.50 0.50 0.50 0.56 0.56 0.56 0.68 0.68 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 40.00 0.47 0.50 0.56 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0098 0.63 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 5.00 10.00 20.00 2.18 2.88 4.24 2.24 2.93 4.29 2.28 2.97 4.33 2.35 3.04 4.40 40.00 6.93 6.98 7.02 7.09 Rev.1.01.10 3-9 TC200G SERIES DATA SHEET BD4x CELL NAME BD4x FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 4mA BD4x CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD4C BD4CN BD4TH BD4TN BD4CNH BD4TNH BD4SC BD4ST PULL-DOWN BD4CD BD4CND BD4THD BD4TND BD4CNHD BD4TNHD BD4SCD BD4STD PULL-UP BD4CU BD4CNU BD4THU BD4TNU BD4CNHU BD4TNHU BD4SCU BD4STU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD4x IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD4x inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD4x port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 6.31 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 10 TC200G SERIES DATA SHEET BD4x BD4x 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 11 TC200G SERIES DATA SHEET BD4x BD4x 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.85 3.00 4.61 1.93 3.08 4.69 2.09 3.24 4.85 2.63 3.78 5.39 100.00 6.70 6.78 6.95 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.79 3.21 5.30 1.78 3.21 5.29 1.82 3.25 5.33 1.99 3.42 5.50 100.00 8.06 8.06 8.09 8.27 Rev.1.01.10 3 - 12 TC200G SERIES DATA SHEET BD4x BD4x 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.07 1.07 1.07 1.16 1.16 1.16 1.26 1.26 1.26 1.40 1.40 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.65 100.00 1.07 1.16 1.26 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.41 0.41 0.41 0.50 0.50 0.50 0.60 0.60 0.60 0.75 0.75 0.75 100.00 0.41 0.50 0.60 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.38 3.54 5.15 2.39 3.55 5.16 2.47 3.63 5.24 2.74 3.90 5.51 100.00 7.25 7.26 7.34 7.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.37 3.80 5.88 2.38 3.81 5.90 2.46 3.89 5.97 2.72 4.15 6.24 100.00 8.65 8.66 8.74 9.00 Rev.1.01.10 3 - 13 TC200G SERIES DATA SHEET BD4x BD4x 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.20 1.20 1.20 1.23 1.23 1.23 1.29 1.29 1.29 1.41 1.41 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.65 100.00 1.20 1.23 1.29 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.54 0.54 0.54 0.58 0.58 0.58 0.63 0.63 0.63 0.76 0.76 0.76 100.00 0.54 0.58 0.63 0.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.45 3.61 5.22 2.51 3.67 5.28 2.55 3.71 5.32 2.62 3.78 5.38 100.00 7.32 7.38 7.42 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.44 3.87 5.96 2.49 3.92 6.01 2.53 3.96 6.05 2.60 4.03 6.12 100.00 8.72 8.77 8.81 8.88 Rev.1.01.10 3 - 14 TC200G SERIES DATA SHEET BD4Hx CELL NAME BD4Hx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 4mA HIGH-SPEED BD4Hx CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD4HC BD4HCN BD4HTH BD4HTN BD4HCNH BD4HTNH BD4HSC BD4HST PULL-DOWN BD4HCD BD4HCND BD4HTHD BD4HTND BD4HCNHD BD4HTNHD BD4HSCD BD4HSTD PULL-UP BD4HCU BD4HCNU BD4HTHU BD4HTNU BD4HCNHU BD4HTNHU BD4HSCU BD4HSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD4Hx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD4Hx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD4Hx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 9.03 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 15 TC200G SERIES DATA SHEET BD4Hx BD4Hx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 16 TC200G SERIES DATA SHEET BD4Hx BD4Hx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.10 2.15 3.71 1.19 2.24 3.80 1.32 2.37 3.93 1.62 2.67 4.23 100.00 5.79 5.88 6.01 6.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.43 2.82 4.89 1.44 2.83 4.90 1.45 2.84 4.91 1.52 2.89 4.95 100.00 7.65 7.65 7.66 7.71 Rev.1.01.10 3 - 17 TC200G SERIES DATA SHEET BD4Hx BD4Hx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.97 0.97 0.97 1.06 1.06 1.06 1.17 1.17 1.17 1.34 1.34 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.50 100.00 0.97 1.06 1.17 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.52 0.52 0.52 0.61 0.61 0.61 0.71 0.71 0.71 0.87 0.87 0.87 100.00 0.52 0.61 0.71 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.67 2.73 4.29 1.68 2.74 4.30 1.76 2.81 4.38 2.03 3.09 4.65 100.00 6.37 6.38 6.46 6.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.07 3.46 5.53 2.08 3.47 5.54 2.15 3.55 5.62 2.42 3.81 5.89 100.00 8.29 8.30 8.38 8.65 Rev.1.01.10 3 - 18 TC200G SERIES DATA SHEET BD4Hx BD4Hx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.10 1.10 1.10 1.14 1.14 1.14 1.19 1.19 1.19 1.32 1.32 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.50 100.00 1.10 1.14 1.19 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.65 0.65 0.65 0.68 0.68 0.68 0.74 0.74 0.74 0.86 0.86 0.86 100.00 0.65 0.68 0.74 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.74 2.80 4.36 1.80 2.85 4.41 1.83 2.89 4.45 1.90 2.96 4.52 100.00 6.44 6.49 6.53 6.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.14 3.53 5.60 2.19 3.58 5.66 2.23 3.62 5.69 2.30 3.69 5.76 100.00 8.36 8.41 8.45 8.52 Rev.1.01.10 3 - 19 TC200G SERIES DATA SHEET BD4Rx CELL NAME BD4Rx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 4mA SLEW RATE CONTROL BD4Rx CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD4RC BD4RCN BD4RTH BD4RTN BD4RCNH BD4RTNH BD4RSC BD4RST PULL-DOWN BD4RCD BD4RCND BD4RTHD BD4RTND BD4RCNHD BD4RTNHD BD4RSCD BD4RSTD PULL-UP BD4RCU BD4RCNU BD4RTHU BD4RTNU BD4RCNHU BD4RTNHU BD4RSCU BD4RSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD4Rx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD4Rx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD4Rx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 7.58 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 20 TC200G SERIES DATA SHEET BD4Rx BD4Rx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 21 TC200G SERIES DATA SHEET BD4Rx BD4Rx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.52 4.10 6.26 2.61 4.20 6.36 2.79 4.37 6.53 3.39 4.98 7.14 100.00 8.90 9.00 9.18 9.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.43 5.68 8.75 3.48 5.73 8.80 3.62 5.87 8.94 4.08 6.33 9.40 100.00 12.52 12.57 12.71 13.17 Rev.1.01.10 3 - 22 TC200G SERIES DATA SHEET BD4Rx BD4Rx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.82 0.82 0.82 0.91 0.91 0.91 1.01 1.01 1.01 1.17 1.17 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0066 1.71 100.00 0.82 0.91 1.01 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.51 0.51 0.51 0.60 0.60 0.60 0.69 0.69 0.69 0.84 0.84 0.84 100.00 0.51 0.60 0.69 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 3.18 4.78 6.95 3.19 4.79 6.96 3.27 4.87 7.04 3.55 5.15 7.32 100.00 9.60 9.61 9.68 9.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 4.26 6.51 9.58 4.27 6.53 9.59 4.35 6.60 9.67 4.61 6.86 9.93 100.00 13.35 13.37 13.44 13.70 Rev.1.01.10 3 - 23 TC200G SERIES DATA SHEET BD4Rx BD4Rx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.95 0.95 0.95 0.99 0.99 0.99 1.04 1.04 1.04 1.18 1.18 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0066 1.71 100.00 0.95 0.99 1.04 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.64 0.64 0.64 0.67 0.67 0.67 0.73 0.73 0.73 0.85 0.85 0.85 100.00 0.64 0.67 0.73 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 3.25 4.85 7.02 3.31 4.90 7.07 3.35 4.94 7.11 3.42 5.01 7.18 100.00 9.67 9.72 9.76 9.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 4.33 6.58 9.65 4.39 6.64 9.71 4.43 6.68 9.75 4.49 6.75 9.81 100.00 13.42 13.48 13.52 13.59 Rev.1.01.10 3 - 24 TC200G SERIES DATA SHEET BD4xODFS CELL NAME BD4xODFS FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 4mA OPEN DRAIN with FAILSAFE BD4xODFS CELL COUNT GATE 4 I/O 1 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL LVTTL LEVEL HIGH-SPEED CMOS LEVEL HIGH-SPEED LVTTL LEVEL CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER INVERT INVERT INVERT INVERT BD4CODFS BD4CNODFS BD4THODFS BD4TNODFS BD4CNHODFS BD4TNHODFS BD4SCODFS BD4STODFS LOGIC SYMBOL TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN TN IO L H L H X Hz X L Hz Note : IO is input when EN=H or TN=L EN BD4xODFS IO TN ZI PO PI Verilog-HDL DESCRIPTION BD4xODFS inst(IO,ZI,PO,EN,TN,PI); VHDL DESCRIPTION inst:BD4xODFS port map(IO,ZI,PO,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME EN TN PI (LU) LOAD 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 25 TC200G SERIES DATA SHEET BD4xODFS BD4xODFS 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 26 TC200G SERIES DATA SHEET BD4xODFS BD4xODFS 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.35 0.35 0.35 0.44 0.44 0.44 0.53 0.53 0.53 0.66 0.66 0.66 100.00 0.35 0.44 0.53 0.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.48 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.16 3.59 5.68 2.17 3.61 5.69 2.25 3.69 5.77 2.50 3.94 6.03 100.00 8.44 8.46 8.54 8.79 Rev.1.01.10 3 - 27 TC200G SERIES DATA SHEET BD4xODFS BD4xODFS 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.48 0.48 0.48 0.52 0.52 0.52 0.57 0.57 0.57 0.69 0.69 0.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 100.00 0.48 0.52 0.57 0.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0050 0.48 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.23 3.66 5.75 2.28 3.72 5.80 2.32 3.76 5.84 2.39 3.83 5.91 100.00 8.51 8.57 8.61 8.67 Rev.1.01.10 3 - 28 TC200G SERIES DATA SHEET BD8x CELL NAME BD8x FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 8mA BD8x CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD8C BD8CN BD8TH BD8TN BD8CNH BD8TNH BD8SC BD8ST PULL-DOWN BD8CD BD8CND BD8THD BD8TND BD8CNHD BD8TNHD BD8SCD BD8STD PULL-UP BD8CU BD8CNU BD8THU BD8TNU BD8CNHU BD8TNHU BD8SCU BD8STU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD8x IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD8x inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD8x port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 6.31 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 29 TC200G SERIES DATA SHEET BD8x BD8x 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 30 TC200G SERIES DATA SHEET BD8x BD8x 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.93 2.69 3.62 2.01 2.77 3.71 2.17 2.93 3.86 2.71 3.48 4.41 100.00 4.76 4.84 5.00 5.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.57 2.36 3.44 1.58 2.36 3.44 1.61 2.39 3.47 1.79 2.56 3.64 100.00 4.85 4.85 4.88 5.05 Rev.1.01.10 3 - 31 TC200G SERIES DATA SHEET BD8x BD8x 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.67 1.67 1.67 1.75 1.75 1.75 1.85 1.85 1.85 2.00 2.00 2.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.61 100.00 1.67 1.75 1.85 2.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.44 0.44 0.44 0.53 0.53 0.53 0.63 0.63 0.63 0.78 0.78 0.78 100.00 0.44 0.53 0.63 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.46 3.24 4.18 2.47 3.25 4.19 2.55 3.33 4.27 2.81 3.59 4.53 100.00 5.32 5.33 5.40 5.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.10 2.92 4.02 2.11 2.93 4.03 2.19 3.01 4.11 2.45 3.27 4.37 100.00 5.43 5.44 5.52 5.78 Rev.1.01.10 3 - 32 TC200G SERIES DATA SHEET BD8x BD8x 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.80 1.80 1.80 1.83 1.83 1.83 1.89 1.89 1.89 2.01 2.01 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.61 100.00 1.80 1.83 1.89 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.57 0.57 0.57 0.60 0.60 0.60 0.66 0.66 0.66 0.78 0.78 0.78 100.00 0.57 0.60 0.66 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.53 3.31 4.25 2.58 3.36 4.30 2.62 3.40 4.34 2.69 3.47 4.41 100.00 5.39 5.44 5.48 5.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.17 2.99 4.09 2.23 3.04 4.14 2.27 3.08 4.18 2.33 3.15 4.25 100.00 5.50 5.55 5.59 5.66 Rev.1.01.10 3 - 33 TC200G SERIES DATA SHEET BD8Hx CELL NAME BD8Hx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 8mA HIGH-SPEED BD8Hx CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD8HC BD8HCN BD8HTH BD8HTN BD8HCNH BD8HTNH BD8HSC BD8HST PULL-DOWN BD8HCD BD8HCND BD8HTHD BD8HTND BD8HCNHD BD8HTNHD BD8HSCD BD8HSTD PULL-UP BD8HCU BD8HCNU BD8HTHU BD8HTNU BD8HCNHU BD8HTNHU BD8HSCU BD8HSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD8Hx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD8Hx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD8Hx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 9.03 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 34 TC200G SERIES DATA SHEET BD8Hx BD8Hx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 35 TC200G SERIES DATA SHEET BD8Hx BD8Hx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.93 1.50 2.31 1.02 1.59 2.39 1.17 1.74 2.54 1.53 2.10 2.90 100.00 3.36 3.44 3.59 3.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.12 1.83 2.86 1.13 1.84 2.87 1.16 1.85 2.88 1.27 1.95 2.96 100.00 4.24 4.25 4.26 4.33 Rev.1.01.10 3 - 36 TC200G SERIES DATA SHEET BD8Hx BD8Hx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.44 1.44 1.44 1.53 1.53 1.53 1.64 1.64 1.64 1.81 1.81 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.39 100.00 1.44 1.53 1.64 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.55 0.55 0.55 0.64 0.64 0.64 0.74 0.74 0.74 0.90 0.90 0.90 100.00 0.55 0.64 0.74 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.51 2.10 2.90 1.52 2.11 2.91 1.60 2.18 2.99 1.87 2.46 3.27 100.00 3.95 3.97 4.04 4.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.70 2.43 3.48 1.71 2.44 3.50 1.79 2.52 3.57 2.06 2.79 3.84 100.00 4.87 4.88 4.96 5.22 Rev.1.01.10 3 - 37 TC200G SERIES DATA SHEET BD8Hx BD8Hx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.58 1.58 1.58 1.61 1.61 1.61 1.66 1.66 1.66 1.79 1.79 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.39 100.00 1.58 1.61 1.66 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.68 0.68 0.68 0.71 0.71 0.71 0.77 0.77 0.77 0.89 0.89 0.89 100.00 0.68 0.71 0.77 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.58 2.17 2.97 1.64 2.22 3.03 1.68 2.26 3.07 1.74 2.33 3.14 100.00 4.03 4.08 4.12 4.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.77 2.50 3.56 1.83 2.56 3.61 1.86 2.60 3.65 1.93 2.67 3.72 100.00 4.94 4.99 5.03 5.10 Rev.1.01.10 3 - 38 TC200G SERIES DATA SHEET BD8Rx CELL NAME BD8Rx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 8mA SLEW RATE CONTROL BD8Rx CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD8RC BD8RCN BD8RTH BD8RTN BD8RCNH BD8RTNH BD8RSC BD8RST PULL-DOWN BD8RCD BD8RCND BD8RTHD BD8RTND BD8RCNHD BD8RTNHD BD8RSCD BD8RSTD PULL-UP BD8RCU BD8RCNU BD8RTHU BD8RTNU BD8RCNHU BD8RTNHU BD8RSCU BD8RSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD8Rx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD8Rx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD8Rx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 7.58 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 39 TC200G SERIES DATA SHEET BD8Rx BD8Rx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 40 TC200G SERIES DATA SHEET BD8Rx BD8Rx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.56 3.57 4.84 2.66 3.67 4.95 2.84 3.85 5.12 3.43 4.45 5.72 100.00 6.40 6.51 6.68 7.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.24 4.63 6.40 3.28 4.68 6.44 3.41 4.80 6.57 3.85 5.24 7.01 100.00 8.57 8.62 8.74 9.18 Rev.1.01.10 3 - 41 TC200G SERIES DATA SHEET BD8Rx BD8Rx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.19 1.19 1.19 1.28 1.28 1.28 1.39 1.39 1.39 1.55 1.55 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0035 1.46 100.00 1.19 1.28 1.39 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.54 0.54 0.54 0.63 0.63 0.63 0.73 0.73 0.73 0.87 0.87 0.87 100.00 0.54 0.63 0.73 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 3.23 4.26 5.54 3.25 4.27 5.56 3.32 4.35 5.63 3.61 4.63 5.92 100.00 7.11 7.12 7.20 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 4.05 5.44 7.20 4.06 5.45 7.22 4.14 5.53 7.29 4.40 5.79 7.56 100.00 9.38 9.39 9.47 9.73 Rev.1.01.10 3 - 42 TC200G SERIES DATA SHEET BD8Rx BD8Rx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.32 1.32 1.32 1.36 1.36 1.36 1.42 1.42 1.42 1.56 1.56 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0035 1.46 100.00 1.32 1.36 1.42 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.67 0.67 0.67 0.71 0.71 0.71 0.76 0.76 0.76 0.89 0.89 0.89 100.00 0.67 0.71 0.76 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 3.31 4.33 5.61 3.36 4.39 5.67 3.40 4.43 5.71 3.47 4.50 5.78 100.00 7.18 7.23 7.27 7.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 4.12 5.51 7.28 4.17 5.56 7.33 4.21 5.60 7.37 4.28 5.67 7.44 100.00 9.45 9.50 9.54 9.61 Rev.1.01.10 3 - 43 TC200G SERIES DATA SHEET BD8xODFS CELL NAME BD8xODFS FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 8mA OPEN DRAIN with FAILSAFE BD8xODFS CELL COUNT GATE 4 I/O 1 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL LVTTL LEVEL HIGH-SPEED CMOS LEVEL HIGH-SPEED LVTTL LEVEL CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER INVERT INVERT INVERT INVERT BD8CODFS BD8CNODFS BD8THODFS BD8TNODFS BD8CNHODFS BD8TNHODFS BD8SCODFS BD8STODFS LOGIC SYMBOL TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN TN IO L H L H X Hz X L Hz Note : IO is input when EN=H or TN=L EN BD8xODFS IO TN ZI PO PI Verilog-HDL DESCRIPTION BD8xODFS inst(IO,ZI,PO,EN,TN,PI); VHDL DESCRIPTION inst:BD8xODFS port map(IO,ZI,PO,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME EN TN PI (LU) LOAD 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 44 TC200G SERIES DATA SHEET BD8xODFS BD8xODFS 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 45 TC200G SERIES DATA SHEET BD8xODFS BD8xODFS 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.38 0.38 0.38 0.46 0.46 0.46 0.55 0.55 0.55 0.68 0.68 0.68 100.00 0.38 0.46 0.55 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0024 0.57 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 1.93 2.76 3.87 1.94 2.77 3.88 2.02 2.86 3.96 2.28 3.11 4.21 100.00 5.28 5.29 5.37 5.62 Rev.1.01.10 3 - 46 TC200G SERIES DATA SHEET BD8xODFS BD8xODFS 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 0.51 0.51 0.51 0.54 0.54 0.54 0.60 0.60 0.60 0.72 0.72 0.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 100.00 0.51 0.54 0.60 0.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0024 0.57 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 10.00 30.00 60.00 2.00 2.83 3.94 2.05 2.89 3.99 2.09 2.93 4.03 2.16 2.99 4.10 100.00 5.35 5.40 5.44 5.51 Rev.1.01.10 3 - 47 TC200G SERIES DATA SHEET BD16x CELL NAME BD16x FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 16mA BD16x CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD16C BD16CN BD16TH BD16TN BD16CNH BD16TNH BD16SC BD16ST PULL-DOWN BD16CD BD16CND BD16THD BD16TND BD16CNHD BD16TNHD BD16SCD BD16STD PULL-UP BD16CU BD16CNU BD16THU BD16TNU BD16CNHU BD16TNHU BD16SCU BD16STU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD16x IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD16x inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD16x port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 7.75 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 48 TC200G SERIES DATA SHEET BD16x BD16x 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 49 TC200G SERIES DATA SHEET BD16x BD16x 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.72 2.44 3.25 3.98 1.80 2.52 3.33 4.06 1.95 2.67 3.48 4.21 2.47 3.20 4.00 4.73 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.30 2.01 2.93 3.82 1.31 2.01 2.93 3.82 1.35 2.05 2.96 3.85 1.53 2.22 3.14 4.02 Rev.1.01.10 3 - 50 TC200G SERIES DATA SHEET BD16x BD16x 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.50 1.50 1.50 1.50 1.58 1.58 1.58 1.58 1.68 1.68 1.68 1.68 1.83 1.83 1.83 1.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.50 0.50 0.50 0.50 0.59 0.59 0.59 0.59 0.69 0.69 0.69 0.69 0.84 0.84 0.84 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.23 2.97 3.78 4.51 2.24 2.98 3.79 4.52 2.32 3.06 3.87 4.60 2.58 3.33 4.14 4.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.88 2.63 3.57 4.46 1.90 2.65 3.58 4.47 1.97 2.72 3.65 4.55 2.24 2.99 3.92 4.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.52 Rev.1.01.10 3 - 51 TC200G SERIES DATA SHEET BD16x BD16x 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.63 1.63 1.63 1.63 1.66 1.66 1.66 1.66 1.72 1.72 1.72 1.72 1.84 1.84 1.84 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.63 0.63 0.63 0.63 0.66 0.66 0.66 0.66 0.72 0.72 0.72 0.72 0.84 0.84 0.84 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.30 3.04 3.85 4.58 2.35 3.09 3.90 4.64 2.39 3.13 3.94 4.68 2.46 3.20 4.01 4.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.96 2.71 3.64 4.53 2.01 2.76 3.69 4.58 2.05 2.80 3.73 4.62 2.12 2.87 3.80 4.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.52 Rev.1.01.10 3 - 52 TC200G SERIES DATA SHEET BD16Hx CELL NAME BD16Hx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 16mA HIGH-SPEED BD16Hx CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD16HC BD16HCN BD16HTH BD16HTN BD16HCNH BD16HTNH BD16HSC BD16HST PULL-DOWN BD16HCD BD16HCND BD16HTHD BD16HTND BD16HCNHD BD16HTNHD BD16HSCD BD16HSTD PULL-UP BD16HCU BD16HCNU BD16HTHU BD16HTNU BD16HCNHU BD16HTNHU BD16HSCU BD16HSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD16Hx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD16Hx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD16Hx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 10.65 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 53 TC200G SERIES DATA SHEET BD16Hx BD16Hx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 54 TC200G SERIES DATA SHEET BD16Hx BD16Hx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.78 1.31 1.99 2.65 0.87 1.39 2.07 2.74 1.01 1.54 2.22 2.88 1.36 1.89 2.58 3.24 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.90 1.52 2.38 3.23 0.91 1.52 2.39 3.23 0.94 1.55 2.40 3.25 1.06 1.65 2.50 3.35 Rev.1.01.10 3 - 55 TC200G SERIES DATA SHEET BD16Hx BD16Hx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.33 1.33 1.33 1.33 1.42 1.42 1.42 1.42 1.53 1.53 1.53 1.53 1.73 1.73 1.73 1.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.66 0.66 0.66 0.66 0.75 0.75 0.75 0.75 0.87 0.87 0.87 0.87 1.06 1.06 1.06 1.06 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.43 1.97 2.66 3.32 1.44 1.98 2.67 3.33 1.51 2.06 2.74 3.41 1.79 2.34 3.02 3.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 2.31 3.20 4.07 1.67 2.32 3.21 4.08 1.74 2.40 3.28 4.15 2.02 2.68 3.56 4.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.28 Rev.1.01.10 3 - 56 TC200G SERIES DATA SHEET BD16Hx BD16Hx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.46 1.46 1.46 1.46 1.49 1.49 1.49 1.49 1.55 1.55 1.55 1.55 1.67 1.67 1.67 1.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.79 0.79 0.79 0.79 0.83 0.83 0.83 0.83 0.88 0.88 0.88 0.88 1.01 1.01 1.01 1.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.50 2.04 2.73 3.39 1.55 2.10 2.78 3.45 1.59 2.14 2.82 3.49 1.66 2.20 2.89 3.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.73 2.39 3.27 4.14 1.78 2.44 3.32 4.19 1.82 2.48 3.36 4.23 1.89 2.55 3.43 4.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.28 Rev.1.01.10 3 - 57 TC200G SERIES DATA SHEET BD16Rx CELL NAME BD16Rx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 16mA SLEW RATE CONTROL BD16Rx CELL COUNT GATE 4 I/O 1 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD16RC BD16RCN BD16RTH BD16RTN BD16RCNH BD16RTNH BD16RSC BD16RST PULL-DOWN BD16RCD BD16RCND BD16RTHD BD16RTND BD16RCNHD BD16RTNHD BD16RSCD BD16RSTD PULL-UP BD16RCU BD16RCNU BD16RTHU BD16RTNU BD16RCNHU BD16RTNHU BD16RSCU BD16RSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD16Rx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD16Rx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD16Rx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 8.93 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 58 TC200G SERIES DATA SHEET BD16Rx BD16Rx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 59 TC200G SERIES DATA SHEET BD16Rx BD16Rx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.25 3.22 4.33 5.34 2.37 3.34 4.45 5.46 2.57 3.54 4.65 5.66 3.24 4.21 5.32 6.32 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.77 4.02 5.52 6.90 2.82 4.08 5.57 6.96 2.93 4.19 5.69 7.07 3.28 4.55 6.05 7.44 Rev.1.01.10 3 - 60 TC200G SERIES DATA SHEET BD16Rx BD16Rx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.02 2.02 2.02 2.02 2.12 2.12 2.12 2.12 2.23 2.23 2.23 2.23 2.40 2.40 2.40 2.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.61 0.61 0.61 0.61 0.70 0.70 0.70 0.70 0.80 0.80 0.80 0.80 0.95 0.95 0.95 0.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.90 3.89 5.01 6.02 2.91 3.91 5.02 6.03 2.99 3.98 5.10 6.11 3.27 4.27 5.38 6.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.12 4.40 5.90 7.28 3.14 4.41 5.91 7.30 3.21 4.49 5.99 7.37 3.48 4.75 6.25 7.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0018 1.13 Rev.1.01.10 3 - 61 TC200G SERIES DATA SHEET BD16Rx BD16Rx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.16 2.16 2.16 2.16 2.20 2.20 2.20 2.20 2.26 2.26 2.26 2.26 2.41 2.41 2.41 2.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.74 0.74 0.74 0.74 0.77 0.77 0.77 0.77 0.83 0.83 0.83 0.83 0.95 0.95 0.95 0.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.97 3.96 5.08 6.09 3.02 4.02 5.13 6.14 3.06 4.06 5.17 6.18 3.13 4.13 5.24 6.25 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.20 4.47 5.97 7.36 3.25 4.52 6.02 7.41 3.29 4.56 6.06 7.45 3.36 4.63 6.13 7.52 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0018 1.13 Rev.1.01.10 3 - 62 TC200G SERIES DATA SHEET BD16xODFS CELL NAME BD16xODFS FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 16mA OPEN DRAIN with FAILSAFE BD16xODFS CELL COUNT GATE 4 I/O 1 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL LVTTL LEVEL HIGH-SPEED CMOS LEVEL HIGH-SPEED LVTTL LEVEL CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER INVERT INVERT INVERT INVERT BD16CODFS BD16CNODFS BD16THODFS BD16TNODFS BD16CNHODFS BD16TNHODFS BD16SCODFS BD16STODFS LOGIC SYMBOL TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN TN IO L H L H X Hz X L Hz Note : IO is input when EN=H or TN=L EN BD16xODFS IO TN ZI PO PI Verilog-HDL DESCRIPTION BD16xODFS inst(IO,ZI,PO,EN,TN,PI); VHDL DESCRIPTION inst:BD16xODFS port map(IO,ZI,PO,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME EN TN PI (LU) LOAD 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 63 TC200G SERIES DATA SHEET BD16xODFS BD16xODFS 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 64 TC200G SERIES DATA SHEET BD16xODFS BD16xODFS 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.44 0.44 0.44 0.44 0.52 0.52 0.52 0.52 0.61 0.61 0.61 0.61 0.74 0.74 0.74 0.74 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.75 2.51 3.44 4.33 1.76 2.52 3.45 4.34 1.84 2.60 3.53 4.42 2.09 2.85 3.79 4.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.48 Rev.1.01.10 3 - 65 TC200G SERIES DATA SHEET BD16xODFS BD16xODFS 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.57 0.57 0.57 0.57 0.60 0.60 0.60 0.60 0.66 0.66 0.66 0.66 0.78 0.78 0.78 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.82 2.58 3.51 4.40 1.87 2.63 3.56 4.46 1.91 2.67 3.60 4.49 1.98 2.74 3.67 4.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.48 Rev.1.01.10 3 - 66 TC200G SERIES DATA SHEET BD24x CELL NAME BD24x FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 24mA BD24x CELL COUNT GATE 4 I/O 2 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD24C BD24CN BD24TH BD24TN BD24CNH BD24TNH BD24SC BD24ST PULL-DOWN BD24CD BD24CND BD24THD BD24TND BD24CNHD BD24TNHD BD24SCD BD24STD PULL-UP BD24CU BD24CNU BD24THU BD24TNU BD24CNHU BD24TNHU BD24SCU BD24STU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD24x IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD24x inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD24x port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 13.11 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 67 TC200G SERIES DATA SHEET BD24x BD24x 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 68 TC200G SERIES DATA SHEET BD24x BD24x 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.60 2.15 2.75 3.28 1.68 2.23 2.83 3.36 1.83 2.39 2.99 3.51 2.36 2.92 3.52 4.04 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.23 1.73 2.37 2.97 1.24 1.73 2.36 2.97 1.28 1.77 2.40 3.00 1.46 1.94 2.57 3.17 Rev.1.01.10 3 - 69 TC200G SERIES DATA SHEET BD24x BD24x 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 1.66 1.66 1.66 1.75 1.75 1.75 1.75 1.87 1.87 1.87 1.87 2.09 2.09 2.09 2.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.68 0.68 0.68 0.68 0.77 0.77 0.77 0.77 0.89 0.89 0.89 0.89 1.11 1.11 1.11 1.11 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.38 2.96 3.57 4.10 2.39 2.97 3.58 4.11 2.46 3.04 3.65 4.18 2.74 3.32 3.93 4.46 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.12 2.67 3.32 3.93 2.14 2.68 3.34 3.95 2.20 2.75 3.41 4.02 2.48 3.03 3.69 4.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.50 Rev.1.01.10 3 - 70 TC200G SERIES DATA SHEET BD24x BD24x 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.80 1.80 1.80 1.80 1.83 1.83 1.83 1.83 1.88 1.88 1.88 1.88 2.01 2.01 2.01 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.81 0.81 0.81 0.81 0.84 0.84 0.84 0.84 0.90 0.90 0.90 0.90 1.03 1.03 1.03 1.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.45 3.03 3.64 4.17 2.51 3.09 3.70 4.23 2.55 3.13 3.74 4.27 2.61 3.19 3.80 4.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.20 2.75 3.40 4.01 2.25 2.80 3.45 4.06 2.29 2.84 3.49 4.10 2.36 2.91 3.56 4.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.50 Rev.1.01.10 3 - 71 TC200G SERIES DATA SHEET BD24Hx CELL NAME BD24Hx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 24mA HIGH-SPEED BD24Hx CELL COUNT GATE 4 I/O 2 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD24HC BD24HCN BD24HTH BD24HTN BD24HCNH BD24HTNH BD24HSC BD24HST PULL-DOWN BD24HCD BD24HCND BD24HTHD BD24HTND BD24HCNHD BD24HTNHD BD24HSCD BD24HSTD PULL-UP BD24HCU BD24HCNU BD24HTHU BD24HTNU BD24HCNHU BD24HTNHU BD24HSCU BD24HSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD24Hx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD24Hx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD24Hx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 18.71 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 72 TC200G SERIES DATA SHEET BD24Hx BD24Hx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 73 TC200G SERIES DATA SHEET BD24Hx BD24Hx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.71 1.08 1.55 2.00 0.79 1.16 1.63 2.08 0.94 1.31 1.78 2.23 1.29 1.67 2.14 2.59 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.85 1.27 1.85 2.42 0.86 1.27 1.85 2.42 0.89 1.29 1.87 2.44 1.02 1.40 1.96 2.52 Rev.1.01.10 3 - 74 TC200G SERIES DATA SHEET BD24Hx BD24Hx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.51 1.51 1.51 1.51 1.60 1.60 1.60 1.60 1.73 1.73 1.73 1.73 2.00 2.00 2.00 2.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.92 0.92 0.92 0.92 1.01 1.01 1.01 1.01 1.15 1.15 1.15 1.15 1.41 1.41 1.41 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 2.06 2.54 3.00 1.68 2.08 2.56 3.01 1.74 2.14 2.62 3.07 2.02 2.42 2.90 3.36 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.99 2.45 3.05 3.63 2.01 2.47 3.06 3.65 2.07 2.53 3.13 3.71 2.35 2.81 3.41 3.99 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.31 Rev.1.01.10 3 - 75 TC200G SERIES DATA SHEET BD24Hx BD24Hx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.64 1.64 1.64 1.64 1.68 1.68 1.68 1.68 1.73 1.73 1.73 1.73 1.86 1.86 1.86 1.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.06 1.06 1.06 1.06 1.09 1.09 1.09 1.09 1.15 1.15 1.15 1.15 1.27 1.27 1.27 1.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.74 2.14 2.62 3.07 1.79 2.19 2.67 3.13 1.83 2.23 2.71 3.17 1.90 2.30 2.78 3.23 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.07 2.53 3.13 3.71 2.12 2.58 3.18 3.76 2.16 2.62 3.22 3.80 2.23 2.69 3.29 3.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.31 Rev.1.01.10 3 - 76 TC200G SERIES DATA SHEET BD24Rx CELL NAME BD24Rx FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 24mA SLEW RATE CONTROL BD24Rx CELL COUNT GATE 4 I/O 2 1/5 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL INVERT no resistor BD24RC BD24RCN BD24RTH BD24RTN BD24RCNH BD24RTNH BD24RSC BD24RST PULL-DOWN BD24RCD BD24RCND BD24RTHD BD24RTND BD24RCNHD BD24RTNHD BD24RSCD BD24RSTD PULL-UP BD24RCU BD24RCNU BD24RTHU BD24RTNU BD24RCNHU BD24RTNHU BD24RSCU BD24RSTU LVTTL LEVEL INVERT HIGH-SPEED CMOS LEVEL INVERT HIGH-SPEED LVTTL LEVEL INVERT CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER LOGIC SYMBOL A TN ZI PO EN BD24Rx IO TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A TN IO L L H L L H H H H X X Hz X X L Hz Note : IO is input when EN=H or TN=L PI Verilog-HDL DESCRIPTION BD24Rx inst(IO,ZI,PO,A,EN,TN,PI); VHDL DESCRIPTION inst:BD24Rx port map(IO,ZI,PO,A,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME A EN TN PI (LU) LOAD 15.44 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 77 TC200G SERIES DATA SHEET BD24Rx BD24Rx 2/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 78 TC200G SERIES DATA SHEET BD24Rx BD24Rx 3/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.11 2.84 3.65 4.38 2.23 2.96 3.77 4.49 2.42 3.15 3.96 4.68 3.06 3.79 4.60 5.32 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.57 3.52 4.61 5.59 2.62 3.58 4.66 5.65 2.74 3.69 4.78 5.76 3.13 4.09 5.17 6.15 Rev.1.01.10 3 - 79 TC200G SERIES DATA SHEET BD24Rx BD24Rx 4/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.70 1.70 1.70 1.70 1.80 1.80 1.80 1.80 1.93 1.93 1.93 1.93 2.16 2.16 2.16 2.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.82 0.82 0.82 0.82 0.91 0.91 0.91 0.91 1.03 1.03 1.03 1.03 1.24 1.24 1.24 1.24 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.11 3.87 4.70 5.42 3.13 3.89 4.71 5.43 3.19 3.96 4.78 5.50 3.48 4.24 5.06 5.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.46 4.42 5.50 6.48 3.48 4.43 5.52 6.50 3.54 4.50 5.58 6.56 3.82 4.78 5.86 6.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 1.14 Rev.1.01.10 3 - 80 TC200G SERIES DATA SHEET BD24Rx BD24Rx 5/5 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --1-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.84 1.84 1.84 1.84 1.88 1.88 1.88 1.88 1.94 1.94 1.94 1.94 2.09 2.09 2.09 2.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.96 0.96 0.96 0.96 0.99 0.99 0.99 0.99 1.05 1.05 1.05 1.05 1.17 1.17 1.17 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-1 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.19 3.95 4.77 5.49 3.24 4.00 4.82 5.55 3.28 4.04 4.86 5.59 3.35 4.11 4.93 5.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.54 4.49 5.58 6.56 3.59 4.54 5.63 6.61 3.63 4.59 5.67 6.65 3.70 4.65 5.74 6.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 1.14 Rev.1.01.10 3 - 81 TC200G SERIES DATA SHEET BD24xODFS CELL NAME BD24xODFS FUNCTION BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) 24mA OPEN DRAIN with FAILSAFE BD24xODFS CELL COUNT GATE 4 I/O 2 1/4 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME CMOS LEVEL LVTTL LEVEL HIGH-SPEED CMOS LEVEL HIGH-SPEED LVTTL LEVEL CMOS SCHMITT TRIGGER LVTTL SCHMITT TRIGGER INVERT INVERT INVERT INVERT BD24CODFS BD24CNODFS BD24THODFS BD24TNODFS BD24CNHODFS BD24TNHODFS BD24SCODFS BD24STODFS LOGIC SYMBOL TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN TN IO L H L H X Hz X L Hz Note : IO is input when EN=H or TN=L EN BD24xODFS IO TN ZI PO PI Verilog-HDL DESCRIPTION BD24xODFS inst(IO,ZI,PO,EN,TN,PI); VHDL DESCRIPTION inst:BD24xODFS port map(IO,ZI,PO,EN,TN,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME EN TN PI (LU) LOAD 0.98 1.00 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 312.6 PO 34.3 Rev.1.01.10 3 - 82 TC200G SERIES DATA SHEET BD24xODFS BD24xODFS 2/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL ZI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 83 TC200G SERIES DATA SHEET BD24xODFS BD24xODFS 3/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.62 0.62 0.62 0.62 0.71 0.71 0.71 0.71 0.83 0.83 0.83 0.83 1.03 1.03 1.03 1.03 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.96 2.53 3.19 3.80 1.98 2.54 3.20 3.81 2.05 2.61 3.27 3.88 2.33 2.89 3.55 4.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.48 Rev.1.01.10 3 - 84 TC200G SERIES DATA SHEET BD24xODFS BD24xODFS 4/4 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --0-Z CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.75 0.75 0.75 0.75 0.79 0.79 0.79 0.79 0.84 0.84 0.84 0.84 0.97 0.97 0.97 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL TN->IO --Z-0 CMOS LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.04 2.60 3.26 3.87 2.09 2.66 3.31 3.93 2.13 2.70 3.35 3.96 2.20 2.76 3.42 4.03 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0008 0.48 Rev.1.01.10 3 - 85 TC200G SERIES DATA SHEET BDPCIx CELL NAME BDPCIx FUNCTION PCI ( Peripheral Component Interconnect ) BUS BIDIRECTIONAL OUTPUT BUFFER ( LOW ENABLE ) BDPCIx CELL COUNT GATE 0 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister BDPCI PULL-DOWN BDPCID PULL-UP BDPCIU LOGIC SYMBOL TRUTH TABLE (OUTPUT BUFFER) INPUT OUTPUT EN A IO L L L L H H H X Hz Note : IO is input when EN=H EN BDPCIx IO A ZI Verilog-HDL DESCRIPTION BDPCIx inst(IO,ZI,A,EN); VHDL DESCRIPTION inst:BDPCIx port map(IO,ZI,A,EN); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE ZI 12064.0 (LU*MHz) INPUT LOAD PIN NAME A EN (LU) LOAD 3.92 3.97 OUTPUT DRIVE PIN NAME DRIVE (LU) ZI 411.4 Rev.1.01.08 3 - 86 TC200G SERIES DATA SHEET BDPCIx BDPCIx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->IO --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 0.96 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.84 2.77 3.84 4.84 1.93 2.86 3.93 4.93 2.10 3.02 4.09 5.09 2.64 3.57 4.65 5.65 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.75 PATH CONDITION PATH CONDITION FUNCTION A->IO --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.71 2.51 3.49 4.41 1.74 2.54 3.51 4.43 1.80 2.59 3.57 4.49 2.03 2.84 3.82 4.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.75 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --1-Z TTL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.01 2.01 2.01 2.01 2.08 2.08 2.08 2.08 2.15 2.15 2.15 2.15 2.28 2.28 2.28 2.28 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --0-Z TTL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.15 0.15 0.15 0.15 0.24 0.24 0.24 0.24 0.37 0.37 0.37 0.37 0.56 0.56 0.56 0.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 0.96 Rev.1.01.08 3 - 87 TC200G SERIES DATA SHEET BDPCIx BDPCIx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-1 TTL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.88 2.84 3.93 4.93 1.92 2.88 3.97 4.97 1.98 2.94 4.03 5.03 2.11 3.07 4.16 5.16 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0016 0.96 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL EN->IO --Z-0 TTL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.62 2.49 3.49 4.41 1.62 2.49 3.49 4.41 1.64 2.50 3.50 4.42 1.75 2.61 3.61 4.54 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) IO 0.0012 0.75 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.25 0.32 0.38 0.25 0.31 0.38 0.26 0.32 0.39 0.26 0.33 0.39 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0114 0.09 70.00 0.55 0.55 0.55 0.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) ZI 0.0037 0.14 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL IO->ZI --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 15.00 30.00 0.29 0.35 0.40 0.31 0.37 0.43 0.38 0.44 0.49 0.62 0.68 0.73 70.00 0.51 0.54 0.60 0.85 Rev.1.01.08 3 - 88 TC200G SERIES DATA SHEET BT2 CELL NAME BT2 FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 2mA BT2 CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT2 Z TN Verilog-HDL DESCRIPTION BT2 inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT2 port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 6.31 0.98 1.00 Rev.1.01.10 3 - 89 TC200G SERIES DATA SHEET BT2 BT2 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH DELAY (ns) 5.00 10.00 20.00 1.63 2.09 2.98 1.71 2.18 3.06 1.87 2.34 3.23 2.38 2.85 3.75 40.00 4.71 4.79 4.96 5.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 1.84 2.53 3.89 1.84 2.53 3.88 1.88 2.57 3.92 2.05 2.74 4.10 40.00 6.58 6.58 6.62 6.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 1.63 2.09 2.98 1.71 2.18 3.06 1.87 2.34 3.23 2.38 2.85 3.75 40.00 4.71 4.79 4.96 5.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 1.84 2.53 3.89 1.84 2.53 3.88 1.88 2.57 3.92 2.05 2.74 4.10 40.00 6.58 6.58 6.62 6.79 Rev.1.01.10 3 - 90 TC200G SERIES DATA SHEET BT2 BT2 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH DELAY (ns) 5.00 10.00 20.00 0.83 0.83 0.83 0.92 0.92 0.92 1.02 1.02 1.02 1.17 1.17 1.17 40.00 0.83 0.92 1.02 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 0.40 0.40 0.40 0.49 0.49 0.49 0.59 0.59 0.59 0.74 0.74 0.74 40.00 0.40 0.49 0.59 0.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 2.14 2.62 3.51 2.15 2.63 3.52 2.23 2.70 3.60 2.50 2.97 3.87 40.00 5.24 5.25 5.33 5.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 2.43 3.11 4.47 2.44 3.13 4.48 2.51 3.20 4.56 2.78 3.47 4.82 40.00 7.16 7.17 7.25 7.52 Rev.1.01.10 3 - 91 TC200G SERIES DATA SHEET BT2 BT2 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH DELAY (ns) 5.00 10.00 20.00 0.83 0.83 0.83 0.92 0.92 0.92 1.02 1.02 1.02 1.17 1.17 1.17 40.00 0.83 0.92 1.02 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 0.40 0.40 0.40 0.49 0.49 0.49 0.59 0.59 0.59 0.74 0.74 0.74 40.00 0.40 0.49 0.59 0.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 2.14 2.62 3.51 2.15 2.63 3.52 2.23 2.70 3.60 2.50 2.97 3.87 40.00 5.24 5.25 5.33 5.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 2.43 3.11 4.47 2.44 3.13 4.48 2.51 3.20 4.56 2.78 3.47 4.82 40.00 7.16 7.17 7.25 7.52 Rev.1.01.10 3 - 92 TC200G SERIES DATA SHEET BT2 BT2 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH DELAY (ns) 5.00 10.00 20.00 0.97 0.97 0.97 1.00 1.00 1.00 1.05 1.05 1.05 1.18 1.18 1.18 40.00 0.97 1.00 1.05 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 0.53 0.53 0.53 0.56 0.56 0.56 0.62 0.62 0.62 0.74 0.74 0.74 40.00 0.53 0.56 0.62 0.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 2.21 2.69 3.58 2.26 2.74 3.63 2.30 2.78 3.67 2.37 2.85 3.74 40.00 5.31 5.37 5.41 5.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 2.50 3.18 4.54 2.55 3.24 4.59 2.59 3.28 4.63 2.66 3.35 4.70 40.00 7.23 7.29 7.33 7.39 Rev.1.01.10 3 - 93 TC200G SERIES DATA SHEET BT2 BT2 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH DELAY (ns) 5.00 10.00 20.00 0.97 0.97 0.97 1.00 1.00 1.00 1.05 1.05 1.05 1.18 1.18 1.18 40.00 0.97 1.00 1.05 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 0.53 0.53 0.53 0.56 0.56 0.56 0.62 0.62 0.62 0.74 0.74 0.74 40.00 0.53 0.56 0.62 0.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.96 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 2.21 2.69 3.58 2.26 2.74 3.63 2.30 2.78 3.67 2.37 2.85 3.74 40.00 5.31 5.37 5.41 5.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.96 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 2.50 3.18 4.54 2.55 3.24 4.59 2.59 3.28 4.63 2.66 3.35 4.70 40.00 7.23 7.29 7.33 7.39 Rev.1.01.10 3 - 94 TC200G SERIES DATA SHEET BT2ODFS CELL NAME BT2ODFS FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 2mA OPEN DRAIN with FAILSAFE BT2ODFS CELL COUNT GATE 3 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN L H X TN H X L OUTPUT Z L Hz Hz EN BT2ODFS Z TN Verilog-HDL DESCRIPTION BT2ODFS inst(Z,EN,TN); VHDL DESCRIPTION inst:BT2ODFS port map(Z,EN,TN); INPUT LOAD PIN NAME EN TN (LU) LOAD 0.98 1.00 Rev.1.01.10 3 - 95 TC200G SERIES DATA SHEET BT2ODFS BT2ODFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 5.00 10.00 20.00 0.34 0.34 0.34 0.43 0.43 0.43 0.52 0.52 0.52 0.64 0.64 0.64 40.00 0.34 0.43 0.52 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0098 0.63 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 2.11 2.81 4.17 2.13 2.82 4.18 2.21 2.90 4.26 2.46 3.16 4.51 40.00 6.86 6.87 6.95 7.21 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 0.34 0.34 0.34 0.43 0.43 0.43 0.52 0.52 0.52 0.64 0.64 0.64 40.00 0.34 0.43 0.52 0.64 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0098 0.63 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 2.11 2.81 4.17 2.13 2.82 4.18 2.21 2.90 4.26 2.46 3.16 4.51 40.00 6.86 6.87 6.95 7.21 Rev.1.01.10 3 - 96 TC200G SERIES DATA SHEET BT2ODFS BT2ODFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 5.00 10.00 20.00 0.47 0.47 0.47 0.50 0.50 0.50 0.56 0.56 0.56 0.68 0.68 0.68 40.00 0.47 0.50 0.56 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0098 0.63 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 2.18 2.88 4.24 2.24 2.93 4.29 2.28 2.97 4.33 2.35 3.04 4.40 40.00 6.93 6.98 7.02 7.09 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 0.47 0.47 0.47 0.50 0.50 0.50 0.56 0.56 0.56 0.68 0.68 0.68 40.00 0.47 0.50 0.56 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0098 0.63 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 2.18 2.88 4.24 2.24 2.93 4.29 2.28 2.97 4.33 2.35 3.04 4.40 40.00 6.93 6.98 7.02 7.09 Rev.1.01.10 3 - 97 TC200G SERIES DATA SHEET BT4 CELL NAME BT4 FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 4mA BT4 CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT4 Z TN Verilog-HDL DESCRIPTION BT4 inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT4 port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 6.31 0.98 1.00 Rev.1.01.10 3 - 98 TC200G SERIES DATA SHEET BT4 BT4 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH DELAY (ns) 10.00 30.00 60.00 1.85 3.00 4.61 1.93 3.08 4.69 2.09 3.24 4.85 2.63 3.78 5.39 100.00 6.70 6.78 6.95 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.79 3.21 5.30 1.78 3.21 5.29 1.82 3.25 5.33 1.99 3.42 5.50 100.00 8.06 8.06 8.09 8.27 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.85 3.00 4.61 1.93 3.08 4.69 2.09 3.24 4.85 2.63 3.78 5.39 100.00 6.70 6.78 6.95 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.79 3.21 5.30 1.78 3.21 5.29 1.82 3.25 5.33 1.99 3.42 5.50 100.00 8.06 8.06 8.09 8.27 Rev.1.01.10 3 - 99 TC200G SERIES DATA SHEET BT4 BT4 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH DELAY (ns) 10.00 30.00 60.00 1.07 1.07 1.07 1.16 1.16 1.16 1.26 1.26 1.26 1.40 1.40 1.40 100.00 1.07 1.16 1.26 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.41 0.41 0.41 0.50 0.50 0.50 0.60 0.60 0.60 0.75 0.75 0.75 100.00 0.41 0.50 0.60 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.38 3.54 5.15 2.39 3.55 5.16 2.47 3.63 5.24 2.74 3.90 5.51 100.00 7.25 7.26 7.34 7.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.37 3.80 5.88 2.38 3.81 5.90 2.46 3.89 5.97 2.72 4.15 6.24 100.00 8.65 8.66 8.74 9.00 Rev.1.01.10 3 - 100 TC200G SERIES DATA SHEET BT4 BT4 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH DELAY (ns) 10.00 30.00 60.00 1.07 1.07 1.07 1.16 1.16 1.16 1.26 1.26 1.26 1.40 1.40 1.40 100.00 1.07 1.16 1.26 1.40 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.41 0.41 0.41 0.50 0.50 0.50 0.60 0.60 0.60 0.75 0.75 0.75 100.00 0.41 0.50 0.60 0.75 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.38 3.54 5.15 2.39 3.55 5.16 2.47 3.63 5.24 2.74 3.90 5.51 100.00 7.25 7.26 7.34 7.61 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.37 3.80 5.88 2.38 3.81 5.90 2.46 3.89 5.97 2.72 4.15 6.24 100.00 8.65 8.66 8.74 9.00 Rev.1.01.10 3 - 101 TC200G SERIES DATA SHEET BT4 BT4 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH DELAY (ns) 10.00 30.00 60.00 1.20 1.20 1.20 1.23 1.23 1.23 1.29 1.29 1.29 1.41 1.41 1.41 100.00 1.20 1.23 1.29 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.54 0.54 0.54 0.58 0.58 0.58 0.63 0.63 0.63 0.76 0.76 0.76 100.00 0.54 0.58 0.63 0.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.45 3.61 5.22 2.51 3.67 5.28 2.55 3.71 5.32 2.62 3.78 5.38 100.00 7.32 7.38 7.42 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.44 3.87 5.96 2.49 3.92 6.01 2.53 3.96 6.05 2.60 4.03 6.12 100.00 8.72 8.77 8.81 8.88 Rev.1.01.10 3 - 102 TC200G SERIES DATA SHEET BT4 BT4 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH DELAY (ns) 10.00 30.00 60.00 1.20 1.20 1.20 1.23 1.23 1.23 1.29 1.29 1.29 1.41 1.41 1.41 100.00 1.20 1.23 1.29 1.41 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.54 0.54 0.54 0.58 0.58 0.58 0.63 0.63 0.63 0.76 0.76 0.76 100.00 0.54 0.58 0.63 0.76 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.83 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.45 3.61 5.22 2.51 3.67 5.28 2.55 3.71 5.32 2.62 3.78 5.38 100.00 7.32 7.38 7.42 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.65 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.44 3.87 5.96 2.49 3.92 6.01 2.53 3.96 6.05 2.60 4.03 6.12 100.00 8.72 8.77 8.81 8.88 Rev.1.01.10 3 - 103 TC200G SERIES DATA SHEET BT4H CELL NAME BT4H FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 4mA HIGH-SPEED BT4H CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT4H Z TN Verilog-HDL DESCRIPTION BT4H inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT4H port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 9.03 0.98 1.00 Rev.1.01.10 3 - 104 TC200G SERIES DATA SHEET BT4H BT4H 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH DELAY (ns) 10.00 30.00 60.00 1.10 2.15 3.71 1.19 2.24 3.80 1.32 2.37 3.93 1.62 2.67 4.23 100.00 5.79 5.88 6.01 6.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.43 2.82 4.89 1.44 2.83 4.90 1.45 2.84 4.91 1.52 2.89 4.95 100.00 7.65 7.65 7.66 7.71 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.10 2.15 3.71 1.19 2.24 3.80 1.32 2.37 3.93 1.62 2.67 4.23 100.00 5.79 5.88 6.01 6.31 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.43 2.82 4.89 1.44 2.83 4.90 1.45 2.84 4.91 1.52 2.89 4.95 100.00 7.65 7.65 7.66 7.71 Rev.1.01.10 3 - 105 TC200G SERIES DATA SHEET BT4H BT4H 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH DELAY (ns) 10.00 30.00 60.00 0.97 0.97 0.97 1.06 1.06 1.06 1.17 1.17 1.17 1.34 1.34 1.34 100.00 0.97 1.06 1.17 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.52 0.52 0.52 0.61 0.61 0.61 0.71 0.71 0.71 0.87 0.87 0.87 100.00 0.52 0.61 0.71 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.67 2.73 4.29 1.68 2.74 4.30 1.76 2.81 4.38 2.03 3.09 4.65 100.00 6.37 6.38 6.46 6.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.07 3.46 5.53 2.08 3.47 5.54 2.15 3.55 5.62 2.42 3.81 5.89 100.00 8.29 8.30 8.38 8.65 Rev.1.01.10 3 - 106 TC200G SERIES DATA SHEET BT4H BT4H 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH DELAY (ns) 10.00 30.00 60.00 0.97 0.97 0.97 1.06 1.06 1.06 1.17 1.17 1.17 1.34 1.34 1.34 100.00 0.97 1.06 1.17 1.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.52 0.52 0.52 0.61 0.61 0.61 0.71 0.71 0.71 0.87 0.87 0.87 100.00 0.52 0.61 0.71 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.67 2.73 4.29 1.68 2.74 4.30 1.76 2.81 4.38 2.03 3.09 4.65 100.00 6.37 6.38 6.46 6.73 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.07 3.46 5.53 2.08 3.47 5.54 2.15 3.55 5.62 2.42 3.81 5.89 100.00 8.29 8.30 8.38 8.65 Rev.1.01.10 3 - 107 TC200G SERIES DATA SHEET BT4H BT4H 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH DELAY (ns) 10.00 30.00 60.00 1.10 1.10 1.10 1.14 1.14 1.14 1.19 1.19 1.19 1.32 1.32 1.32 100.00 1.10 1.14 1.19 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.65 0.65 0.65 0.68 0.68 0.68 0.74 0.74 0.74 0.86 0.86 0.86 100.00 0.65 0.68 0.74 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.74 2.80 4.36 1.80 2.85 4.41 1.83 2.89 4.45 1.90 2.96 4.52 100.00 6.44 6.49 6.53 6.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.14 3.53 5.60 2.19 3.58 5.66 2.23 3.62 5.69 2.30 3.69 5.76 100.00 8.36 8.41 8.45 8.52 Rev.1.01.10 3 - 108 TC200G SERIES DATA SHEET BT4H BT4H 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH DELAY (ns) 10.00 30.00 60.00 1.10 1.10 1.10 1.14 1.14 1.14 1.19 1.19 1.19 1.32 1.32 1.32 100.00 1.10 1.14 1.19 1.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.65 0.65 0.65 0.68 0.68 0.68 0.74 0.74 0.74 0.86 0.86 0.86 100.00 0.65 0.68 0.74 0.86 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.74 2.80 4.36 1.80 2.85 4.41 1.83 2.89 4.45 1.90 2.96 4.52 100.00 6.44 6.49 6.53 6.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.14 3.53 5.60 2.19 3.58 5.66 2.23 3.62 5.69 2.30 3.69 5.76 100.00 8.36 8.41 8.45 8.52 Rev.1.01.10 3 - 109 TC200G SERIES DATA SHEET BT4R CELL NAME BT4R FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 4mA SLEW RATE CONTROL BT4R CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT4R Z TN Verilog-HDL DESCRIPTION BT4R inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT4R port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 7.58 0.98 1.00 Rev.1.01.10 3 - 110 TC200G SERIES DATA SHEET BT4R BT4R 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH DELAY (ns) 10.00 30.00 60.00 2.52 4.10 6.26 2.61 4.20 6.36 2.79 4.37 6.53 3.39 4.98 7.14 100.00 8.90 9.00 9.18 9.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.43 5.68 8.75 3.48 5.73 8.80 3.62 5.87 8.94 4.08 6.33 9.40 100.00 12.52 12.57 12.71 13.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.52 4.10 6.26 2.61 4.20 6.36 2.79 4.37 6.53 3.39 4.98 7.14 100.00 8.90 9.00 9.18 9.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.43 5.68 8.75 3.48 5.73 8.80 3.62 5.87 8.94 4.08 6.33 9.40 100.00 12.52 12.57 12.71 13.17 Rev.1.01.10 3 - 111 TC200G SERIES DATA SHEET BT4R BT4R 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH DELAY (ns) 10.00 30.00 60.00 0.82 0.82 0.82 0.91 0.91 0.91 1.01 1.01 1.01 1.17 1.17 1.17 100.00 0.82 0.91 1.01 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.51 0.51 0.51 0.60 0.60 0.60 0.69 0.69 0.69 0.84 0.84 0.84 100.00 0.51 0.60 0.69 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.18 4.78 6.95 3.19 4.79 6.96 3.27 4.87 7.04 3.55 5.15 7.32 100.00 9.60 9.61 9.68 9.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 4.26 6.51 9.58 4.27 6.53 9.59 4.35 6.60 9.67 4.61 6.86 9.93 100.00 13.35 13.37 13.44 13.70 Rev.1.01.10 3 - 112 TC200G SERIES DATA SHEET BT4R BT4R 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH DELAY (ns) 10.00 30.00 60.00 0.82 0.82 0.82 0.91 0.91 0.91 1.01 1.01 1.01 1.17 1.17 1.17 100.00 0.82 0.91 1.01 1.17 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.51 0.51 0.51 0.60 0.60 0.60 0.69 0.69 0.69 0.84 0.84 0.84 100.00 0.51 0.60 0.69 0.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.18 4.78 6.95 3.19 4.79 6.96 3.27 4.87 7.04 3.55 5.15 7.32 100.00 9.60 9.61 9.68 9.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 4.26 6.51 9.58 4.27 6.53 9.59 4.35 6.60 9.67 4.61 6.86 9.93 100.00 13.35 13.37 13.44 13.70 Rev.1.01.10 3 - 113 TC200G SERIES DATA SHEET BT4R BT4R 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH DELAY (ns) 10.00 30.00 60.00 0.95 0.95 0.95 0.99 0.99 0.99 1.04 1.04 1.04 1.18 1.18 1.18 100.00 0.95 0.99 1.04 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.64 0.64 0.64 0.67 0.67 0.67 0.73 0.73 0.73 0.85 0.85 0.85 100.00 0.64 0.67 0.73 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.25 4.85 7.02 3.31 4.90 7.07 3.35 4.94 7.11 3.42 5.01 7.18 100.00 9.67 9.72 9.76 9.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 4.33 6.58 9.65 4.39 6.64 9.71 4.43 6.68 9.75 4.49 6.75 9.81 100.00 13.42 13.48 13.52 13.59 Rev.1.01.10 3 - 114 TC200G SERIES DATA SHEET BT4R BT4R 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH DELAY (ns) 10.00 30.00 60.00 0.95 0.95 0.95 0.99 0.99 0.99 1.04 1.04 1.04 1.18 1.18 1.18 100.00 0.95 0.99 1.04 1.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.64 0.64 0.64 0.67 0.67 0.67 0.73 0.73 0.73 0.85 0.85 0.85 100.00 0.64 0.67 0.73 0.85 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0058 1.47 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.25 4.85 7.02 3.31 4.90 7.07 3.35 4.94 7.11 3.42 5.01 7.18 100.00 9.67 9.72 9.76 9.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0066 1.71 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 4.33 6.58 9.65 4.39 6.64 9.71 4.43 6.68 9.75 4.49 6.75 9.81 100.00 13.42 13.48 13.52 13.59 Rev.1.01.10 3 - 115 TC200G SERIES DATA SHEET BT4ODFS CELL NAME BT4ODFS FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 4mA OPEN DRAIN with FAILSAFE BT4ODFS CELL COUNT GATE 3 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN L H X TN H X L OUTPUT Z L Hz Hz EN BT4ODFS Z TN Verilog-HDL DESCRIPTION BT4ODFS inst(Z,EN,TN); VHDL DESCRIPTION inst:BT4ODFS port map(Z,EN,TN); INPUT LOAD PIN NAME EN TN (LU) LOAD 0.98 1.00 Rev.1.01.10 3 - 116 TC200G SERIES DATA SHEET BT4ODFS BT4ODFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 10.00 30.00 60.00 0.35 0.35 0.35 0.44 0.44 0.44 0.53 0.53 0.53 0.66 0.66 0.66 100.00 0.35 0.44 0.53 0.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.48 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.16 3.59 5.68 2.17 3.61 5.69 2.25 3.69 5.77 2.50 3.94 6.03 100.00 8.44 8.46 8.54 8.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.35 0.35 0.35 0.44 0.44 0.44 0.53 0.53 0.53 0.66 0.66 0.66 100.00 0.35 0.44 0.53 0.66 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.48 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.16 3.59 5.68 2.17 3.61 5.69 2.25 3.69 5.77 2.50 3.94 6.03 100.00 8.44 8.46 8.54 8.79 Rev.1.01.10 3 - 117 TC200G SERIES DATA SHEET BT4ODFS BT4ODFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 10.00 30.00 60.00 0.48 0.48 0.48 0.52 0.52 0.52 0.57 0.57 0.57 0.69 0.69 0.69 100.00 0.48 0.52 0.57 0.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.48 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.23 3.66 5.75 2.28 3.72 5.80 2.32 3.76 5.84 2.39 3.83 5.91 100.00 8.51 8.57 8.61 8.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.48 0.48 0.48 0.52 0.52 0.52 0.57 0.57 0.57 0.69 0.69 0.69 100.00 0.48 0.52 0.57 0.69 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.48 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.23 3.66 5.75 2.28 3.72 5.80 2.32 3.76 5.84 2.39 3.83 5.91 100.00 8.51 8.57 8.61 8.67 Rev.1.01.10 3 - 118 TC200G SERIES DATA SHEET BT8 CELL NAME BT8 FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 8mA BT8 CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT8 Z TN Verilog-HDL DESCRIPTION BT8 inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT8 port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 6.31 0.98 1.00 Rev.1.01.10 3 - 119 TC200G SERIES DATA SHEET BT8 BT8 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH DELAY (ns) 10.00 30.00 60.00 1.93 2.69 3.62 2.01 2.77 3.71 2.17 2.93 3.86 2.71 3.48 4.41 100.00 4.76 4.84 5.00 5.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.57 2.36 3.44 1.58 2.36 3.44 1.61 2.39 3.47 1.79 2.56 3.64 100.00 4.85 4.85 4.88 5.05 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.93 2.69 3.62 2.01 2.77 3.71 2.17 2.93 3.86 2.71 3.48 4.41 100.00 4.76 4.84 5.00 5.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.57 2.36 3.44 1.58 2.36 3.44 1.61 2.39 3.47 1.79 2.56 3.64 100.00 4.85 4.85 4.88 5.05 Rev.1.01.10 3 - 120 TC200G SERIES DATA SHEET BT8 BT8 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH DELAY (ns) 10.00 30.00 60.00 1.67 1.67 1.67 1.75 1.75 1.75 1.85 1.85 1.85 2.00 2.00 2.00 100.00 1.67 1.75 1.85 2.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.44 0.44 0.44 0.53 0.53 0.53 0.63 0.63 0.63 0.78 0.78 0.78 100.00 0.44 0.53 0.63 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.46 3.24 4.18 2.47 3.25 4.19 2.55 3.33 4.27 2.81 3.59 4.53 100.00 5.32 5.33 5.40 5.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.10 2.92 4.02 2.11 2.93 4.03 2.19 3.01 4.11 2.45 3.27 4.37 100.00 5.43 5.44 5.52 5.78 Rev.1.01.10 3 - 121 TC200G SERIES DATA SHEET BT8 BT8 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH DELAY (ns) 10.00 30.00 60.00 1.67 1.67 1.67 1.75 1.75 1.75 1.85 1.85 1.85 2.00 2.00 2.00 100.00 1.67 1.75 1.85 2.00 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.44 0.44 0.44 0.53 0.53 0.53 0.63 0.63 0.63 0.78 0.78 0.78 100.00 0.44 0.53 0.63 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.46 3.24 4.18 2.47 3.25 4.19 2.55 3.33 4.27 2.81 3.59 4.53 100.00 5.32 5.33 5.40 5.67 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.10 2.92 4.02 2.11 2.93 4.03 2.19 3.01 4.11 2.45 3.27 4.37 100.00 5.43 5.44 5.52 5.78 Rev.1.01.10 3 - 122 TC200G SERIES DATA SHEET BT8 BT8 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH DELAY (ns) 10.00 30.00 60.00 1.80 1.80 1.80 1.83 1.83 1.83 1.89 1.89 1.89 2.01 2.01 2.01 100.00 1.80 1.83 1.89 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.57 0.57 0.57 0.60 0.60 0.60 0.66 0.66 0.66 0.78 0.78 0.78 100.00 0.57 0.60 0.66 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.53 3.31 4.25 2.58 3.36 4.30 2.62 3.40 4.34 2.69 3.47 4.41 100.00 5.39 5.44 5.48 5.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.17 2.99 4.09 2.23 3.04 4.14 2.27 3.08 4.18 2.33 3.15 4.25 100.00 5.50 5.55 5.59 5.66 Rev.1.01.10 3 - 123 TC200G SERIES DATA SHEET BT8 BT8 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH DELAY (ns) 10.00 30.00 60.00 1.80 1.80 1.80 1.83 1.83 1.83 1.89 1.89 1.89 2.01 2.01 2.01 100.00 1.80 1.83 1.89 2.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.57 0.57 0.57 0.60 0.60 0.60 0.66 0.66 0.66 0.78 0.78 0.78 100.00 0.57 0.60 0.66 0.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0023 1.03 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.53 3.31 4.25 2.58 3.36 4.30 2.62 3.40 4.34 2.69 3.47 4.41 100.00 5.39 5.44 5.48 5.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.61 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.17 2.99 4.09 2.23 3.04 4.14 2.27 3.08 4.18 2.33 3.15 4.25 100.00 5.50 5.55 5.59 5.66 Rev.1.01.10 3 - 124 TC200G SERIES DATA SHEET BT8H CELL NAME BT8H FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 8mA HIGH-SPEED BT8H CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT8H Z TN Verilog-HDL DESCRIPTION BT8H inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT8H port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 9.03 0.98 1.00 Rev.1.01.10 3 - 125 TC200G SERIES DATA SHEET BT8H BT8H 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH DELAY (ns) 10.00 30.00 60.00 0.93 1.50 2.31 1.02 1.59 2.39 1.17 1.74 2.54 1.53 2.10 2.90 100.00 3.36 3.44 3.59 3.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.12 1.83 2.86 1.13 1.84 2.87 1.16 1.85 2.88 1.27 1.95 2.96 100.00 4.24 4.25 4.26 4.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.93 1.50 2.31 1.02 1.59 2.39 1.17 1.74 2.54 1.53 2.10 2.90 100.00 3.36 3.44 3.59 3.95 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.12 1.83 2.86 1.13 1.84 2.87 1.16 1.85 2.88 1.27 1.95 2.96 100.00 4.24 4.25 4.26 4.33 Rev.1.01.10 3 - 126 TC200G SERIES DATA SHEET BT8H BT8H 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH DELAY (ns) 10.00 30.00 60.00 1.44 1.44 1.44 1.53 1.53 1.53 1.64 1.64 1.64 1.81 1.81 1.81 100.00 1.44 1.53 1.64 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.55 0.55 0.55 0.64 0.64 0.64 0.74 0.74 0.74 0.90 0.90 0.90 100.00 0.55 0.64 0.74 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.51 2.10 2.90 1.52 2.11 2.91 1.60 2.18 2.99 1.87 2.46 3.27 100.00 3.95 3.97 4.04 4.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.70 2.43 3.48 1.71 2.44 3.50 1.79 2.52 3.57 2.06 2.79 3.84 100.00 4.87 4.88 4.96 5.22 Rev.1.01.10 3 - 127 TC200G SERIES DATA SHEET BT8H BT8H 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH DELAY (ns) 10.00 30.00 60.00 1.44 1.44 1.44 1.53 1.53 1.53 1.64 1.64 1.64 1.81 1.81 1.81 100.00 1.44 1.53 1.64 1.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.55 0.55 0.55 0.64 0.64 0.64 0.74 0.74 0.74 0.90 0.90 0.90 100.00 0.55 0.64 0.74 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.51 2.10 2.90 1.52 2.11 2.91 1.60 2.18 2.99 1.87 2.46 3.27 100.00 3.95 3.97 4.04 4.32 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.70 2.43 3.48 1.71 2.44 3.50 1.79 2.52 3.57 2.06 2.79 3.84 100.00 4.87 4.88 4.96 5.22 Rev.1.01.10 3 - 128 TC200G SERIES DATA SHEET BT8H BT8H 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH DELAY (ns) 10.00 30.00 60.00 1.58 1.58 1.58 1.61 1.61 1.61 1.66 1.66 1.66 1.79 1.79 1.79 100.00 1.58 1.61 1.66 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.68 0.68 0.68 0.71 0.71 0.71 0.77 0.77 0.77 0.89 0.89 0.89 100.00 0.68 0.71 0.77 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.58 2.17 2.97 1.64 2.22 3.03 1.68 2.26 3.07 1.74 2.33 3.14 100.00 4.03 4.08 4.12 4.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.77 2.50 3.56 1.83 2.56 3.61 1.86 2.60 3.65 1.93 2.67 3.72 100.00 4.94 4.99 5.03 5.10 Rev.1.01.10 3 - 129 TC200G SERIES DATA SHEET BT8H BT8H 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH DELAY (ns) 10.00 30.00 60.00 1.58 1.58 1.58 1.61 1.61 1.61 1.66 1.66 1.66 1.79 1.79 1.79 100.00 1.58 1.61 1.66 1.79 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.68 0.68 0.68 0.71 0.71 0.71 0.77 0.77 0.77 0.89 0.89 0.89 100.00 0.68 0.71 0.77 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.42 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.58 2.17 2.97 1.64 2.22 3.03 1.68 2.26 3.07 1.74 2.33 3.14 100.00 4.03 4.08 4.12 4.19 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.39 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.77 2.50 3.56 1.83 2.56 3.61 1.86 2.60 3.65 1.93 2.67 3.72 100.00 4.94 4.99 5.03 5.10 Rev.1.01.10 3 - 130 TC200G SERIES DATA SHEET BT8R CELL NAME BT8R FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 8mA SLEW RATE CONTROL BT8R CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT8R Z TN Verilog-HDL DESCRIPTION BT8R inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT8R port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 7.58 0.98 1.00 Rev.1.01.10 3 - 131 TC200G SERIES DATA SHEET BT8R BT8R 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH DELAY (ns) 10.00 30.00 60.00 2.56 3.57 4.84 2.66 3.67 4.95 2.84 3.85 5.12 3.43 4.45 5.72 100.00 6.40 6.51 6.68 7.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.24 4.63 6.40 3.28 4.68 6.44 3.41 4.80 6.57 3.85 5.24 7.01 100.00 8.57 8.62 8.74 9.18 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.56 3.57 4.84 2.66 3.67 4.95 2.84 3.85 5.12 3.43 4.45 5.72 100.00 6.40 6.51 6.68 7.28 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.24 4.63 6.40 3.28 4.68 6.44 3.41 4.80 6.57 3.85 5.24 7.01 100.00 8.57 8.62 8.74 9.18 Rev.1.01.10 3 - 132 TC200G SERIES DATA SHEET BT8R BT8R 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH DELAY (ns) 10.00 30.00 60.00 1.19 1.19 1.19 1.28 1.28 1.28 1.39 1.39 1.39 1.55 1.55 1.55 100.00 1.19 1.28 1.39 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.54 0.54 0.54 0.63 0.63 0.63 0.73 0.73 0.73 0.87 0.87 0.87 100.00 0.54 0.63 0.73 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.23 4.26 5.54 3.25 4.27 5.56 3.32 4.35 5.63 3.61 4.63 5.92 100.00 7.11 7.12 7.20 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 4.05 5.44 7.20 4.06 5.45 7.22 4.14 5.53 7.29 4.40 5.79 7.56 100.00 9.38 9.39 9.47 9.73 Rev.1.01.10 3 - 133 TC200G SERIES DATA SHEET BT8R BT8R 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH DELAY (ns) 10.00 30.00 60.00 1.19 1.19 1.19 1.28 1.28 1.28 1.39 1.39 1.39 1.55 1.55 1.55 100.00 1.19 1.28 1.39 1.55 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.54 0.54 0.54 0.63 0.63 0.63 0.73 0.73 0.73 0.87 0.87 0.87 100.00 0.54 0.63 0.73 0.87 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.23 4.26 5.54 3.25 4.27 5.56 3.32 4.35 5.63 3.61 4.63 5.92 100.00 7.11 7.12 7.20 7.48 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 4.05 5.44 7.20 4.06 5.45 7.22 4.14 5.53 7.29 4.40 5.79 7.56 100.00 9.38 9.39 9.47 9.73 Rev.1.01.10 3 - 134 TC200G SERIES DATA SHEET BT8R BT8R 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH DELAY (ns) 10.00 30.00 60.00 1.32 1.32 1.32 1.36 1.36 1.36 1.42 1.42 1.42 1.56 1.56 1.56 100.00 1.32 1.36 1.42 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.67 0.67 0.67 0.71 0.71 0.71 0.76 0.76 0.76 0.89 0.89 0.89 100.00 0.67 0.71 0.76 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.31 4.33 5.61 3.36 4.39 5.67 3.40 4.43 5.71 3.47 4.50 5.78 100.00 7.18 7.23 7.27 7.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 4.12 5.51 7.28 4.17 5.56 7.33 4.21 5.60 7.37 4.28 5.67 7.44 100.00 9.45 9.50 9.54 9.61 Rev.1.01.10 3 - 135 TC200G SERIES DATA SHEET BT8R BT8R 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH DELAY (ns) 10.00 30.00 60.00 1.32 1.32 1.32 1.36 1.36 1.36 1.42 1.42 1.42 1.56 1.56 1.56 100.00 1.32 1.36 1.42 1.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.67 0.67 0.67 0.71 0.71 0.71 0.76 0.76 0.76 0.89 0.89 0.89 100.00 0.67 0.71 0.76 0.89 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.31 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.31 4.33 5.61 3.36 4.39 5.67 3.40 4.43 5.71 3.47 4.50 5.78 100.00 7.18 7.23 7.27 7.34 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.46 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 4.12 5.51 7.28 4.17 5.56 7.33 4.21 5.60 7.37 4.28 5.67 7.44 100.00 9.45 9.50 9.54 9.61 Rev.1.01.10 3 - 136 TC200G SERIES DATA SHEET BT8ODFS CELL NAME BT8ODFS FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 8mA OPEN DRAIN with FAILSAFE BT8ODFS CELL COUNT GATE 3 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN L H X TN H X L OUTPUT Z L Hz Hz EN BT8ODFS Z TN Verilog-HDL DESCRIPTION BT8ODFS inst(Z,EN,TN); VHDL DESCRIPTION inst:BT8ODFS port map(Z,EN,TN); INPUT LOAD PIN NAME EN TN (LU) LOAD 0.98 1.00 Rev.1.01.10 3 - 137 TC200G SERIES DATA SHEET BT8ODFS BT8ODFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 10.00 30.00 60.00 0.38 0.38 0.38 0.46 0.46 0.46 0.55 0.55 0.55 0.68 0.68 0.68 100.00 0.38 0.46 0.55 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.57 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.93 2.76 3.87 1.94 2.77 3.88 2.02 2.86 3.96 2.28 3.11 4.21 100.00 5.28 5.29 5.37 5.62 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.38 0.38 0.38 0.46 0.46 0.46 0.55 0.55 0.55 0.68 0.68 0.68 100.00 0.38 0.46 0.55 0.68 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.57 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.93 2.76 3.87 1.94 2.77 3.88 2.02 2.86 3.96 2.28 3.11 4.21 100.00 5.28 5.29 5.37 5.62 Rev.1.01.10 3 - 138 TC200G SERIES DATA SHEET BT8ODFS BT8ODFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 10.00 30.00 60.00 0.51 0.51 0.51 0.54 0.54 0.54 0.60 0.60 0.60 0.72 0.72 0.72 100.00 0.51 0.54 0.60 0.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.57 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.00 2.83 3.94 2.05 2.89 3.99 2.09 2.93 4.03 2.16 2.99 4.10 100.00 5.35 5.40 5.44 5.51 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 0.51 0.51 0.51 0.54 0.54 0.54 0.60 0.60 0.60 0.72 0.72 0.72 100.00 0.51 0.54 0.60 0.72 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.57 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 2.00 2.83 3.94 2.05 2.89 3.99 2.09 2.93 4.03 2.16 2.99 4.10 100.00 5.35 5.40 5.44 5.51 Rev.1.01.10 3 - 139 TC200G SERIES DATA SHEET BT16 CELL NAME BT16 FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 16mA BT16 CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT16 Z TN Verilog-HDL DESCRIPTION BT16 inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT16 port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 7.75 0.98 1.00 Rev.1.01.10 3 - 140 TC200G SERIES DATA SHEET BT16 BT16 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.72 2.44 3.25 3.98 1.80 2.52 3.33 4.06 1.95 2.67 3.48 4.21 2.47 3.20 4.00 4.73 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.30 2.01 2.93 3.82 1.31 2.01 2.93 3.82 1.35 2.05 2.96 3.85 1.53 2.22 3.14 4.02 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.72 2.44 3.25 3.98 1.80 2.52 3.33 4.06 1.95 2.67 3.48 4.21 2.47 3.20 4.00 4.73 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.30 2.01 2.93 3.82 1.31 2.01 2.93 3.82 1.35 2.05 2.96 3.85 1.53 2.22 3.14 4.02 Rev.1.01.10 3 - 141 TC200G SERIES DATA SHEET BT16 BT16 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.50 1.50 1.50 1.50 1.58 1.58 1.58 1.58 1.68 1.68 1.68 1.68 1.83 1.83 1.83 1.83 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.50 0.50 0.50 0.50 0.59 0.59 0.59 0.59 0.69 0.69 0.69 0.69 0.84 0.84 0.84 0.84 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.23 2.97 3.78 4.51 2.24 2.98 3.79 4.52 2.32 3.06 3.87 4.60 2.58 3.33 4.14 4.87 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.88 2.63 3.57 4.46 1.90 2.65 3.58 4.47 1.97 2.72 3.65 4.55 2.24 2.99 3.92 4.81 Rev.1.01.10 3 - 142 TC200G SERIES DATA SHEET BT16 BT16 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.50 1.50 1.50 1.50 1.58 1.58 1.58 1.58 1.68 1.68 1.68 1.68 1.83 1.83 1.83 1.83 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.50 0.50 0.50 0.50 0.59 0.59 0.59 0.59 0.69 0.69 0.69 0.69 0.84 0.84 0.84 0.84 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.23 2.97 3.78 4.51 2.24 2.98 3.79 4.52 2.32 3.06 3.87 4.60 2.58 3.33 4.14 4.87 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.88 2.63 3.57 4.46 1.90 2.65 3.58 4.47 1.97 2.72 3.65 4.55 2.24 2.99 3.92 4.81 Rev.1.01.10 3 - 143 TC200G SERIES DATA SHEET BT16 BT16 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.63 1.63 1.63 1.63 1.66 1.66 1.66 1.66 1.72 1.72 1.72 1.72 1.84 1.84 1.84 1.84 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.63 0.63 0.63 0.63 0.66 0.66 0.66 0.66 0.72 0.72 0.72 0.72 0.84 0.84 0.84 0.84 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.30 3.04 3.85 4.58 2.35 3.09 3.90 4.64 2.39 3.13 3.94 4.68 2.46 3.20 4.01 4.74 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.96 2.71 3.64 4.53 2.01 2.76 3.69 4.58 2.05 2.80 3.73 4.62 2.12 2.87 3.80 4.69 Rev.1.01.10 3 - 144 TC200G SERIES DATA SHEET BT16 BT16 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.63 1.63 1.63 1.63 1.66 1.66 1.66 1.66 1.72 1.72 1.72 1.72 1.84 1.84 1.84 1.84 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.63 0.63 0.63 0.63 0.66 0.66 0.66 0.66 0.72 0.72 0.72 0.72 0.84 0.84 0.84 0.84 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 0.94 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.30 3.04 3.85 4.58 2.35 3.09 3.90 4.64 2.39 3.13 3.94 4.68 2.46 3.20 4.01 4.74 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.52 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.96 2.71 3.64 4.53 2.01 2.76 3.69 4.58 2.05 2.80 3.73 4.62 2.12 2.87 3.80 4.69 Rev.1.01.10 3 - 145 TC200G SERIES DATA SHEET BT16H CELL NAME BT16H FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 16mA HIGH-SPEED BT16H CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT16H Z TN Verilog-HDL DESCRIPTION BT16H inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT16H port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 10.65 0.98 1.00 Rev.1.01.10 3 - 146 TC200G SERIES DATA SHEET BT16H BT16H 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.78 1.31 1.99 2.65 0.87 1.39 2.07 2.74 1.01 1.54 2.22 2.88 1.36 1.89 2.58 3.24 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.90 1.52 2.38 3.23 0.91 1.52 2.39 3.23 0.94 1.55 2.40 3.25 1.06 1.65 2.50 3.35 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.78 1.31 1.99 2.65 0.87 1.39 2.07 2.74 1.01 1.54 2.22 2.88 1.36 1.89 2.58 3.24 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.90 1.52 2.38 3.23 0.91 1.52 2.39 3.23 0.94 1.55 2.40 3.25 1.06 1.65 2.50 3.35 Rev.1.01.10 3 - 147 TC200G SERIES DATA SHEET BT16H BT16H 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.33 1.33 1.33 1.33 1.42 1.42 1.42 1.42 1.53 1.53 1.53 1.53 1.73 1.73 1.73 1.73 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.66 0.66 0.66 0.66 0.75 0.75 0.75 0.75 0.87 0.87 0.87 0.87 1.06 1.06 1.06 1.06 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.43 1.97 2.66 3.32 1.44 1.98 2.67 3.33 1.51 2.06 2.74 3.41 1.79 2.34 3.02 3.69 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 2.31 3.20 4.07 1.67 2.32 3.21 4.08 1.74 2.40 3.28 4.15 2.02 2.68 3.56 4.43 Rev.1.01.10 3 - 148 TC200G SERIES DATA SHEET BT16H BT16H 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.33 1.33 1.33 1.33 1.42 1.42 1.42 1.42 1.53 1.53 1.53 1.53 1.73 1.73 1.73 1.73 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.66 0.66 0.66 0.66 0.75 0.75 0.75 0.75 0.87 0.87 0.87 0.87 1.06 1.06 1.06 1.06 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.43 1.97 2.66 3.32 1.44 1.98 2.67 3.33 1.51 2.06 2.74 3.41 1.79 2.34 3.02 3.69 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 2.31 3.20 4.07 1.67 2.32 3.21 4.08 1.74 2.40 3.28 4.15 2.02 2.68 3.56 4.43 Rev.1.01.10 3 - 149 TC200G SERIES DATA SHEET BT16H BT16H 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.46 1.46 1.46 1.46 1.49 1.49 1.49 1.49 1.55 1.55 1.55 1.55 1.67 1.67 1.67 1.67 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.79 0.79 0.79 0.79 0.83 0.83 0.83 0.83 0.88 0.88 0.88 0.88 1.01 1.01 1.01 1.01 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.50 2.04 2.73 3.39 1.55 2.10 2.78 3.45 1.59 2.14 2.82 3.49 1.66 2.20 2.89 3.55 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.73 2.39 3.27 4.14 1.78 2.44 3.32 4.19 1.82 2.48 3.36 4.23 1.89 2.55 3.43 4.30 Rev.1.01.10 3 - 150 TC200G SERIES DATA SHEET BT16H BT16H 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.46 1.46 1.46 1.46 1.49 1.49 1.49 1.49 1.55 1.55 1.55 1.55 1.67 1.67 1.67 1.67 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.79 0.79 0.79 0.79 0.83 0.83 0.83 0.83 0.88 0.88 0.88 0.88 1.01 1.01 1.01 1.01 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.50 2.04 2.73 3.39 1.55 2.10 2.78 3.45 1.59 2.14 2.82 3.49 1.66 2.20 2.89 3.55 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.28 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.73 2.39 3.27 4.14 1.78 2.44 3.32 4.19 1.82 2.48 3.36 4.23 1.89 2.55 3.43 4.30 Rev.1.01.10 3 - 151 TC200G SERIES DATA SHEET BT16R CELL NAME BT16R FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 16mA SLEW RATE CONTROL BT16R CELL COUNT GATE 3 I/O 1 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT16R Z TN Verilog-HDL DESCRIPTION BT16R inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT16R port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 8.93 0.98 1.00 Rev.1.01.10 3 - 152 TC200G SERIES DATA SHEET BT16R BT16R 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.25 3.22 4.33 5.34 2.37 3.34 4.45 5.46 2.57 3.54 4.65 5.66 3.24 4.21 5.32 6.32 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.77 4.02 5.52 6.90 2.82 4.08 5.57 6.96 2.93 4.19 5.69 7.07 3.28 4.55 6.05 7.44 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.25 3.22 4.33 5.34 2.37 3.34 4.45 5.46 2.57 3.54 4.65 5.66 3.24 4.21 5.32 6.32 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.77 4.02 5.52 6.90 2.82 4.08 5.57 6.96 2.93 4.19 5.69 7.07 3.28 4.55 6.05 7.44 Rev.1.01.10 3 - 153 TC200G SERIES DATA SHEET BT16R BT16R 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.02 2.02 2.02 2.02 2.12 2.12 2.12 2.12 2.23 2.23 2.23 2.23 2.40 2.40 2.40 2.40 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.61 0.61 0.61 0.61 0.70 0.70 0.70 0.70 0.80 0.80 0.80 0.80 0.95 0.95 0.95 0.95 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.90 3.89 5.01 6.02 2.91 3.91 5.02 6.03 2.99 3.98 5.10 6.11 3.27 4.27 5.38 6.39 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.12 4.40 5.90 7.28 3.14 4.41 5.91 7.30 3.21 4.49 5.99 7.37 3.48 4.75 6.25 7.64 Rev.1.01.10 3 - 154 TC200G SERIES DATA SHEET BT16R BT16R 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.02 2.02 2.02 2.02 2.12 2.12 2.12 2.12 2.23 2.23 2.23 2.23 2.40 2.40 2.40 2.40 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.61 0.61 0.61 0.61 0.70 0.70 0.70 0.70 0.80 0.80 0.80 0.80 0.95 0.95 0.95 0.95 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.90 3.89 5.01 6.02 2.91 3.91 5.02 6.03 2.99 3.98 5.10 6.11 3.27 4.27 5.38 6.39 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.12 4.40 5.90 7.28 3.14 4.41 5.91 7.30 3.21 4.49 5.99 7.37 3.48 4.75 6.25 7.64 Rev.1.01.10 3 - 155 TC200G SERIES DATA SHEET BT16R BT16R 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.16 2.16 2.16 2.16 2.20 2.20 2.20 2.20 2.26 2.26 2.26 2.26 2.41 2.41 2.41 2.41 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.74 0.74 0.74 0.74 0.77 0.77 0.77 0.77 0.83 0.83 0.83 0.83 0.95 0.95 0.95 0.95 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.97 3.96 5.08 6.09 3.02 4.02 5.13 6.14 3.06 4.06 5.17 6.18 3.13 4.13 5.24 6.25 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.20 4.47 5.97 7.36 3.25 4.52 6.02 7.41 3.29 4.56 6.06 7.45 3.36 4.63 6.13 7.52 Rev.1.01.10 3 - 156 TC200G SERIES DATA SHEET BT16R BT16R 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.16 2.16 2.16 2.16 2.20 2.20 2.20 2.20 2.26 2.26 2.26 2.26 2.41 2.41 2.41 2.41 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.74 0.74 0.74 0.74 0.77 0.77 0.77 0.77 0.83 0.83 0.83 0.83 0.95 0.95 0.95 0.95 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.16 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.97 3.96 5.08 6.09 3.02 4.02 5.13 6.14 3.06 4.06 5.17 6.18 3.13 4.13 5.24 6.25 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.20 4.47 5.97 7.36 3.25 4.52 6.02 7.41 3.29 4.56 6.06 7.45 3.36 4.63 6.13 7.52 Rev.1.01.10 3 - 157 TC200G SERIES DATA SHEET BT16ODFS CELL NAME BT16ODFS FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 16mA OPEN DRAIN with FAILSAFE BT16ODFS CELL COUNT GATE 3 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN L H X TN H X L OUTPUT Z L Hz Hz EN BT16ODFS Z TN Verilog-HDL DESCRIPTION BT16ODFS inst(Z,EN,TN); VHDL DESCRIPTION inst:BT16ODFS port map(Z,EN,TN); INPUT LOAD PIN NAME EN TN (LU) LOAD 0.98 1.00 Rev.1.01.10 3 - 158 TC200G SERIES DATA SHEET BT16ODFS BT16ODFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.44 0.44 0.44 0.44 0.52 0.52 0.52 0.52 0.61 0.61 0.61 0.61 0.74 0.74 0.74 0.74 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.48 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.75 2.51 3.44 4.33 1.76 2.52 3.45 4.34 1.84 2.60 3.53 4.42 2.09 2.85 3.79 4.68 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.44 0.44 0.44 0.44 0.52 0.52 0.52 0.52 0.61 0.61 0.61 0.61 0.74 0.74 0.74 0.74 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.48 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.75 2.51 3.44 4.33 1.76 2.52 3.45 4.34 1.84 2.60 3.53 4.42 2.09 2.85 3.79 4.68 Rev.1.01.10 3 - 159 TC200G SERIES DATA SHEET BT16ODFS BT16ODFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.57 0.57 0.57 0.57 0.60 0.60 0.60 0.60 0.66 0.66 0.66 0.66 0.78 0.78 0.78 0.78 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.48 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.82 2.58 3.51 4.40 1.87 2.63 3.56 4.46 1.91 2.67 3.60 4.49 1.98 2.74 3.67 4.56 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.57 0.57 0.57 0.57 0.60 0.60 0.60 0.60 0.66 0.66 0.66 0.66 0.78 0.78 0.78 0.78 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.48 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.82 2.58 3.51 4.40 1.87 2.63 3.56 4.46 1.91 2.67 3.60 4.49 1.98 2.74 3.67 4.56 Rev.1.01.10 3 - 160 TC200G SERIES DATA SHEET BT24 CELL NAME BT24 FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 24mA BT24 CELL COUNT GATE 3 I/O 2 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT24 Z TN Verilog-HDL DESCRIPTION BT24 inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT24 port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 13.11 0.98 1.00 Rev.1.01.10 3 - 161 TC200G SERIES DATA SHEET BT24 BT24 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.60 2.15 2.75 3.28 1.68 2.23 2.83 3.36 1.83 2.39 2.99 3.51 2.36 2.92 3.52 4.04 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.23 1.73 2.37 2.97 1.24 1.73 2.36 2.97 1.28 1.77 2.40 3.00 1.46 1.94 2.57 3.17 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.60 2.15 2.75 3.28 1.68 2.23 2.83 3.36 1.83 2.39 2.99 3.51 2.36 2.92 3.52 4.04 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.23 1.73 2.37 2.97 1.24 1.73 2.36 2.97 1.28 1.77 2.40 3.00 1.46 1.94 2.57 3.17 Rev.1.01.10 3 - 162 TC200G SERIES DATA SHEET BT24 BT24 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 1.66 1.66 1.66 1.75 1.75 1.75 1.75 1.87 1.87 1.87 1.87 2.09 2.09 2.09 2.09 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.68 0.68 0.68 0.68 0.77 0.77 0.77 0.77 0.89 0.89 0.89 0.89 1.11 1.11 1.11 1.11 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.38 2.96 3.57 4.10 2.39 2.97 3.58 4.11 2.46 3.04 3.65 4.18 2.74 3.32 3.93 4.46 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.12 2.67 3.32 3.93 2.14 2.68 3.34 3.95 2.20 2.75 3.41 4.02 2.48 3.03 3.69 4.30 Rev.1.01.10 3 - 163 TC200G SERIES DATA SHEET BT24 BT24 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 1.66 1.66 1.66 1.75 1.75 1.75 1.75 1.87 1.87 1.87 1.87 2.09 2.09 2.09 2.09 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.68 0.68 0.68 0.68 0.77 0.77 0.77 0.77 0.89 0.89 0.89 0.89 1.11 1.11 1.11 1.11 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.38 2.96 3.57 4.10 2.39 2.97 3.58 4.11 2.46 3.04 3.65 4.18 2.74 3.32 3.93 4.46 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.12 2.67 3.32 3.93 2.14 2.68 3.34 3.95 2.20 2.75 3.41 4.02 2.48 3.03 3.69 4.30 Rev.1.01.10 3 - 164 TC200G SERIES DATA SHEET BT24 BT24 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.80 1.80 1.80 1.80 1.83 1.83 1.83 1.83 1.88 1.88 1.88 1.88 2.01 2.01 2.01 2.01 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.81 0.81 0.81 0.81 0.84 0.84 0.84 0.84 0.90 0.90 0.90 0.90 1.03 1.03 1.03 1.03 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.45 3.03 3.64 4.17 2.51 3.09 3.70 4.23 2.55 3.13 3.74 4.27 2.61 3.19 3.80 4.33 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.20 2.75 3.40 4.01 2.25 2.80 3.45 4.06 2.29 2.84 3.49 4.10 2.36 2.91 3.56 4.17 Rev.1.01.10 3 - 165 TC200G SERIES DATA SHEET BT24 BT24 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.80 1.80 1.80 1.80 1.83 1.83 1.83 1.83 1.88 1.88 1.88 1.88 2.01 2.01 2.01 2.01 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.81 0.81 0.81 0.81 0.84 0.84 0.84 0.84 0.90 0.90 0.90 0.90 1.03 1.03 1.03 1.03 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.45 3.03 3.64 4.17 2.51 3.09 3.70 4.23 2.55 3.13 3.74 4.27 2.61 3.19 3.80 4.33 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.20 2.75 3.40 4.01 2.25 2.80 3.45 4.06 2.29 2.84 3.49 4.10 2.36 2.91 3.56 4.17 Rev.1.01.10 3 - 166 TC200G SERIES DATA SHEET BT24H CELL NAME BT24H FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 24mA HIGH-SPEED BT24H CELL COUNT GATE 3 I/O 2 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT24H Z TN Verilog-HDL DESCRIPTION BT24H inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT24H port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 18.71 0.98 1.00 Rev.1.01.10 3 - 167 TC200G SERIES DATA SHEET BT24H BT24H 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.71 1.08 1.55 2.00 0.79 1.16 1.63 2.08 0.94 1.31 1.78 2.23 1.29 1.67 2.14 2.59 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.85 1.27 1.85 2.42 0.86 1.27 1.85 2.42 0.89 1.29 1.87 2.44 1.02 1.40 1.96 2.52 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.71 1.08 1.55 2.00 0.79 1.16 1.63 2.08 0.94 1.31 1.78 2.23 1.29 1.67 2.14 2.59 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.85 1.27 1.85 2.42 0.86 1.27 1.85 2.42 0.89 1.29 1.87 2.44 1.02 1.40 1.96 2.52 Rev.1.01.10 3 - 168 TC200G SERIES DATA SHEET BT24H BT24H 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.51 1.51 1.51 1.51 1.60 1.60 1.60 1.60 1.73 1.73 1.73 1.73 2.00 2.00 2.00 2.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.92 0.92 0.92 0.92 1.01 1.01 1.01 1.01 1.15 1.15 1.15 1.15 1.41 1.41 1.41 1.41 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 2.06 2.54 3.00 1.68 2.08 2.56 3.01 1.74 2.14 2.62 3.07 2.02 2.42 2.90 3.36 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.99 2.45 3.05 3.63 2.01 2.47 3.06 3.65 2.07 2.53 3.13 3.71 2.35 2.81 3.41 3.99 Rev.1.01.10 3 - 169 TC200G SERIES DATA SHEET BT24H BT24H 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.51 1.51 1.51 1.51 1.60 1.60 1.60 1.60 1.73 1.73 1.73 1.73 2.00 2.00 2.00 2.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.92 0.92 0.92 0.92 1.01 1.01 1.01 1.01 1.15 1.15 1.15 1.15 1.41 1.41 1.41 1.41 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.66 2.06 2.54 3.00 1.68 2.08 2.56 3.01 1.74 2.14 2.62 3.07 2.02 2.42 2.90 3.36 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.99 2.45 3.05 3.63 2.01 2.47 3.06 3.65 2.07 2.53 3.13 3.71 2.35 2.81 3.41 3.99 Rev.1.01.10 3 - 170 TC200G SERIES DATA SHEET BT24H BT24H 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.64 1.64 1.64 1.64 1.68 1.68 1.68 1.68 1.73 1.73 1.73 1.73 1.86 1.86 1.86 1.86 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.06 1.06 1.06 1.06 1.09 1.09 1.09 1.09 1.15 1.15 1.15 1.15 1.27 1.27 1.27 1.27 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.74 2.14 2.62 3.07 1.79 2.19 2.67 3.13 1.83 2.23 2.71 3.17 1.90 2.30 2.78 3.23 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.07 2.53 3.13 3.71 2.12 2.58 3.18 3.76 2.16 2.62 3.22 3.80 2.23 2.69 3.29 3.87 Rev.1.01.10 3 - 171 TC200G SERIES DATA SHEET BT24H BT24H 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.64 1.64 1.64 1.64 1.68 1.68 1.68 1.68 1.73 1.73 1.73 1.73 1.86 1.86 1.86 1.86 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.06 1.06 1.06 1.06 1.09 1.09 1.09 1.09 1.15 1.15 1.15 1.15 1.27 1.27 1.27 1.27 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.74 2.14 2.62 3.07 1.79 2.19 2.67 3.13 1.83 2.23 2.71 3.17 1.90 2.30 2.78 3.23 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.31 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.07 2.53 3.13 3.71 2.12 2.58 3.18 3.76 2.16 2.62 3.22 3.80 2.23 2.69 3.29 3.87 Rev.1.01.10 3 - 172 TC200G SERIES DATA SHEET BT24R CELL NAME BT24R FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 24mA SLEW RATE CONTROL BT24R CELL COUNT GATE 3 I/O 2 1/6 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN A L L L H H X X X TN H H X L OUTPUT Z L H Hz Hz A EN BT24R Z TN Verilog-HDL DESCRIPTION BT24R inst(Z,A,EN,TN); VHDL DESCRIPTION inst:BT24R port map(Z,A,EN,TN); INPUT LOAD PIN NAME A EN TN (LU) LOAD 15.44 0.98 1.00 Rev.1.01.10 3 - 173 TC200G SERIES DATA SHEET BT24R BT24R 2/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.11 2.84 3.65 4.38 2.23 2.96 3.77 4.49 2.42 3.15 3.96 4.68 3.06 3.79 4.60 5.32 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.57 3.52 4.61 5.59 2.62 3.58 4.66 5.65 2.74 3.69 4.78 5.76 3.13 4.09 5.17 6.15 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.11 2.84 3.65 4.38 2.23 2.96 3.77 4.49 2.42 3.15 3.96 4.68 3.06 3.79 4.60 5.32 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.57 3.52 4.61 5.59 2.62 3.58 4.66 5.65 2.74 3.69 4.78 5.76 3.13 4.09 5.17 6.15 Rev.1.01.10 3 - 174 TC200G SERIES DATA SHEET BT24R BT24R 3/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.70 1.70 1.70 1.70 1.80 1.80 1.80 1.80 1.93 1.93 1.93 1.93 2.16 2.16 2.16 2.16 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.82 0.82 0.82 0.82 0.91 0.91 0.91 0.91 1.03 1.03 1.03 1.03 1.24 1.24 1.24 1.24 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.11 3.87 4.70 5.42 3.13 3.89 4.71 5.43 3.19 3.96 4.78 5.50 3.48 4.24 5.06 5.79 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.46 4.42 5.50 6.48 3.48 4.43 5.52 6.50 3.54 4.50 5.58 6.56 3.82 4.78 5.86 6.84 Rev.1.01.10 3 - 175 TC200G SERIES DATA SHEET BT24R BT24R 4/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.70 1.70 1.70 1.70 1.80 1.80 1.80 1.80 1.93 1.93 1.93 1.93 2.16 2.16 2.16 2.16 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.82 0.82 0.82 0.82 0.91 0.91 0.91 0.91 1.03 1.03 1.03 1.03 1.24 1.24 1.24 1.24 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.11 3.87 4.70 5.42 3.13 3.89 4.71 5.43 3.19 3.96 4.78 5.50 3.48 4.24 5.06 5.79 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.46 4.42 5.50 6.48 3.48 4.43 5.52 6.50 3.54 4.50 5.58 6.56 3.82 4.78 5.86 6.84 Rev.1.01.10 3 - 176 TC200G SERIES DATA SHEET BT24R BT24R 5/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.84 1.84 1.84 1.84 1.88 1.88 1.88 1.88 1.94 1.94 1.94 1.94 2.09 2.09 2.09 2.09 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.96 0.96 0.96 0.96 0.99 0.99 0.99 0.99 1.05 1.05 1.05 1.05 1.17 1.17 1.17 1.17 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.19 3.95 4.77 5.49 3.24 4.00 4.82 5.55 3.28 4.04 4.86 5.59 3.35 4.11 4.93 5.66 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.54 4.49 5.58 6.56 3.59 4.54 5.63 6.61 3.63 4.59 5.67 6.65 3.70 4.65 5.74 6.72 Rev.1.01.10 3 - 177 TC200G SERIES DATA SHEET BT24R BT24R 6/6 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.84 1.84 1.84 1.84 1.88 1.88 1.88 1.88 1.94 1.94 1.94 1.94 2.09 2.09 2.09 2.09 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.96 0.96 0.96 0.96 0.99 0.99 0.99 0.99 1.05 1.05 1.05 1.05 1.17 1.17 1.17 1.17 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.13 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.19 3.95 4.77 5.49 3.24 4.00 4.82 5.55 3.28 4.04 4.86 5.59 3.35 4.11 4.93 5.66 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 3.54 4.49 5.58 6.56 3.59 4.54 5.63 6.61 3.63 4.59 5.67 6.65 3.70 4.65 5.74 6.72 Rev.1.01.10 3 - 178 TC200G SERIES DATA SHEET BT24ODFS CELL NAME BT24ODFS FUNCTION TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) 24mA OPEN DRAIN with FAILSAFE BT24ODFS CELL COUNT GATE 3 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN L H X TN H X L OUTPUT Z L Hz Hz EN BT24ODFS Z TN Verilog-HDL DESCRIPTION BT24ODFS inst(Z,EN,TN); VHDL DESCRIPTION inst:BT24ODFS port map(Z,EN,TN); INPUT LOAD PIN NAME EN TN (LU) LOAD 0.98 1.00 Rev.1.01.10 3 - 179 TC200G SERIES DATA SHEET BT24ODFS BT24ODFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.62 0.62 0.62 0.62 0.71 0.71 0.71 0.71 0.83 0.83 0.83 0.83 1.03 1.03 1.03 1.03 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.48 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.96 2.53 3.19 3.80 1.98 2.54 3.20 3.81 2.05 2.61 3.27 3.88 2.33 2.89 3.55 4.16 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.62 0.62 0.62 0.62 0.71 0.71 0.71 0.71 0.83 0.83 0.83 0.83 1.03 1.03 1.03 1.03 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.48 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.96 2.53 3.19 3.80 1.98 2.54 3.20 3.81 2.05 2.61 3.27 3.88 2.33 2.89 3.55 4.16 Rev.1.01.10 3 - 180 TC200G SERIES DATA SHEET BT24ODFS BT24ODFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.75 0.75 0.75 0.75 0.79 0.79 0.79 0.79 0.84 0.84 0.84 0.84 0.97 0.97 0.97 0.97 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.48 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.04 2.60 3.26 3.87 2.09 2.66 3.31 3.93 2.13 2.70 3.35 3.96 2.20 2.76 3.42 4.03 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0000 0.00 PATH CONDITION PATH CONDITION FUNCTION TN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.75 0.75 0.75 0.75 0.79 0.79 0.79 0.79 0.84 0.84 0.84 0.84 0.97 0.97 0.97 0.97 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.48 PATH CONDITION PATH CONDITION FUNCTION TN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.04 2.60 3.26 3.87 2.09 2.66 3.31 3.93 2.13 2.70 3.35 3.96 2.20 2.76 3.42 4.03 Rev.1.01.10 3 - 181 TC200G SERIES DATA SHEET BTPCI CELL NAME BTPCI FUNCTION PCI ( Peripheral Component Interconnect ) BUS TRI-STATE OUTPUT BUFFER ( LOW ENABLE ) BTPCI CELL COUNT GATE 0 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT EN L L H X A L H X X OUTPUT Z L H Hz Hz A EN BTPCI Z Verilog-HDL DESCRIPTION BTPCI inst(Z,A,EN); VHDL DESCRIPTION inst:BTPCI port map(Z,A,EN); INPUT LOAD PIN NAME A EN (LU) LOAD 3.92 3.97 Rev.1.01.08 3 - 182 TC200G SERIES DATA SHEET BTPCI BTPCI 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 0.96 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.84 2.77 3.84 4.84 1.93 2.86 3.93 4.93 2.10 3.02 4.09 5.09 2.64 3.57 4.65 5.65 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.75 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.71 2.51 3.49 4.41 1.74 2.54 3.51 4.43 1.80 2.59 3.57 4.49 2.03 2.84 3.82 4.74 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.75 PATH CONDITION PATH CONDITION FUNCTION EN->Z --1-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.01 2.01 2.01 2.01 2.08 2.08 2.08 2.08 2.15 2.15 2.15 2.15 2.28 2.28 2.28 2.28 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 0.96 PATH CONDITION PATH CONDITION FUNCTION EN->Z --0-Z LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.15 0.15 0.15 0.15 0.24 0.24 0.24 0.24 0.37 0.37 0.37 0.37 0.56 0.56 0.56 0.56 Rev.1.01.08 3 - 183 TC200G SERIES DATA SHEET BTPCI BTPCI 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-1 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 0.96 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.88 2.84 3.93 4.93 1.92 2.88 3.97 4.97 1.98 2.94 4.03 5.03 2.11 3.07 4.16 5.16 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.75 PATH CONDITION PATH CONDITION FUNCTION EN->Z --Z-0 LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.62 2.49 3.49 4.41 1.62 2.49 3.49 4.41 1.64 2.50 3.50 4.42 1.75 2.61 3.61 4.54 Rev.1.01.08 3 - 184 TC200G SERIES DATA SHEET B2 CELL NAME B2 FUNCTION OUTPUT BUFFER ( 2mA DRIVE ) 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B2 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B2 Z Verilog-HDL DESCRIPTION B2 inst(Z,A); VHDL DESCRIPTION inst:B2 port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 5.21 Rev.1.01.10 3 - 185 TC200G SERIES DATA SHEET B2 B2 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.90 PATH DELAY (ns) 5.00 10.00 20.00 1.51 1.97 2.85 1.59 2.05 2.94 1.76 2.22 3.10 2.25 2.72 3.60 40.00 4.57 4.66 4.82 5.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.93 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 5.00 10.00 20.00 1.79 2.48 3.83 1.79 2.47 3.83 1.83 2.51 3.87 2.00 2.69 4.04 40.00 6.52 6.52 6.56 6.74 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0002 0.90 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 1.51 1.97 2.85 1.59 2.05 2.94 1.76 2.22 3.10 2.25 2.72 3.60 40.00 4.57 4.66 4.82 5.33 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0003 0.93 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 5.00 10.00 20.00 1.79 2.48 3.83 1.79 2.47 3.83 1.83 2.51 3.87 2.00 2.69 4.04 40.00 6.52 6.52 6.56 6.74 Rev.1.01.10 3 - 186 TC200G SERIES DATA SHEET B4 CELL NAME B4 FUNCTION OUTPUT BUFFER 4mA 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B4 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B4 Z Verilog-HDL DESCRIPTION B4 inst(Z,A); VHDL DESCRIPTION inst:B4 port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 5.21 Rev.1.01.10 3 - 187 TC200G SERIES DATA SHEET B4 B4 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.77 PATH DELAY (ns) 10.00 30.00 60.00 1.75 2.88 4.48 1.83 2.96 4.56 1.99 3.13 4.72 2.52 3.66 5.25 100.00 6.57 6.65 6.81 7.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.61 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.74 3.16 5.25 1.74 3.16 5.24 1.78 3.20 5.28 1.95 3.37 5.46 100.00 8.01 8.01 8.04 8.22 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.77 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.75 2.88 4.48 1.83 2.96 4.56 1.99 3.13 4.72 2.52 3.66 5.25 100.00 6.57 6.65 6.81 7.35 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.61 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.74 3.16 5.25 1.74 3.16 5.24 1.78 3.20 5.28 1.95 3.37 5.46 100.00 8.01 8.01 8.04 8.22 Rev.1.01.10 3 - 188 TC200G SERIES DATA SHEET B4H CELL NAME B4H FUNCTION OUTPUT BUFFER 4mA HIGH-SPEED 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B4H CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B4H Z Verilog-HDL DESCRIPTION B4H inst(Z,A); VHDL DESCRIPTION inst:B4H port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 9.56 Rev.1.01.10 3 - 189 TC200G SERIES DATA SHEET B4H B4H 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.46 PATH DELAY (ns) 10.00 30.00 60.00 0.97 2.02 3.58 1.05 2.10 3.66 1.17 2.21 3.77 1.41 2.46 4.02 100.00 5.65 5.74 5.85 6.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.47 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.23 2.62 4.69 1.24 2.62 4.69 1.26 2.64 4.71 1.31 2.68 4.75 100.00 7.45 7.45 7.47 7.50 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0047 0.46 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.97 2.02 3.58 1.05 2.10 3.66 1.17 2.21 3.77 1.41 2.46 4.02 100.00 5.65 5.74 5.85 6.10 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0050 0.47 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.23 2.62 4.69 1.24 2.62 4.69 1.26 2.64 4.71 1.31 2.68 4.75 100.00 7.45 7.45 7.47 7.50 Rev.1.01.10 3 - 190 TC200G SERIES DATA SHEET B4R CELL NAME B4R FUNCTION OUTPUT BUFFER 4mA SLEW RATE CONTROL 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B4R CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B4R Z Verilog-HDL DESCRIPTION B4R inst(Z,A); VHDL DESCRIPTION inst:B4R port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 6.50 Rev.1.01.10 3 - 191 TC200G SERIES DATA SHEET B4R B4R 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0057 1.42 PATH DELAY (ns) 10.00 30.00 60.00 2.36 3.92 6.05 2.45 4.02 6.15 2.63 4.20 6.33 3.25 4.82 6.95 100.00 8.65 8.76 8.93 9.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0065 1.67 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.35 5.58 8.63 3.39 5.62 8.67 3.53 5.77 8.82 3.99 6.23 9.28 100.00 12.38 12.42 12.56 13.02 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0057 1.42 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.36 3.92 6.05 2.45 4.02 6.15 2.63 4.20 6.33 3.25 4.82 6.95 100.00 8.65 8.76 8.93 9.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0065 1.67 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.35 5.58 8.63 3.39 5.62 8.67 3.53 5.77 8.82 3.99 6.23 9.28 100.00 12.38 12.42 12.56 13.02 Rev.1.01.10 3 - 192 TC200G SERIES DATA SHEET B8 CELL NAME B8 FUNCTION OUTPUT BUFFER 8mA 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B8 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B8 Z Verilog-HDL DESCRIPTION B8 inst(Z,A); VHDL DESCRIPTION inst:B8 port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 5.21 Rev.1.01.10 3 - 193 TC200G SERIES DATA SHEET B8 B8 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.98 PATH DELAY (ns) 10.00 30.00 60.00 1.85 2.60 3.52 1.93 2.68 3.60 2.09 2.84 3.76 2.63 3.38 4.30 100.00 4.65 4.73 4.89 5.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.59 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.53 2.31 3.40 1.53 2.31 3.40 1.57 2.35 3.43 1.75 2.52 3.60 100.00 4.80 4.80 4.83 5.01 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.98 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.85 2.60 3.52 1.93 2.68 3.60 2.09 2.84 3.76 2.63 3.38 4.30 100.00 4.65 4.73 4.89 5.43 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0001 0.59 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.53 2.31 3.40 1.53 2.31 3.40 1.57 2.35 3.43 1.75 2.52 3.60 100.00 4.80 4.80 4.83 5.01 Rev.1.01.10 3 - 194 TC200G SERIES DATA SHEET B8H CELL NAME B8H FUNCTION OUTPUT BUFFER 8mA HIGH-SPEED 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B8H CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B8H Z Verilog-HDL DESCRIPTION B8H inst(Z,A); VHDL DESCRIPTION inst:B8H port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 7.94 Rev.1.01.10 3 - 195 TC200G SERIES DATA SHEET B8H B8H 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.40 PATH DELAY (ns) 10.00 30.00 60.00 0.90 1.47 2.27 0.99 1.55 2.35 1.13 1.70 2.50 1.49 2.05 2.85 100.00 3.32 3.40 3.55 3.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.38 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 1.09 1.80 2.83 1.10 1.81 2.84 1.13 1.83 2.86 1.24 1.92 2.94 100.00 4.21 4.22 4.23 4.30 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.40 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 0.90 1.47 2.27 0.99 1.55 2.35 1.13 1.70 2.50 1.49 2.05 2.85 100.00 3.32 3.40 3.55 3.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.38 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 1.09 1.80 2.83 1.10 1.81 2.84 1.13 1.83 2.86 1.24 1.92 2.94 100.00 4.21 4.22 4.23 4.30 Rev.1.01.10 3 - 196 TC200G SERIES DATA SHEET B8R CELL NAME B8R FUNCTION OUTPUT BUFFER 8mA SLEW RATE CONTROL 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B8R CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B8R Z Verilog-HDL DESCRIPTION B8R inst(Z,A); VHDL DESCRIPTION inst:B8R port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 6.50 Rev.1.01.10 3 - 197 TC200G SERIES DATA SHEET B8R B8R 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.25 PATH DELAY (ns) 10.00 30.00 60.00 2.42 3.41 4.67 2.52 3.52 4.78 2.70 3.70 4.96 3.31 4.31 5.57 100.00 6.22 6.32 6.51 7.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.42 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS PATH DELAY (ns) 10.00 30.00 60.00 3.16 4.55 6.30 3.21 4.59 6.35 3.34 4.72 6.47 3.77 5.15 6.91 100.00 8.47 8.51 8.64 9.07 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0032 1.25 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 2.42 3.41 4.67 2.52 3.52 4.78 2.70 3.70 4.96 3.31 4.31 5.57 100.00 6.22 6.32 6.51 7.12 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0035 1.42 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL PATH DELAY (ns) 10.00 30.00 60.00 3.16 4.55 6.30 3.21 4.59 6.35 3.34 4.72 6.47 3.77 5.15 6.91 100.00 8.47 8.51 8.64 9.07 Rev.1.01.10 3 - 198 TC200G SERIES DATA SHEET B16 CELL NAME B16 FUNCTION OUTPUT BUFFER 16mA 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B16 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B16 Z Verilog-HDL DESCRIPTION B16 inst(Z,A); VHDL DESCRIPTION inst:B16 port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 6.66 Rev.1.01.10 3 - 199 TC200G SERIES DATA SHEET B16 B16 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.88 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.73 2.45 3.25 3.98 1.80 2.52 3.33 4.06 1.95 2.67 3.48 4.21 2.47 3.20 4.00 4.73 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.48 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.30 2.00 2.92 3.81 1.30 2.01 2.92 3.81 1.34 2.04 2.95 3.84 1.52 2.22 3.13 4.02 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.88 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.73 2.45 3.25 3.98 1.80 2.52 3.33 4.06 1.95 2.67 3.48 4.21 2.47 3.20 4.00 4.73 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.48 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.30 2.00 2.92 3.81 1.30 2.01 2.92 3.81 1.34 2.04 2.95 3.84 1.52 2.22 3.13 4.02 Rev.1.01.10 3 - 200 TC200G SERIES DATA SHEET B16H CELL NAME B16H FUNCTION OUTPUT BUFFER 16mA HIGH-SPEED 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B16H CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B16H Z Verilog-HDL DESCRIPTION B16H inst(Z,A); VHDL DESCRIPTION inst:B16H port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 9.56 Rev.1.01.10 3 - 201 TC200G SERIES DATA SHEET B16H B16H 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.78 1.31 1.99 2.65 0.87 1.39 2.07 2.74 1.01 1.54 2.22 2.88 1.36 1.89 2.58 3.24 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.88 1.50 2.37 3.23 0.90 1.51 2.37 3.23 0.93 1.54 2.40 3.26 1.06 1.65 2.49 3.34 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.78 1.31 1.99 2.65 0.87 1.39 2.07 2.74 1.01 1.54 2.22 2.88 1.36 1.89 2.58 3.24 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.33 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.88 1.50 2.37 3.23 0.90 1.51 2.37 3.23 0.93 1.54 2.40 3.26 1.06 1.65 2.49 3.34 Rev.1.01.10 3 - 202 TC200G SERIES DATA SHEET B16R CELL NAME B16R FUNCTION OUTPUT BUFFER 16mA SLEW RATE CONTROL 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 1 B16R CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B16R Z Verilog-HDL DESCRIPTION B16R inst(Z,A); VHDL DESCRIPTION inst:B16R port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 7.85 Rev.1.01.10 3 - 203 TC200G SERIES DATA SHEET B16R B16R 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.15 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.25 3.22 4.32 5.33 2.37 3.34 4.44 5.45 2.57 3.54 4.64 5.65 3.24 4.21 5.31 6.32 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.75 4.00 5.50 6.89 2.81 4.06 5.56 6.94 2.91 4.17 5.67 7.06 3.27 4.54 6.04 7.43 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 1.15 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.25 3.22 4.32 5.33 2.37 3.34 4.44 5.45 2.57 3.54 4.64 5.65 3.24 4.21 5.31 6.32 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0018 1.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.75 4.00 5.50 6.89 2.81 4.06 5.56 6.94 2.91 4.17 5.67 7.06 3.27 4.54 6.04 7.43 Rev.1.01.10 3 - 204 TC200G SERIES DATA SHEET B24 CELL NAME B24 FUNCTION OUTPUT BUFFER 24mA 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 2 B24 CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B24 Z Verilog-HDL DESCRIPTION B24 inst(Z,A); VHDL DESCRIPTION inst:B24 port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 12.02 Rev.1.01.10 3 - 205 TC200G SERIES DATA SHEET B24 B24 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.60 2.16 2.76 3.28 1.68 2.24 2.84 3.36 1.83 2.39 2.99 3.51 2.36 2.92 3.52 4.04 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.22 1.72 2.35 2.95 1.23 1.72 2.35 2.96 1.27 1.76 2.39 2.99 1.45 1.94 2.56 3.16 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.88 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.60 2.16 2.76 3.28 1.68 2.24 2.84 3.36 1.83 2.39 2.99 3.51 2.36 2.92 3.52 4.04 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.50 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.22 1.72 2.35 2.95 1.23 1.72 2.35 2.96 1.27 1.76 2.39 2.99 1.45 1.94 2.56 3.16 Rev.1.01.10 3 - 206 TC200G SERIES DATA SHEET B24H CELL NAME B24H FUNCTION OUTPUT BUFFER 24mA HIGH-SPEED 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 2 B24H CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B24H Z Verilog-HDL DESCRIPTION B24H inst(Z,A); VHDL DESCRIPTION inst:B24H port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 17.61 Rev.1.01.10 3 - 207 TC200G SERIES DATA SHEET B24H B24H 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.71 1.08 1.55 2.00 0.79 1.16 1.63 2.08 0.94 1.31 1.78 2.23 1.29 1.67 2.14 2.59 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.38 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.83 1.24 1.82 2.39 0.84 1.25 1.83 2.40 0.88 1.28 1.85 2.42 1.01 1.39 1.96 2.52 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.35 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.71 1.08 1.55 2.00 0.79 1.16 1.63 2.08 0.94 1.31 1.78 2.23 1.29 1.67 2.14 2.59 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0008 0.38 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 0.83 1.24 1.82 2.39 0.84 1.25 1.83 2.40 0.88 1.28 1.85 2.42 1.01 1.39 1.96 2.52 Rev.1.01.10 3 - 208 TC200G SERIES DATA SHEET B24R CELL NAME B24R FUNCTION OUTPUT BUFFER 24mA SLEW RATE CONTROL 0 LOGIC SYMBOL TRUTH TABLE INPUT A L H 2 B24R CELL COUNT GATE I/O 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. OUTPUT Z L H A B24R Z Verilog-HDL DESCRIPTION B24R inst(Z,A); VHDL DESCRIPTION inst:B24R port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 14.33 Rev.1.01.10 3 - 209 TC200G SERIES DATA SHEET B24R B24R 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.12 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.09 2.82 3.63 4.35 2.21 2.93 3.74 4.46 2.40 3.13 3.94 4.66 3.05 3.78 4.58 5.31 IO LEVEL CMOS SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.56 3.51 4.60 5.58 2.61 3.56 4.65 5.63 2.73 3.68 4.77 5.75 3.12 4.08 5.16 6.14 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0011 1.12 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.09 2.82 3.63 4.35 2.21 2.93 3.74 4.46 2.40 3.13 3.94 4.66 3.05 3.78 4.58 5.31 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 1.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 15.00 50.00 100.00 150.00 2.56 3.51 4.60 5.58 2.61 3.56 4.65 5.63 2.73 3.68 4.77 5.75 3.12 4.08 5.16 6.14 Rev.1.01.10 3 - 210 TC200G SERIES DATA SHEET BPCI CELL NAME BPCI FUNCTION PCI ( Peripheral Component Interconnect ) BUS OUTPUT BUFFER TRUTH TABLE INPUT A L H BPCI CELL COUNT GATE 0 I/O 1 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL OUTPUT Z L H A BPCI Z Verilog-HDL DESCRIPTION BPCI inst(Z,A); VHDL DESCRIPTION inst:BPCI port map(Z,A); INPUT LOAD PIN NAME A (LU) LOAD 3.92 Rev.1.01.08 3 - 211 TC200G SERIES DATA SHEET BPCI BPCI CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0016 0.96 PATH DELAY (ns) 15.00 50.00 100.00 150.00 1.84 2.77 3.84 4.84 1.93 2.86 3.93 4.93 2.10 3.02 4.09 5.09 2.64 3.57 4.65 5.65 IO LEVEL TTL SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.75 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL ns) LOAD (pF) SLEW (ns) 0.01 0.38 1.00 3.00 15.00 50.00 100.00 150.00 3820 1.(1.38)Tj140 0 0 4 5343.277051.76 Tm2/20 3 - 212 TC200G SERIES DATA SHEET DRVC4x CELL NAME DRVC4x FUNCTION CLOCK DRIVER with CMOS LEVEL INPUT BUFFER ( equal 4mA DRIVER ) DRVC4x CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVC4 PULL-DOWN DRVC4D PULL-UP DRVC4U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVC4x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVC4x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVC4x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 537.0 PO 34.3 Rev.1.01.10 3 - 213 TC200G SERIES DATA SHEET DRVC4x DRVC4x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0061 0.07 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.77 1.90 3.59 5.85 0.38 0.83 1.95 3.65 5.90 1.00 0.89 2.02 3.71 5.97 3.00 1.01 2.14 3.83 6.08 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0052 0.06 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.04 2.64 5.00 7.61 0.38 1.07 2.67 5.04 7.69 1.00 1.15 2.75 5.12 7.83 3.00 1.30 2.91 5.29 8.15 Rev.1.01.10 3 - 214 TC200G SERIES DATA SHEET DRVC4x DRVC4x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 215 TC200G SERIES DATA SHEET DRVC4xFS CELL NAME DRVC4xFS FUNCTION CLOCK DRIVER with CMOS LEVEL INPUT BUFFER ( equal 4mA DRIVER ) with FAILSAFE DRVC4xFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVC4FS PULL-DOWN DRVC4DFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVC4xFS Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION DRVC4xFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVC4xFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 537.0 PO 34.3 Rev.1.01.10 3 - 216 TC200G SERIES DATA SHEET DRVC4xFS DRVC4xFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0061 0.07 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.77 1.90 3.59 5.85 0.38 0.83 1.95 3.65 5.90 1.00 0.89 2.02 3.71 5.97 3.00 1.01 2.14 3.83 6.08 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0052 0.06 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.04 2.64 5.00 7.61 0.38 1.07 2.67 5.04 7.69 1.00 1.15 2.75 5.12 7.83 3.00 1.30 2.91 5.29 8.15 Rev.1.01.10 3 - 217 TC200G SERIES DATA SHEET DRVC4xFS DRVC4xFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 218 TC200G SERIES DATA SHEET DRVC8x CELL NAME DRVC8x FUNCTION CLOCK DRIVER with CMOS LEVEL INPUT BUFFER ( equal 8mA DRIVER ) DRVC8x CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVC8 PULL-DOWN DRVC8D PULL-UP DRVC8U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVC8x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVC8x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVC8x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 1171.4 PO 34.3 Rev.1.01.10 3 - 219 TC200G SERIES DATA SHEET DRVC8x DRVC8x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.24 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.61 1.06 1.73 2.62 0.38 0.67 1.12 1.79 2.67 1.00 0.76 1.21 1.88 2.77 3.00 0.93 1.39 2.06 2.95 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.25 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.89 1.67 2.83 4.37 0.38 0.92 1.70 2.86 4.40 1.00 1.01 1.79 2.95 4.49 3.00 1.23 2.01 3.17 4.71 Rev.1.01.10 3 - 220 TC200G SERIES DATA SHEET DRVC8x DRVC8x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 221 TC200G SERIES DATA SHEET DRVC8xFS CELL NAME DRVC8xFS FUNCTION CLOCK DRIVER with CMOS LEVEL INPUT BUFFER ( equal 8mA DRIVER ) with FAILSAFE DRVC8xFS CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVC8FS PULL-DOWN DRVC8DFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVC8xFS Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION DRVC8xFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVC8xFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 1171.4 PO 34.3 Rev.1.01.10 3 - 222 TC200G SERIES DATA SHEET DRVC8xFS DRVC8xFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.24 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.61 1.06 1.73 2.62 0.38 0.67 1.12 1.79 2.67 1.00 0.76 1.21 1.88 2.77 3.00 0.93 1.39 2.06 2.95 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.25 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.89 1.67 2.83 4.37 0.38 0.92 1.70 2.86 4.40 1.00 1.01 1.79 2.95 4.49 3.00 1.23 2.01 3.17 4.71 Rev.1.01.10 3 - 223 TC200G SERIES DATA SHEET DRVC8xFS DRVC8xFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 224 TC200G SERIES DATA SHEET DRVC16x CELL NAME DRVC16x FUNCTION CLOCK DRIVER with CMOS LEVEL INPUT BUFFER ( equal 16mA DRIVER ) DRVC16x CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVC16 PULL-DOWN DRVC16D PULL-UP DRVC16U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVC16x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVC16x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVC16x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 2389.3 PO 34.3 Rev.1.01.10 3 - 225 TC200G SERIES DATA SHEET DRVC16x DRVC16x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.19 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.64 1.05 1.61 2.17 0.38 0.69 1.10 1.66 2.22 1.00 0.80 1.21 1.77 2.33 3.00 1.02 1.44 2.00 2.56 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0013 0.21 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.87 1.57 2.55 3.52 0.38 0.91 1.61 2.58 3.55 1.00 1.01 1.70 2.68 3.65 3.00 1.27 1.97 2.94 3.91 Rev.1.01.10 3 - 226 TC200G SERIES DATA SHEET DRVC16x DRVC16x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 227 TC200G SERIES DATA SHEET DRVC16xFS CELL NAME DRVC16xFS FUNCTION CLOCK DRIVER with CMOS LEVEL INPUT BUFFER ( equal 16mA DRIVER ) with FAILSAFE DRVC16xFS CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVC16FS PULL-DOWN DRVC16DFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVC16xFS Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION DRVC16xFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVC16xFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 2389.3 PO 34.3 Rev.1.01.10 3 - 228 TC200G SERIES DATA SHEET DRVC16xFS DRVC16xFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.19 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.64 1.05 1.61 2.17 0.38 0.69 1.10 1.66 2.22 1.00 0.80 1.21 1.77 2.33 3.00 1.02 1.44 2.00 2.56 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0013 0.21 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 0.87 1.57 2.55 3.52 0.38 0.91 1.61 2.58 3.55 1.00 1.01 1.70 2.68 3.65 3.00 1.27 1.97 2.94 3.91 Rev.1.01.10 3 - 229 TC200G SERIES DATA SHEET DRVC16xFS DRVC16xFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 230 TC200G SERIES DATA SHEET DRVSC4x CELL NAME DRVSC4x FUNCTION CLOCK DRIVER with CMOS LEVEL SCHMITT INPUT BUFFER ( equal 4mA DRIVER ) DRVSC4x CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVSC4 PULL-DOWN DRVSC4D PULL-UP DRVSC4U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVSC4x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVSC4x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVSC4x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 548.3 PO 34.3 Rev.1.01.10 3 - 231 TC200G SERIES DATA SHEET DRVSC4x DRVSC4x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0057 0.07 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.13 2.18 3.75 5.83 0.38 1.20 2.25 3.82 5.90 1.00 1.34 2.38 3.95 6.04 3.00 1.64 2.69 4.26 6.35 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0055 0.07 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.65 3.33 5.81 8.71 0.38 1.68 3.36 5.84 8.77 1.00 1.80 3.47 5.96 8.94 3.00 2.14 3.81 6.31 9.41 Rev.1.01.10 3 - 232 TC200G SERIES DATA SHEET DRVSC4x DRVSC4x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 233 TC200G SERIES DATA SHEET DRVSC8x CELL NAME DRVSC8x FUNCTION CLOCK DRIVER with CMOS LEVEL SCHMITT INPUT BUFFER ( equal 8mA DRIVER ) DRVSC8x CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVC8 PULL-DOWN DRVC8D PULL-UP DRVC8U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVSC8x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVSC8x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVSC8x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 1162.4 PO 34.3 Rev.1.01.10 3 - 234 TC200G SERIES DATA SHEET DRVSC8x DRVSC8x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0024 0.26 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.11 1.57 2.24 3.12 0.38 1.18 1.64 2.31 3.20 1.00 1.31 1.77 2.44 3.33 3.00 1.62 2.08 2.75 3.63 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.32 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.63 2.43 3.59 5.13 0.38 1.66 2.45 3.62 5.16 1.00 1.78 2.57 3.73 5.27 3.00 2.12 2.91 4.07 5.61 Rev.1.01.10 3 - 235 TC200G SERIES DATA SHEET DRVSC8x DRVSC8x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 236 TC200G SERIES DATA SHEET DRVSC16x CELL NAME DRVSC16x FUNCTION CLOCK DRIVER with CMOS LEVEL SCHMITT INPUT BUFFER ( equal 16mA DRIVER ) DRVSC16x CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVSC16 PULL-DOWN DRVSC16D PULL-UP DRVSC16U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVSC16x Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION DRVSC16x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVSC16x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 2397.1 PO 34.3 Rev.1.01.10 3 - 237 TC200G SERIES DATA SHEET DRVSC16x DRVSC16x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.18 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 1.09 1.50 2.06 2.62 0.38 1.16 1.57 2.13 2.69 1.00 1.30 1.71 2.27 2.82 3.00 1.60 2.01 2.57 3.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0013 0.22 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 1.51 2.22 3.19 4.16 0.38 1.54 2.25 3.22 4.19 1.00 1.66 2.36 3.33 4.30 3.00 2.00 2.70 3.67 4.64 Rev.1.01.10 3 - 238 TC200G SERIES DATA SHEET DRVSC16x DRVSC16x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 239 TC200G SERIES DATA SHEET DRVT4x CELL NAME DRVT4x FUNCTION CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER ( equal 4mA DRIVER ) DRVT4x CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVT4 PULL-DOWN DRVT4D PULL-UP DRVT4U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVT4x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVT4x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVT4x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 520.7 PO 34.3 Rev.1.01.10 3 - 240 TC200G SERIES DATA SHEET DRVT4x DRVT4x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0064 0.08 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.93 2.12 3.91 6.29 0.38 0.93 2.12 3.91 6.28 1.00 0.94 2.13 3.92 6.30 3.00 1.02 2.21 3.99 6.37 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0053 0.06 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.10 2.73 5.17 8.41 0.38 1.12 2.75 5.19 8.43 1.00 1.17 2.80 5.24 8.47 3.00 1.31 2.94 5.38 8.62 Rev.1.01.10 3 - 241 TC200G SERIES DATA SHEET DRVT4x DRVT4x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 242 TC200G SERIES DATA SHEET DRVT4xFS CELL NAME DRVT4xFS FUNCTION CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER ( equal 4mA DRIVER ) with FAILSAFE DRVT4xFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVT4FS PULL-DOWN DRVT4DFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVT4xFS Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION DRVT4xFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVT4xFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 520.7 PO 34.3 Rev.1.01.10 3 - 243 TC200G SERIES DATA SHEET DRVT4xFS DRVT4xFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0064 0.08 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.93 2.12 3.91 6.29 0.38 0.93 2.12 3.91 6.28 1.00 0.94 2.13 3.92 6.30 3.00 1.02 2.21 3.99 6.37 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0053 0.06 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.10 2.73 5.17 8.41 0.38 1.12 2.75 5.19 8.43 1.00 1.17 2.80 5.24 8.47 3.00 1.31 2.94 5.38 8.62 Rev.1.01.10 3 - 244 TC200G SERIES DATA SHEET DRVT4xFS DRVT4xFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 245 TC200G SERIES DATA SHEET DRVT8x CELL NAME DRVT8x FUNCTION CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER ( equal 8mA DRIVER ) DRVT8x CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVT8 PULL-DOWN DRVT8D PULL-UP DRVT8U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVT8x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVT8x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVT8x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 1126.8 PO 34.3 Rev.1.01.10 3 - 246 TC200G SERIES DATA SHEET DRVT8x DRVT8x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.28 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.87 1.36 2.07 3.01 0.38 0.87 1.35 2.06 3.00 1.00 0.88 1.36 2.07 3.01 3.00 0.95 1.44 2.15 3.09 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0026 0.28 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.01 1.81 2.99 4.56 0.38 1.03 1.83 3.01 4.58 1.00 1.07 1.87 3.05 4.62 3.00 1.24 2.04 3.22 4.79 Rev.1.01.10 3 - 247 TC200G SERIES DATA SHEET DRVT8x DRVT8x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 248 TC200G SERIES DATA SHEET DRVT8xFS CELL NAME DRVT8xFS FUNCTION CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER ( equal 8mA DRIVER ) with FAILSAFE DRVT8xFS CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVT8FS PULL-DOWN DRVT8DFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVT8xFS Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION DRVT8xFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVT8xFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 1126.8 PO 34.3 Rev.1.01.10 3 - 249 TC200G SERIES DATA SHEET DRVT8xFS DRVT8xFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0025 0.28 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 0.87 1.36 2.07 3.01 0.38 0.87 1.35 2.06 3.00 1.00 0.88 1.36 2.07 3.01 3.00 0.95 1.44 2.15 3.09 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0026 0.28 PATH DELAY (ns) LOAD (LU) 266.67 800.00 1600.00 2666.67 SLEW (ns) 0.01 1.01 1.81 2.99 4.56 0.38 1.03 1.83 3.01 4.58 1.00 1.07 1.87 3.05 4.62 3.00 1.24 2.04 3.22 4.79 Rev.1.01.10 3 - 250 TC200G SERIES DATA SHEET DRVT8xFS DRVT8xFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 251 TC200G SERIES DATA SHEET DRVT16x CELL NAME DRVT16x FUNCTION CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER ( equal 16mA DRIVER ) DRVT16x CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVT16 PULL-DOWN DRVT16D PULL-UP DRVT16U LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVT16x OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION DRVT16x inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVT16x port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 2285.1 PO 34.3 Rev.1.01.10 3 - 252 TC200G SERIES DATA SHEET DRVT16x DRVT16x 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.29 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 1.02 1.47 2.08 2.67 0.38 1.02 1.47 2.07 2.66 1.00 1.02 1.47 2.07 2.66 3.00 1.09 1.54 2.14 2.73 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0013 0.28 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 1.07 1.79 2.79 3.78 0.38 1.09 1.81 2.80 3.79 1.00 1.13 1.85 2.84 3.83 3.00 1.30 2.02 3.01 4.00 Rev.1.01.10 3 - 253 TC200G SERIES DATA SHEET DRVT16x DRVT16x 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 254 TC200G SERIES DATA SHEET DRVT16xFS CELL NAME DRVT16xFS FUNCTION CLOCK DRIVER with LVTTL LEVEL INPUT BUFFER ( equal 16mA DRIVER ) with FAILSAFE DRVT16xFS CELL COUNT GATE 1 I/O 2 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister DRVT16FS PULL-DOWN DRVT16DFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H DRVT16xFS Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION DRVT16xFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:DRVT16xFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 17240.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 2285.1 PO 34.3 Rev.1.01.10 3 - 255 TC200G SERIES DATA SHEET DRVT16xFS DRVT16xFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0012 0.29 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE IO LEVEL --- PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 1.02 1.47 2.08 2.67 0.38 1.02 1.47 2.07 2.66 1.00 1.02 1.47 2.07 2.66 3.00 1.09 1.54 2.14 2.73 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL IO LEVEL --SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0013 0.28 PATH DELAY (ns) LOAD (LU) 400.00 1333.33 2666.67 4000.00 SLEW (ns) 0.01 1.07 1.79 2.79 3.78 0.38 1.09 1.81 2.80 3.79 1.00 1.13 1.85 2.84 3.83 3.00 1.30 2.02 3.01 4.00 Rev.1.01.10 3 - 256 TC200G SERIES DATA SHEET DRVT16xFS DRVT16xFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 257 TC200G SERIES DATA SHEET IBUFx CELL NAME IBUFx FUNCTION CMOS LEVEL INPUT BUFFER 1 CELL NAME no resister IBUF PULL-DOWN IBUFD PULL-UP IBUFU 1 IBUFx CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H IBUFx OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION IBUFx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:IBUFx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 312.6 PO 34.3 Rev.1.01.10 3 - 258 TC200G SERIES DATA SHEET IBUFx IBUFx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 259 TC200G SERIES DATA SHEET IBUFx IBUFx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 260 TC200G SERIES DATA SHEET IBUFxFS CELL NAME IBUFxFS FUNCTION CMOS LEVEL INPUT BUFFER with FAILSAFE IBUFxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister IBUFFS PULL-DOWN IBUFDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H IBUFxFS OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION IBUFxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:IBUFxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 312.6 PO 34.3 Rev.1.01.10 3 - 261 TC200G SERIES DATA SHEET IBUFxFS IBUFxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0115 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.22 0.29 0.36 0.28 0.35 0.42 0.35 0.42 0.49 0.48 0.56 0.63 70.00 0.53 0.59 0.66 0.81 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0080 0.12 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.23 0.32 0.41 0.28 0.37 0.45 0.35 0.44 0.53 0.51 0.61 0.69 70.00 0.61 0.65 0.73 0.90 Rev.1.01.10 3 - 262 TC200G SERIES DATA SHEET IBUFxFS IBUFxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 263 TC200G SERIES DATA SHEET IBUFNx CELL NAME IBUFNx FUNCTION CMOS LEVEL INVERTED INPUT BUFFER 1 CELL NAME no resister IBUFN PULL-DOWN IBUFND PULL-UP IBUFNU 1 IBUFNx CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H IBUFNx OUTPUT Z H H L L PO H L H H A Z PO PI Verilog-HDL DESCRIPTION IBUFNx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:IBUFNx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 183.5 PO 34.3 Rev.1.01.10 3 - 264 TC200G SERIES DATA SHEET IBUFNx IBUFNx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0206 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.27 0.38 0.49 0.31 0.42 0.53 0.36 0.47 0.58 0.45 0.57 0.68 70.00 0.78 0.82 0.87 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0121 0.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.34 0.47 0.59 0.39 0.52 0.64 0.44 0.57 0.69 0.53 0.66 0.78 70.00 0.89 0.94 0.99 1.08 Rev.1.01.10 3 - 265 TC200G SERIES DATA SHEET IBUFNx IBUFNx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 266 TC200G SERIES DATA SHEET IBUFNxFS CELL NAME IBUFNxFS FUNCTION CMOS LEVEL INVERTED INPUT BUFFER with FAILSAFE IBUFNxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister IBUFNFS PULL-DOWN IBUFNDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H IBUFNxFS OUTPUT Z H H L L PO H L H H A Z PO PI Verilog-HDL DESCRIPTION IBUFNxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:IBUFNxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 183.5 PO 34.3 Rev.1.01.10 3 - 267 TC200G SERIES DATA SHEET IBUFNxFS IBUFNxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0206 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.27 0.38 0.49 0.31 0.42 0.53 0.36 0.47 0.58 0.45 0.57 0.68 70.00 0.78 0.82 0.87 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0121 0.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.34 0.47 0.59 0.39 0.52 0.64 0.44 0.57 0.69 0.53 0.66 0.78 70.00 0.89 0.94 0.99 1.08 Rev.1.01.10 3 - 268 TC200G SERIES DATA SHEET IBUFNxFS IBUFNxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 269 TC200G SERIES DATA SHEET IBUFNHx CELL NAME IBUFNHx FUNCTION CMOS LEVEL INVERTED INPUT BUFFER HIGH-SPEED IBUFNHx CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister IBUFNH PULL-DOWN IBUFNHD PULL-UP IBUFNHU LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H IBUFNHx OUTPUT Z H H L L PO H L H H A Z PO PI Verilog-HDL DESCRIPTION IBUFNHx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:IBUFNHx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 202.4 PO 34.3 Rev.1.01.10 3 - 270 TC200G SERIES DATA SHEET IBUFNHx IBUFNHx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0133 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.09 0.17 0.24 0.12 0.20 0.28 0.15 0.26 0.35 0.21 0.37 0.50 70.00 0.44 0.48 0.57 0.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0105 0.11 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.10 0.20 0.30 0.14 0.25 0.35 0.18 0.32 0.44 0.23 0.44 0.61 70.00 0.56 0.62 0.72 0.98 Rev.1.01.10 3 - 271 TC200G SERIES DATA SHEET IBUFNHx IBUFNHx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 272 TC200G SERIES DATA SHEET IBUFNHxFS CELL NAME IBUFNHxFS FUNCTION CMOS LEVEL INVERTED INPUT BUFFER HIGH-SPEED with FAILSAFE IBUFNHxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister IBUFNHFS PULL-DOWN IBUFNHDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H IBUFNHxFS Z PO OUTPUT Z H H L L PO H L H H A PI Verilog-HDL DESCRIPTION IBUFNHxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:IBUFNHxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 202.4 PO 34.3 Rev.1.01.10 3 - 273 TC200G SERIES DATA SHEET IBUFNHxFS IBUFNHxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0133 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.09 0.17 0.24 0.12 0.20 0.28 0.15 0.26 0.35 0.21 0.37 0.50 70.00 0.44 0.48 0.57 0.77 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0105 0.11 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.10 0.20 0.30 0.14 0.25 0.35 0.18 0.32 0.44 0.23 0.44 0.61 70.00 0.56 0.62 0.72 0.98 Rev.1.01.10 3 - 274 TC200G SERIES DATA SHEET IBUFNHxFS IBUFNHxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 275 TC200G SERIES DATA SHEET IPCIx CELL NAME IPCIx FUNCTION PCI ( Peripheral Component Interconnect ) BUS RECEIVER IPCIx CELL COUNT GATE 0 I/O 1 1/2 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister IPCI PULL-DOWN IPCID PULL-UP IPCIU LOGIC SYMBOL TRUTH TABLE INPUT A L H OUTPUT Z L H A IPCIx Z Verilog-HDL DESCRIPTION IPCIx inst(Z,A); VHDL DESCRIPTION inst:IPCIx port map(Z,A); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) OUTPUT DRIVE PIN NAME DRIVE (LU) Z 411.4 Rev.1.01.08 3 - 276 TC200G SERIES DATA SHEET IPCIx IPCIx 2/2 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0114 0.09 PATH DELAY (ns) 1.00 15.00 30.00 0.25 0.32 0.38 0.25 0.31 0.38 0.26 0.32 0.39 0.26 0.33 0.39 70.00 0.55 0.55 0.55 0.56 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0037 0.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.29 0.35 0.40 0.31 0.37 0.43 0.38 0.44 0.49 0.62 0.68 0.73 70.00 0.51 0.54 0.60 0.85 Rev.1.01.08 3 - 277 TC200G SERIES DATA SHEET SMTCx CELL NAME SMTCx FUNCTION SCHMITT TRIGGER CMOS LEVEL INPUT BUFFER SMTCx CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister SMTC PULL-DOWN SMTCD PULL-UP SMTCU LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H SMTCx OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION SMTCx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:SMTCx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 80.1 PO 34.3 Rev.1.01.10 3 - 278 TC200G SERIES DATA SHEET SMTCx SMTCx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0387 0.32 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.35 0.56 0.77 0.42 0.63 0.84 0.55 0.76 0.98 0.85 1.06 1.28 70.00 1.33 1.40 1.53 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0318 0.27 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.53 0.82 1.10 0.56 0.85 1.13 0.67 0.96 1.24 1.01 1.30 1.59 70.00 1.84 1.87 1.98 2.32 Rev.1.01.10 3 - 279 TC200G SERIES DATA SHEET SMTCx SMTCx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 280 TC200G SERIES DATA SHEET SMTCxFS CELL NAME SMTCxFS FUNCTION SCHMITT TRIGGER CMOS LEVEL INPUT BUFFER with FAILSAFE SMTCxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister SMTCFS PULL-DOWN SMTCDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H SMTCxFS OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION SMTCxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:SMTCxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 80.1 PO 34.3 Rev.1.01.10 3 - 281 TC200G SERIES DATA SHEET SMTCxFS SMTCxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0387 0.32 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.35 0.56 0.77 0.42 0.63 0.84 0.55 0.76 0.98 0.85 1.06 1.28 70.00 1.33 1.40 1.53 1.84 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0318 0.27 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.53 0.82 1.10 0.56 0.85 1.13 0.67 0.96 1.24 1.01 1.30 1.59 70.00 1.84 1.87 1.98 2.32 Rev.1.01.10 3 - 282 TC200G SERIES DATA SHEET SMTCxFS SMTCxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 283 TC200G SERIES DATA SHEET SMTTx CELL NAME SMTTx FUNCTION SCHMITT TRIGGER LVTTL LEVEL INPUT BUFFER SMTTx CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister SMTT PULL-DOWN SMTTD PULL-UP SMTTU LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H SMTTx OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION SMTTx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:SMTTx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 76.8 PO 34.3 Rev.1.01.10 3 - 284 TC200G SERIES DATA SHEET SMTTx SMTTx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.40 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.73 0.96 1.18 0.73 0.96 1.18 0.75 0.98 1.21 0.92 1.15 1.38 70.00 1.78 1.78 1.81 1.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0322 0.34 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.73 1.03 1.33 0.74 1.04 1.34 0.79 1.09 1.39 1.04 1.34 1.64 70.00 2.10 2.11 2.16 2.41 Rev.1.01.10 3 - 285 TC200G SERIES DATA SHEET SMTTx SMTTx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 286 TC200G SERIES DATA SHEET SMTTxFS CELL NAME SMTTxFS FUNCTION SCHMITT TRIGGER LVTTL LEVEL INPUT BUFFER with FAILSAFE SMTTxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister SMTTFS PULL-DOWN SMTTDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H SMTTxFS OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION SMTTxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:SMTTxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 76.8 PO 34.3 Rev.1.01.10 3 - 287 TC200G SERIES DATA SHEET SMTTxFS SMTTxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0395 0.40 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.73 0.96 1.18 0.73 0.96 1.18 0.75 0.98 1.21 0.92 1.15 1.38 70.00 1.78 1.78 1.81 1.98 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0322 0.34 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.73 1.03 1.33 0.74 1.04 1.34 0.79 1.09 1.39 1.04 1.34 1.64 70.00 2.10 2.11 2.16 2.41 Rev.1.01.10 3 - 288 TC200G SERIES DATA SHEET SMTTxFS SMTTxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 289 TC200G SERIES DATA SHEET TLCHNx CELL NAME TLCHNx FUNCTION LVTTL LEVEL INVERTED INPUT BUFFER 1 CELL NAME no resister TLCHN PULL-DOWN TLCHND PULL-UP TLCHNU 1 TLCHNx CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H TLCHNx OUTPUT Z H H L L PO H L H H A Z PO PI Verilog-HDL DESCRIPTION TLCHNx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:TLCHNx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 182.9 PO 34.3 Rev.1.01.10 3 - 290 TC200G SERIES DATA SHEET TLCHNx TLCHNx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0206 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.29 0.40 0.52 0.31 0.43 0.54 0.36 0.47 0.58 0.45 0.57 0.68 70.00 0.81 0.83 0.87 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0121 0.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.42 0.55 0.67 0.42 0.55 0.68 0.45 0.58 0.70 0.53 0.66 0.78 70.00 0.98 0.98 1.00 1.08 Rev.1.01.10 3 - 291 TC200G SERIES DATA SHEET TLCHNx TLCHNx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 292 TC200G SERIES DATA SHEET TLCHNxFS CELL NAME TLCHNxFS FUNCTION LVTTL LEVEL INVERTED INPUT BUFFER with FAILSAFE TLCHNxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister TLCHNFS PULL-DOWN TLCHNDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H TLCHNxFS Z PO OUTPUT Z H H L L PO H L H H A PI Verilog-HDL DESCRIPTION TLCHNxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:TLCHNxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 182.9 PO 34.3 Rev.1.01.10 3 - 293 TC200G SERIES DATA SHEET TLCHNxFS TLCHNxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0206 0.13 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.29 0.40 0.52 0.31 0.43 0.54 0.36 0.47 0.58 0.45 0.57 0.68 70.00 0.81 0.83 0.87 0.97 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0121 0.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.42 0.55 0.67 0.42 0.55 0.68 0.45 0.58 0.70 0.53 0.66 0.78 70.00 0.98 0.98 1.00 1.08 Rev.1.01.10 3 - 294 TC200G SERIES DATA SHEET TLCHNxFS TLCHNxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 295 TC200G SERIES DATA SHEET TLCHNHx CELL NAME TLCHNHx FUNCTION LVTTL LEVEL INVERTED INPUT BUFFER HIGH-SPEED TLCHNHx CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister TLCHNH PULL-DOWN TLCHNHD PULL-UP TLCHNHU LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H TLCHNHx OUTPUT Z H H L L PO H L H H A Z PO PI Verilog-HDL DESCRIPTION TLCHNHx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:TLCHNHx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 127.9 PO 34.3 Rev.1.01.10 3 - 296 TC200G SERIES DATA SHEET TLCHNHx TLCHNHx CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 3 - 297 TC200G SERIES DATA SHEET TLCHNHx TLCHNHx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 298 TC200G SERIES DATA SHEET TLCHNHxFS CELL NAME TLCHNHxFS FUNCTION LVTTL LEVEL INVERTED INPUT BUFFER HIGH-SPEED with FAILSAFE TLCHNHxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister TLCHNHFS PULL-DOWN TLCHNHDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H TLCHNHxFSZ PO OUTPUT Z H H L L PO H L H H A PI Verilog-HDL DESCRIPTION TLCHNHxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:TLCHNHxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 127.9 PO 34.3 Rev.1.01.10 3 - 299 TC200G SERIES DATA SHEET TLCHNHxFS TLCHNHxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0228 0.16 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.10 0.22 0.34 0.12 0.24 0.35 0.15 0.28 0.39 0.21 0.37 0.50 70.00 0.64 0.66 0.69 0.83 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0267 0.17 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.17 0.39 0.62 0.17 0.38 0.61 0.18 0.39 0.62 0.23 0.45 0.67 70.00 1.22 1.22 1.22 1.25 Rev.1.01.10 3 - 300 TC200G SERIES DATA SHEET TLCHNHxFS TLCHNHxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 301 TC200G SERIES DATA SHEET TLCHTHx CELL NAME TLCHTHx FUNCTION LVTTL LEVEL INPUT BUFFER 1 CELL NAME no resister TLCHTH PULL-DOWN TLCHTHD PULL-UP TLCHTHU 1 TLCHTHx CELL COUNT GATE I/O 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H TLCHTHx OUTPUT Z L L H H PO H H H L A Z PO PI Verilog-HDL DESCRIPTION TLCHTHx inst(Z,PO,A,PI); VHDL DESCRIPTION inst:TLCHTHx port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 299.5 PO 34.3 Rev.1.01.10 3 - 302 TC200G SERIES DATA SHEET TLCHTHx TLCHTHx 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0121 0.17 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.37 0.45 0.53 0.37 0.45 0.52 0.38 0.46 0.54 0.48 0.56 0.63 70.00 0.71 0.71 0.73 0.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0081 0.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.29 0.38 0.47 0.31 0.40 0.49 0.36 0.45 0.54 0.51 0.61 0.69 70.00 0.68 0.70 0.75 0.90 Rev.1.01.10 3 - 303 TC200G SERIES DATA SHEET TLCHTHx TLCHTHx 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 304 TC200G SERIES DATA SHEET TLCHTHxFS CELL NAME TLCHTHxFS FUNCTION LVTTL LEVEL INPUT BUFFER with FAILSAFE TLCHTHxFS CELL COUNT GATE 1 I/O 1 1/3 CONDITION VDD=3.3V, Ta=25C, Typ. CELL NAME no resister TLCHTHFS PULL-DOWN TLCHTHDFS LOGIC SYMBOL TRUTH TABLE INPUT A PI L L L H H L H H TLCHTHxFS Z PO OUTPUT Z L L H H PO H H H L A PI Verilog-HDL DESCRIPTION TLCHTHxFS inst(Z,PO,A,PI); VHDL DESCRIPTION inst:TLCHTHxFS port map(Z,PO,A,PI); ELECTRO MIGRATION PIN NAME ELECTRO MIGRATION DRIVE Z 12064.0 (LU*MHz) PO 12928.0 INPUT LOAD PIN NAME PI (LU) LOAD 1.03 OUTPUT DRIVE PIN NAME DRIVE (LU) Z 299.5 PO 34.3 Rev.1.01.10 3 - 305 TC200G SERIES DATA SHEET TLCHTHxFS TLCHTHxFS 2/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION Z->PO --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH DELAY (ns) 1.00 5.00 10.00 0.11 0.25 0.42 0.13 0.28 0.45 0.17 0.33 0.51 0.23 0.43 0.64 30.00 1.11 1.13 1.19 1.38 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 PATH CONDITION PATH CONDITION FUNCTION Z->PO --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 5.00 10.00 0.10 0.25 0.44 0.15 0.31 0.49 0.19 0.38 0.58 0.26 0.52 0.77 30.00 1.18 1.24 1.33 1.60 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0121 0.17 PATH CONDITION PATH CONDITION FUNCTION A->Z --RISE LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.37 0.45 0.53 0.37 0.45 0.52 0.38 0.46 0.54 0.48 0.56 0.63 70.00 0.71 0.71 0.73 0.82 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) Z 0.0081 0.14 PATH CONDITION PATH CONDITION FUNCTION A->Z --FALL LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 IO LEVEL --- PATH DELAY (ns) 1.00 15.00 30.00 0.29 0.38 0.47 0.31 0.40 0.49 0.36 0.45 0.54 0.51 0.61 0.69 70.00 0.68 0.70 0.75 0.90 Rev.1.01.10 3 - 306 TC200G SERIES DATA SHEET TLCHTHxFS TLCHTHxFS 3/3 CONDITION:VDD=3.3V, Ta=25C, Typ. PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --FALL --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.24 0.43 0.15 0.32 0.51 0.21 0.42 0.63 0.32 0.62 0.90 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0653 0.10 30.00 1.17 1.25 1.39 1.78 SLEW FACTOR PIN NAME FACTOR (ns/LU) CONSTANT (ns) PO 0.0996 0.16 PATH CONDITION PATH CONDITION FUNCTION IO LEVEL PI->PO --RISE --LOAD (LU) SLEW (ns) 0.01 0.38 1.00 3.00 PATH DELAY (ns) 1.00 5.00 10.00 0.09 0.23 0.40 0.11 0.26 0.43 0.13 0.30 0.48 0.15 0.37 0.60 30.00 1.08 1.11 1.17 1.35 Rev.1.01.10 3 - 307

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